system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //xfail:BOOGIE_ERROR
//--blockDim=32 --gridDim=64 --no-inline
//error: possible write-write race on
#include <stdio.h>
#include "cuda.h"
#include <assert.h>
#define M 2//32
#define N 4//64
__global__ void foo(int* p) {
__shared__ unsigned char x[N];
for (unsigned int i=0; i<(N/4); i++) {
((unsigned int*)x)[i] = 1;//0;
}
/*
for (int i = 0; i < N/4; i++) {
p[i] = x[i];
}
*/
} | .file "tmpxft_0015d8c8_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z22__device_stub__Z3fooPiPi
.type _Z22__device_stub__Z3fooPiPi, @function
_Z22__device_stub__Z3fooPiPi:
.LFB2081:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z3fooPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z22__device_stub__Z3fooPiPi, .-_Z22__device_stub__Z3fooPiPi
.globl _Z3fooPi
.type _Z3fooPi, @function
_Z3fooPi:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z22__device_stub__Z3fooPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size _Z3fooPi, .-_Z3fooPi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3fooPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3fooPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //xfail:BOOGIE_ERROR
//--blockDim=32 --gridDim=64 --no-inline
//error: possible write-write race on
#include <stdio.h>
#include "cuda.h"
#include <assert.h>
#define M 2//32
#define N 4//64
__global__ void foo(int* p) {
__shared__ unsigned char x[N];
for (unsigned int i=0; i<(N/4); i++) {
((unsigned int*)x)[i] = 1;//0;
}
/*
for (int i = 0; i < N/4; i++) {
p[i] = x[i];
}
*/
} | //xfail:BOOGIE_ERROR
//--blockDim=32 --gridDim=64 --no-inline
//error: possible write-write race on
#include <stdio.h>
#include "hip/hip_runtime.h"
#include <assert.h>
#define M 2//32
#define N 4//64
__global__ void foo(int* p) {
__shared__ unsigned char x[N];
for (unsigned int i=0; i<(N/4); i++) {
((unsigned int*)x)[i] = 1;//0;
}
/*
for (int i = 0; i < N/4; i++) {
p[i] = x[i];
}
*/
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //xfail:BOOGIE_ERROR
//--blockDim=32 --gridDim=64 --no-inline
//error: possible write-write race on
#include <stdio.h>
#include "hip/hip_runtime.h"
#include <assert.h>
#define M 2//32
#define N 4//64
__global__ void foo(int* p) {
__shared__ unsigned char x[N];
for (unsigned int i=0; i<(N/4); i++) {
((unsigned int*)x)[i] = 1;//0;
}
/*
for (int i = 0; i < N/4; i++) {
p[i] = x[i];
}
*/
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3fooPi
.globl _Z3fooPi
.p2align 8
.type _Z3fooPi,@function
_Z3fooPi:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3fooPi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3fooPi, .Lfunc_end0-_Z3fooPi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3fooPi
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z3fooPi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //xfail:BOOGIE_ERROR
//--blockDim=32 --gridDim=64 --no-inline
//error: possible write-write race on
#include <stdio.h>
#include "hip/hip_runtime.h"
#include <assert.h>
#define M 2//32
#define N 4//64
__global__ void foo(int* p) {
__shared__ unsigned char x[N];
for (unsigned int i=0; i<(N/4); i++) {
((unsigned int*)x)[i] = 1;//0;
}
/*
for (int i = 0; i < N/4; i++) {
p[i] = x[i];
}
*/
} | .text
.file "main.hip"
.globl _Z18__device_stub__fooPi # -- Begin function _Z18__device_stub__fooPi
.p2align 4, 0x90
.type _Z18__device_stub__fooPi,@function
_Z18__device_stub__fooPi: # @_Z18__device_stub__fooPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z3fooPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z18__device_stub__fooPi, .Lfunc_end0-_Z18__device_stub__fooPi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3fooPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3fooPi,@object # @_Z3fooPi
.section .rodata,"a",@progbits
.globl _Z3fooPi
.p2align 3, 0x0
_Z3fooPi:
.quad _Z18__device_stub__fooPi
.size _Z3fooPi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3fooPi"
.size .L__unnamed_1, 9
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__fooPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3fooPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3fooPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3fooPi
.globl _Z3fooPi
.p2align 8
.type _Z3fooPi,@function
_Z3fooPi:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3fooPi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3fooPi, .Lfunc_end0-_Z3fooPi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3fooPi
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z3fooPi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015d8c8_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2059:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z22__device_stub__Z3fooPiPi
.type _Z22__device_stub__Z3fooPiPi, @function
_Z22__device_stub__Z3fooPiPi:
.LFB2081:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z3fooPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2081:
.size _Z22__device_stub__Z3fooPiPi, .-_Z22__device_stub__Z3fooPiPi
.globl _Z3fooPi
.type _Z3fooPi, @function
_Z3fooPi:
.LFB2082:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z22__device_stub__Z3fooPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2082:
.size _Z3fooPi, .-_Z3fooPi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3fooPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3fooPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl _Z18__device_stub__fooPi # -- Begin function _Z18__device_stub__fooPi
.p2align 4, 0x90
.type _Z18__device_stub__fooPi,@function
_Z18__device_stub__fooPi: # @_Z18__device_stub__fooPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z3fooPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z18__device_stub__fooPi, .Lfunc_end0-_Z18__device_stub__fooPi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3fooPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3fooPi,@object # @_Z3fooPi
.section .rodata,"a",@progbits
.globl _Z3fooPi
.p2align 3, 0x0
_Z3fooPi:
.quad _Z18__device_stub__fooPi
.size _Z3fooPi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3fooPi"
.size .L__unnamed_1, 9
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__fooPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3fooPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <algorithm>
#include <chrono>
#include <cstdlib>
#include <cstring>
#include <fstream>
#include <iostream>
#include <string>
#include <vector>
struct TItem {
int price;
int weight;
bool operator<(const TItem& other) const {
return (double)price / weight > (double)other.price / other.weight;
}
};
const int THREADS_PER_BLOCK = 192;
void BranchCPU(ssize_t e, int* w, int* p, int* s, int* U_old, int k, int* weight, int* price) {
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
__global__ void BranchGPU(int* w, int* p, int* s, int* U_old, int k, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
void BoundCPU(ssize_t e, int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price) {
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
__global__ void BoundGPU(int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
int main(int argc, char* argv[]) {
if (argc != 3) {
std::cerr << "Usage: " << argv[0] << " input_file output_file" << std::endl;
return 0;
}
std::ifstream fin(argv[1]);
std::ofstream fout(argv[2]);
int n, W;
fin >> n >> W;
std::vector<TItem> items(n);
for (int i = 0; i < n; ++i) {
fin >> items[i].price >> items[i].weight;
}
std::sort(items.begin(), items.end());
int* weight = (int*)malloc((n + 1) * sizeof(*weight));
int* price = (int*)malloc((n + 1) * sizeof(*price));
for (int i = 0; i < n; ++i) {
weight[i] = items[i].weight;
price[i] = items[i].price;
}
weight[n] = price[n] = 0;
std::chrono::high_resolution_clock::time_point total_start = std::chrono::high_resolution_clock::now();
int *cuda_weight = nullptr, *cuda_price = nullptr;
ssize_t q = 1;
int* w = (int*)malloc(q * sizeof(*w));
int* p = (int*)malloc(q * sizeof(*p));
int* s = (int*)malloc(q * sizeof(*s));
int* L = (int*)malloc(q * sizeof(*L));
int* U = (int*)malloc(q * sizeof(*U));
w[0] = p[0] = s[0]= 0;
BoundCPU(0, w, p, s, L, U, 0, n, W, weight, price);
int record = L[0];
free(L);
for (int k = 0; k < n; ++k) {
std::cout << "Step " << k + 1 << ", q = " << q << std::endl;
if (q > 5000000) {
if (cuda_weight == nullptr) {
cudaMalloc(&cuda_weight, (n + 1) * sizeof(*cuda_weight));
cudaMalloc(&cuda_price, (n + 1) * sizeof(*cuda_price));
cudaMemcpy(cuda_weight, weight, (n + 1) * sizeof(*cuda_weight), cudaMemcpyHostToDevice);
cudaMemcpy(cuda_price, price, (n + 1) * sizeof(*cuda_price), cudaMemcpyHostToDevice);
}
int *w_new, *p_new, *s_new, *L_new, *U_new, *U_old;
cudaMalloc(&w_new, q * sizeof(*w_new));
cudaMalloc(&p_new, q * sizeof(*p_new));
cudaMalloc(&s_new, q * sizeof(*s_new));
cudaMalloc(&U_old, q * sizeof(*U_old));
cudaMemcpy(w_new, w, q * sizeof(*w), cudaMemcpyHostToDevice);
cudaMemcpy(p_new, p, q * sizeof(*p), cudaMemcpyHostToDevice);
cudaMemcpy(s_new, s, q * sizeof(*s), cudaMemcpyHostToDevice);
cudaMemcpy(U_old, U, q * sizeof(*U), cudaMemcpyHostToDevice);
const ssize_t q_block = (q + THREADS_PER_BLOCK - 1) / THREADS_PER_BLOCK;
BranchGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, U_old, k, cuda_weight, cuda_price, q);
cudaDeviceSynchronize();
cudaMemcpy(U, U_old, q * sizeof(*U), cudaMemcpyDeviceToHost);
cudaFree(U_old);
cudaMalloc(&L_new, q * sizeof(*L_new));
cudaMalloc(&U_new, q * sizeof(*U_new));
BoundGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, L_new, U_new, k, n, W, cuda_weight, cuda_price, q);
cudaDeviceSynchronize();
int *L_new_CPU = (int*)malloc(q * sizeof(*L_new_CPU));
cudaMemcpy(L_new_CPU, L_new, q * sizeof(*L_new), cudaMemcpyDeviceToHost);
cudaFree(L_new);
for (ssize_t e = 0; e < q; ++e) {
record = std::max(record, L_new_CPU[e]);
}
free(L_new_CPU);
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
U = (int*)realloc(U, 2 * q * sizeof(*U));
cudaMemcpy(w + q, w_new, q * sizeof(*w), cudaMemcpyDeviceToHost);
cudaMemcpy(p + q, p_new, q * sizeof(*p), cudaMemcpyDeviceToHost);
cudaMemcpy(s + q, s_new, q * sizeof(*s), cudaMemcpyDeviceToHost);
cudaMemcpy(U + q, U_new, q * sizeof(*U), cudaMemcpyDeviceToHost);
cudaFree(w_new);
cudaFree(p_new);
cudaFree(s_new);
cudaFree(U_new);
} else {
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
memcpy(w + q, w, q * sizeof(*w));
memcpy(p + q, p, q * sizeof(*p));
memcpy(s + q, s, q * sizeof(*s));
for (ssize_t e = 0; e < q; ++e) {
BranchCPU(e, w + q, p + q, s + q, U, k, weight, price);
}
U = (int*)realloc(U, 2 * q * sizeof(*U));
int* L_new = (int*)malloc(q * sizeof(*L_new));
for (ssize_t e = 0; e < q; ++e) {
BoundCPU(e, w + q, p + q, s + q, L_new, U + q, k, n, W, weight, price);
record = std::max(record, L_new[e]);
}
free(L_new);
}
for (ssize_t i = 0, j = 2 * q - 1; ;) {
while (i < 2 * q && U[i] > record) {
++i;
}
while (j >= 0 && U[j] <= record) {
--j;
}
if (i >= j) {
q = j + 1;
break;
}
w[i] = w[j];
p[i] = p[j];
s[i] = s[j];
std::swap(U[i], U[j]);
}
if (q == 0) {
break;
}
}
free(w);
free(p);
free(s);
free(U);
free(weight);
free(price);
if (cuda_weight != nullptr) {
cudaFree(cuda_weight);
cudaFree(cuda_price);
}
std::chrono::high_resolution_clock::time_point total_end = std::chrono::high_resolution_clock::now();
double total_time = std::chrono::duration_cast<std::chrono::duration<double>>(total_end - total_start).count();
std::cout << "Total time: " << total_time << std::endl;
fout << record << std::endl;
return 0;
} | #include <hip/hip_runtime.h>
#include <algorithm>
#include <chrono>
#include <cstdlib>
#include <cstring>
#include <fstream>
#include <iostream>
#include <string>
#include <vector>
struct TItem {
int price;
int weight;
bool operator<(const TItem& other) const {
return (double)price / weight > (double)other.price / other.weight;
}
};
const int THREADS_PER_BLOCK = 192;
void BranchCPU(ssize_t e, int* w, int* p, int* s, int* U_old, int k, int* weight, int* price) {
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
__global__ void BranchGPU(int* w, int* p, int* s, int* U_old, int k, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
void BoundCPU(ssize_t e, int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price) {
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
__global__ void BoundGPU(int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
int main(int argc, char* argv[]) {
if (argc != 3) {
std::cerr << "Usage: " << argv[0] << " input_file output_file" << std::endl;
return 0;
}
std::ifstream fin(argv[1]);
std::ofstream fout(argv[2]);
int n, W;
fin >> n >> W;
std::vector<TItem> items(n);
for (int i = 0; i < n; ++i) {
fin >> items[i].price >> items[i].weight;
}
std::sort(items.begin(), items.end());
int* weight = (int*)malloc((n + 1) * sizeof(*weight));
int* price = (int*)malloc((n + 1) * sizeof(*price));
for (int i = 0; i < n; ++i) {
weight[i] = items[i].weight;
price[i] = items[i].price;
}
weight[n] = price[n] = 0;
std::chrono::high_resolution_clock::time_point total_start = std::chrono::high_resolution_clock::now();
int *cuda_weight = nullptr, *cuda_price = nullptr;
ssize_t q = 1;
int* w = (int*)malloc(q * sizeof(*w));
int* p = (int*)malloc(q * sizeof(*p));
int* s = (int*)malloc(q * sizeof(*s));
int* L = (int*)malloc(q * sizeof(*L));
int* U = (int*)malloc(q * sizeof(*U));
w[0] = p[0] = s[0]= 0;
BoundCPU(0, w, p, s, L, U, 0, n, W, weight, price);
int record = L[0];
free(L);
for (int k = 0; k < n; ++k) {
std::cout << "Step " << k + 1 << ", q = " << q << std::endl;
if (q > 5000000) {
if (cuda_weight == nullptr) {
hipMalloc(&cuda_weight, (n + 1) * sizeof(*cuda_weight));
hipMalloc(&cuda_price, (n + 1) * sizeof(*cuda_price));
hipMemcpy(cuda_weight, weight, (n + 1) * sizeof(*cuda_weight), hipMemcpyHostToDevice);
hipMemcpy(cuda_price, price, (n + 1) * sizeof(*cuda_price), hipMemcpyHostToDevice);
}
int *w_new, *p_new, *s_new, *L_new, *U_new, *U_old;
hipMalloc(&w_new, q * sizeof(*w_new));
hipMalloc(&p_new, q * sizeof(*p_new));
hipMalloc(&s_new, q * sizeof(*s_new));
hipMalloc(&U_old, q * sizeof(*U_old));
hipMemcpy(w_new, w, q * sizeof(*w), hipMemcpyHostToDevice);
hipMemcpy(p_new, p, q * sizeof(*p), hipMemcpyHostToDevice);
hipMemcpy(s_new, s, q * sizeof(*s), hipMemcpyHostToDevice);
hipMemcpy(U_old, U, q * sizeof(*U), hipMemcpyHostToDevice);
const ssize_t q_block = (q + THREADS_PER_BLOCK - 1) / THREADS_PER_BLOCK;
BranchGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, U_old, k, cuda_weight, cuda_price, q);
hipDeviceSynchronize();
hipMemcpy(U, U_old, q * sizeof(*U), hipMemcpyDeviceToHost);
hipFree(U_old);
hipMalloc(&L_new, q * sizeof(*L_new));
hipMalloc(&U_new, q * sizeof(*U_new));
BoundGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, L_new, U_new, k, n, W, cuda_weight, cuda_price, q);
hipDeviceSynchronize();
int *L_new_CPU = (int*)malloc(q * sizeof(*L_new_CPU));
hipMemcpy(L_new_CPU, L_new, q * sizeof(*L_new), hipMemcpyDeviceToHost);
hipFree(L_new);
for (ssize_t e = 0; e < q; ++e) {
record = std::max(record, L_new_CPU[e]);
}
free(L_new_CPU);
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
U = (int*)realloc(U, 2 * q * sizeof(*U));
hipMemcpy(w + q, w_new, q * sizeof(*w), hipMemcpyDeviceToHost);
hipMemcpy(p + q, p_new, q * sizeof(*p), hipMemcpyDeviceToHost);
hipMemcpy(s + q, s_new, q * sizeof(*s), hipMemcpyDeviceToHost);
hipMemcpy(U + q, U_new, q * sizeof(*U), hipMemcpyDeviceToHost);
hipFree(w_new);
hipFree(p_new);
hipFree(s_new);
hipFree(U_new);
} else {
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
memcpy(w + q, w, q * sizeof(*w));
memcpy(p + q, p, q * sizeof(*p));
memcpy(s + q, s, q * sizeof(*s));
for (ssize_t e = 0; e < q; ++e) {
BranchCPU(e, w + q, p + q, s + q, U, k, weight, price);
}
U = (int*)realloc(U, 2 * q * sizeof(*U));
int* L_new = (int*)malloc(q * sizeof(*L_new));
for (ssize_t e = 0; e < q; ++e) {
BoundCPU(e, w + q, p + q, s + q, L_new, U + q, k, n, W, weight, price);
record = std::max(record, L_new[e]);
}
free(L_new);
}
for (ssize_t i = 0, j = 2 * q - 1; ;) {
while (i < 2 * q && U[i] > record) {
++i;
}
while (j >= 0 && U[j] <= record) {
--j;
}
if (i >= j) {
q = j + 1;
break;
}
w[i] = w[j];
p[i] = p[j];
s[i] = s[j];
std::swap(U[i], U[j]);
}
if (q == 0) {
break;
}
}
free(w);
free(p);
free(s);
free(U);
free(weight);
free(price);
if (cuda_weight != nullptr) {
hipFree(cuda_weight);
hipFree(cuda_price);
}
std::chrono::high_resolution_clock::time_point total_end = std::chrono::high_resolution_clock::now();
double total_time = std::chrono::duration_cast<std::chrono::duration<double>>(total_end - total_start).count();
std::cout << "Total time: " << total_time << std::endl;
fout << record << std::endl;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <algorithm>
#include <chrono>
#include <cstdlib>
#include <cstring>
#include <fstream>
#include <iostream>
#include <string>
#include <vector>
struct TItem {
int price;
int weight;
bool operator<(const TItem& other) const {
return (double)price / weight > (double)other.price / other.weight;
}
};
const int THREADS_PER_BLOCK = 192;
void BranchCPU(ssize_t e, int* w, int* p, int* s, int* U_old, int k, int* weight, int* price) {
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
__global__ void BranchGPU(int* w, int* p, int* s, int* U_old, int k, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int s_e = s[e];
if (k < s_e) {
w[e] -= weight[k];
p[e] -= price[k];
} else {
++s[e];
U_old[e] = 0;
}
}
void BoundCPU(ssize_t e, int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price) {
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
__global__ void BoundGPU(int* w, int* p, int* s, int* L, int* U, int k, int n, int W, int* weight, int* price, ssize_t q) {
ssize_t e = blockIdx.x * blockDim.x + threadIdx.x;
if (e >= q) {
return;
}
int i = s[e], w_e = w[e], p_e = p[e], weight_i = 0, price_i = 0;
for (; i <= n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
} else {
break;
}
}
U[e] = p_e + (weight_i ? (W - w_e) * price_i / weight_i : 0);
w[e] = w_e;
p[e] = p_e;
s[e] = i;
for (; i < n; ++i) {
weight_i = weight[i];
price_i = price[i];
if (w_e + weight_i <= W) {
w_e += weight_i;
p_e += price_i;
}
}
L[e] = p_e;
}
int main(int argc, char* argv[]) {
if (argc != 3) {
std::cerr << "Usage: " << argv[0] << " input_file output_file" << std::endl;
return 0;
}
std::ifstream fin(argv[1]);
std::ofstream fout(argv[2]);
int n, W;
fin >> n >> W;
std::vector<TItem> items(n);
for (int i = 0; i < n; ++i) {
fin >> items[i].price >> items[i].weight;
}
std::sort(items.begin(), items.end());
int* weight = (int*)malloc((n + 1) * sizeof(*weight));
int* price = (int*)malloc((n + 1) * sizeof(*price));
for (int i = 0; i < n; ++i) {
weight[i] = items[i].weight;
price[i] = items[i].price;
}
weight[n] = price[n] = 0;
std::chrono::high_resolution_clock::time_point total_start = std::chrono::high_resolution_clock::now();
int *cuda_weight = nullptr, *cuda_price = nullptr;
ssize_t q = 1;
int* w = (int*)malloc(q * sizeof(*w));
int* p = (int*)malloc(q * sizeof(*p));
int* s = (int*)malloc(q * sizeof(*s));
int* L = (int*)malloc(q * sizeof(*L));
int* U = (int*)malloc(q * sizeof(*U));
w[0] = p[0] = s[0]= 0;
BoundCPU(0, w, p, s, L, U, 0, n, W, weight, price);
int record = L[0];
free(L);
for (int k = 0; k < n; ++k) {
std::cout << "Step " << k + 1 << ", q = " << q << std::endl;
if (q > 5000000) {
if (cuda_weight == nullptr) {
hipMalloc(&cuda_weight, (n + 1) * sizeof(*cuda_weight));
hipMalloc(&cuda_price, (n + 1) * sizeof(*cuda_price));
hipMemcpy(cuda_weight, weight, (n + 1) * sizeof(*cuda_weight), hipMemcpyHostToDevice);
hipMemcpy(cuda_price, price, (n + 1) * sizeof(*cuda_price), hipMemcpyHostToDevice);
}
int *w_new, *p_new, *s_new, *L_new, *U_new, *U_old;
hipMalloc(&w_new, q * sizeof(*w_new));
hipMalloc(&p_new, q * sizeof(*p_new));
hipMalloc(&s_new, q * sizeof(*s_new));
hipMalloc(&U_old, q * sizeof(*U_old));
hipMemcpy(w_new, w, q * sizeof(*w), hipMemcpyHostToDevice);
hipMemcpy(p_new, p, q * sizeof(*p), hipMemcpyHostToDevice);
hipMemcpy(s_new, s, q * sizeof(*s), hipMemcpyHostToDevice);
hipMemcpy(U_old, U, q * sizeof(*U), hipMemcpyHostToDevice);
const ssize_t q_block = (q + THREADS_PER_BLOCK - 1) / THREADS_PER_BLOCK;
BranchGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, U_old, k, cuda_weight, cuda_price, q);
hipDeviceSynchronize();
hipMemcpy(U, U_old, q * sizeof(*U), hipMemcpyDeviceToHost);
hipFree(U_old);
hipMalloc(&L_new, q * sizeof(*L_new));
hipMalloc(&U_new, q * sizeof(*U_new));
BoundGPU<<<q_block, THREADS_PER_BLOCK>>>(w_new, p_new, s_new, L_new, U_new, k, n, W, cuda_weight, cuda_price, q);
hipDeviceSynchronize();
int *L_new_CPU = (int*)malloc(q * sizeof(*L_new_CPU));
hipMemcpy(L_new_CPU, L_new, q * sizeof(*L_new), hipMemcpyDeviceToHost);
hipFree(L_new);
for (ssize_t e = 0; e < q; ++e) {
record = std::max(record, L_new_CPU[e]);
}
free(L_new_CPU);
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
U = (int*)realloc(U, 2 * q * sizeof(*U));
hipMemcpy(w + q, w_new, q * sizeof(*w), hipMemcpyDeviceToHost);
hipMemcpy(p + q, p_new, q * sizeof(*p), hipMemcpyDeviceToHost);
hipMemcpy(s + q, s_new, q * sizeof(*s), hipMemcpyDeviceToHost);
hipMemcpy(U + q, U_new, q * sizeof(*U), hipMemcpyDeviceToHost);
hipFree(w_new);
hipFree(p_new);
hipFree(s_new);
hipFree(U_new);
} else {
w = (int*)realloc(w, 2 * q * sizeof(*w));
p = (int*)realloc(p, 2 * q * sizeof(*p));
s = (int*)realloc(s, 2 * q * sizeof(*s));
memcpy(w + q, w, q * sizeof(*w));
memcpy(p + q, p, q * sizeof(*p));
memcpy(s + q, s, q * sizeof(*s));
for (ssize_t e = 0; e < q; ++e) {
BranchCPU(e, w + q, p + q, s + q, U, k, weight, price);
}
U = (int*)realloc(U, 2 * q * sizeof(*U));
int* L_new = (int*)malloc(q * sizeof(*L_new));
for (ssize_t e = 0; e < q; ++e) {
BoundCPU(e, w + q, p + q, s + q, L_new, U + q, k, n, W, weight, price);
record = std::max(record, L_new[e]);
}
free(L_new);
}
for (ssize_t i = 0, j = 2 * q - 1; ;) {
while (i < 2 * q && U[i] > record) {
++i;
}
while (j >= 0 && U[j] <= record) {
--j;
}
if (i >= j) {
q = j + 1;
break;
}
w[i] = w[j];
p[i] = p[j];
s[i] = s[j];
std::swap(U[i], U[j]);
}
if (q == 0) {
break;
}
}
free(w);
free(p);
free(s);
free(U);
free(weight);
free(price);
if (cuda_weight != nullptr) {
hipFree(cuda_weight);
hipFree(cuda_price);
}
std::chrono::high_resolution_clock::time_point total_end = std::chrono::high_resolution_clock::now();
double total_time = std::chrono::duration_cast<std::chrono::duration<double>>(total_end - total_start).count();
std::cout << "Total time: " << total_time << std::endl;
fout << record << std::endl;
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9BranchGPUPiS_S_S_iS_S_l
.globl _Z9BranchGPUPiS_S_S_iS_S_l
.p2align 8
.type _Z9BranchGPUPiS_S_S_iS_S_l,@function
_Z9BranchGPUPiS_S_S_iS_S_l:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x4c
s_load_b64 s[2:3], s[0:1], 0x38
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_5
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x10
s_load_b32 s2, s[0:1], 0x20
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo
global_load_b32 v0, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_ge_i32_e64 s2, v0
s_xor_b32 s3, exec_lo, s3
s_cbranch_execz .LBB0_3
s_load_b64 s[4:5], s[0:1], 0x18
v_add_nc_u32_e32 v2, 1, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s4, v5
v_mov_b32_e32 v5, 0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v6, vcc_lo
global_store_b32 v[3:4], v2, off
global_store_b32 v[0:1], v5, off
.LBB0_3:
s_and_not1_saveexec_b32 s3, s3
s_cbranch_execz .LBB0_5
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b128 s[8:11], s[0:1], 0x28
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_ashr_i32 s3, s2, 31
v_mov_b32_e32 v4, 0
s_lshl_b64 s[0:1], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
s_add_u32 s2, s8, s0
s_addc_u32 s3, s9, s1
global_load_b32 v5, v4, s[2:3]
global_load_b32 v6, v[2:3], off
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v5, v6, v5
global_store_b32 v[2:3], v5, off
global_load_b32 v2, v4, s[0:1]
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_sub_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9BranchGPUPiS_S_S_iS_S_l
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 320
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9BranchGPUPiS_S_S_iS_S_l, .Lfunc_end0-_Z9BranchGPUPiS_S_S_iS_S_l
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z8BoundGPUPiS_S_S_S_iiiS_S_l
.globl _Z8BoundGPUPiS_S_S_S_iiiS_S_l
.p2align 8
.type _Z8BoundGPUPiS_S_S_S_iiiS_S_l,@function
_Z8BoundGPUPiS_S_S_S_iiiS_S_l:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x5c
s_load_b64 s[2:3], s[0:1], 0x48
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_cmp_gt_i64_e32 vcc_lo, s[2:3], v[1:2]
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB1_16
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b64 v[9:10], 2, v[1:2]
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v16, 0
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v10, vcc_lo
v_add_co_u32 v7, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v3, v[5:6], off
global_load_b32 v15, v[7:8], off
global_load_b32 v0, v[9:10], off
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x2c
s_load_b128 s[4:7], s[0:1], 0x38
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(2) lgkmcnt(0)
v_cmpx_ge_i32_e64 s8, v3
s_cbranch_execz .LBB1_7
v_ashrrev_i32_e32 v4, 31, v3
s_add_i32 s11, s8, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[13:14], 2, v[3:4]
v_add_co_u32 v11, vcc_lo, s4, v13
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v14, vcc_lo
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
s_set_inst_prefetch_distance 0x1
s_branch .LBB1_4
.p2align 6
.LBB1_3:
s_or_b32 exec_lo, exec_lo, s13
v_dual_mov_b32 v20, v3 :: v_dual_mov_b32 v15, v17
v_mov_b32_e32 v3, v18
s_and_b32 s2, exec_lo, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 s10, s2, s10
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execz .LBB1_6
.LBB1_4:
global_load_b32 v16, v[11:12], off
global_load_b32 v4, v[13:14], off
s_waitcnt vmcnt(3)
v_mov_b32_e32 v19, v15
s_or_b32 s12, s12, exec_lo
s_mov_b32 s13, exec_lo
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v17, v16, v15
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_i32_e64 s9, v17
s_cbranch_execz .LBB1_3
v_add_co_u32 v11, vcc_lo, v11, 4
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s8, v3
v_add_co_u32 v13, s2, v13, 4
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v4, v0
v_dual_mov_b32 v19, v17 :: v_dual_add_nc_u32 v18, 1, v3
v_add_co_ci_u32_e64 v14, s2, 0, v14, s2
v_mov_b32_e32 v3, s11
s_and_not1_b32 s2, s12, exec_lo
s_and_b32 s12, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s12, s2, s12
s_branch .LBB1_3
.LBB1_6:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s10
v_mov_b32_e32 v15, v19
v_mov_b32_e32 v3, v20
.LBB1_7:
s_or_b32 exec_lo, exec_lo, s3
v_mov_b32_e32 v11, 0
s_mov_b32 s2, exec_lo
v_cmpx_ne_u32_e32 0, v16
s_cbranch_execz .LBB1_9
v_ashrrev_i32_e32 v11, 31, v16
s_waitcnt vmcnt(1)
v_sub_nc_u32_e32 v14, s9, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v12, v16, v11
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, v4, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v12, v12, v11
v_cvt_f32_u32_e32 v13, v12
v_sub_nc_u32_e32 v16, 0, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v13, v13
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v13, 0x4f7ffffe, v13
v_cvt_u32_f32_e32 v13, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v14, v16, v13
v_ashrrev_i32_e32 v16, 31, v4
v_add_nc_u32_e32 v4, v4, v16
v_xor_b32_e32 v11, v16, v11
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_hi_u32 v14, v13, v14
v_xor_b32_e32 v4, v4, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v13, v13, v14
v_mul_hi_u32 v13, v4, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v14, v13, v12
v_sub_nc_u32_e32 v4, v4, v14
v_add_nc_u32_e32 v14, 1, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v17, v4, v12
v_cmp_ge_u32_e32 vcc_lo, v4, v12
v_dual_cndmask_b32 v4, v4, v17 :: v_dual_cndmask_b32 v13, v13, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ge_u32_e32 vcc_lo, v4, v12
v_add_nc_u32_e32 v14, 1, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v13, v14, vcc_lo
v_xor_b32_e32 v4, v4, v11
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v11, v4, v11
.LBB1_9:
s_or_b32 exec_lo, exec_lo, s2
s_load_b64 s[2:3], s[0:1], 0x20
v_lshlrev_b64 v[12:13], 2, v[1:2]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v4, v11, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v11, vcc_lo, s2, v12
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v13, vcc_lo
s_mov_b32 s3, exec_lo
global_store_b32 v[11:12], v4, off
global_store_b32 v[7:8], v15, off
global_store_b32 v[9:10], v0, off
global_store_b32 v[5:6], v3, off
v_cmpx_gt_i32_e64 s8, v3
s_cbranch_execz .LBB1_15
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[3:4]
v_add_co_u32 v4, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v7, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
s_mov_b32 s4, 0
s_set_inst_prefetch_distance 0x1
s_branch .LBB1_12
.p2align 6
.LBB1_11:
s_or_b32 exec_lo, exec_lo, s2
v_add_nc_u32_e32 v3, 1, v3
v_add_co_u32 v4, vcc_lo, v4, 4
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s8, v3
v_add_co_u32 v6, s2, v6, 4
v_add_co_ci_u32_e64 v7, s2, 0, v7, s2
s_or_b32 s4, vcc_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execz .LBB1_14
.LBB1_12:
global_load_b32 v8, v[4:5], off
s_mov_b32 s2, exec_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v8, v8, v15
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_i32_e64 s9, v8
s_cbranch_execz .LBB1_11
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_dual_mov_b32 v15, v8 :: v_dual_add_nc_u32 v0, v9, v0
s_branch .LBB1_11
.LBB1_14:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s4
.LBB1_15:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s3
s_load_b64 s[0:1], s[0:1], 0x18
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB1_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8BoundGPUPiS_S_S_S_iiiS_S_l
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 336
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 21
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z8BoundGPUPiS_S_S_S_iiiS_S_l, .Lfunc_end1-_Z8BoundGPUPiS_S_S_S_iiiS_S_l
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 48
.size: 8
.value_kind: global_buffer
- .offset: 56
.size: 8
.value_kind: by_value
- .offset: 64
.size: 4
.value_kind: hidden_block_count_x
- .offset: 68
.size: 4
.value_kind: hidden_block_count_y
- .offset: 72
.size: 4
.value_kind: hidden_block_count_z
- .offset: 76
.size: 2
.value_kind: hidden_group_size_x
- .offset: 78
.size: 2
.value_kind: hidden_group_size_y
- .offset: 80
.size: 2
.value_kind: hidden_group_size_z
- .offset: 82
.size: 2
.value_kind: hidden_remainder_x
- .offset: 84
.size: 2
.value_kind: hidden_remainder_y
- .offset: 86
.size: 2
.value_kind: hidden_remainder_z
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 112
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 128
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 320
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9BranchGPUPiS_S_S_iS_S_l
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9BranchGPUPiS_S_S_iS_S_l.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 44
.size: 4
.value_kind: by_value
- .offset: 48
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 56
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 64
.size: 8
.value_kind: global_buffer
- .offset: 72
.size: 8
.value_kind: by_value
- .offset: 80
.size: 4
.value_kind: hidden_block_count_x
- .offset: 84
.size: 4
.value_kind: hidden_block_count_y
- .offset: 88
.size: 4
.value_kind: hidden_block_count_z
- .offset: 92
.size: 2
.value_kind: hidden_group_size_x
- .offset: 94
.size: 2
.value_kind: hidden_group_size_y
- .offset: 96
.size: 2
.value_kind: hidden_group_size_z
- .offset: 98
.size: 2
.value_kind: hidden_remainder_x
- .offset: 100
.size: 2
.value_kind: hidden_remainder_y
- .offset: 102
.size: 2
.value_kind: hidden_remainder_z
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 128
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 136
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 144
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 336
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8BoundGPUPiS_S_S_S_iiiS_S_l
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z8BoundGPUPiS_S_S_S_iiiS_S_l.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 21
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <stdio.h>
#include <memory.h>
#include <string.h>
#include <math.h>
#define VCOUNT 5
#define ECOUNT 12
/*
0 - -- - 1
- -
- -
2
- -
- -
3 - -- - 4
*/
bool frontierNotEmpty(bool* pFrontier, const int size);
void print(bool* p, const int size, const int unit);
__global__ void bfs_kernel(int* pV,
int* pE,
bool* pF,
bool* pX,
int* pC,
const int vcount,
const int ecount,
bool* done)
{
const int tid = threadIdx.x + blockIdx.x * blockDim.x;
// printf("tid = %d\n", tid);
if (tid > VCOUNT) { *done = false; }
// printf("done = %d\n", *done);
if (pF[tid] == true && pX[tid] == false)
{
printf("tid = %d\n", tid);
pF[tid] = false;
pX[tid] = true;
__syncthreads();
const int nidStart = pV[tid];
int nidEnd = -1;
if (tid >= vcount)
{
nidEnd = pV[tid + 1];
}
else
{
nidEnd = ecount;
}
// printf("nidStart = %d\n", nidStart);
// printf("nidEnd = %d\n", nidEnd);
for (int nid = nidStart; nid < nidEnd; ++nid)
{
if (!pX[nid])
{
pC[nid] = pC[tid] + 1;
pF[nid] = true;
*done = false;
}
}
}
}
int main()
{
// Allocate space for vertex, edge, frontier, visit and cost arrays
int* pVertices = new int[VCOUNT];
int* pEdges = new int[ECOUNT];
bool* pFrontier = new bool[VCOUNT];
bool* pVisited = new bool[VCOUNT];
int* pCost = new int[VCOUNT];
// Initialize arrays
for (int i = 0; i < VCOUNT; ++i)
{
pVertices[i] = i;
pFrontier[i] = false;
pVisited[i] = false;
pCost[i] = INT_MAX;
}
pEdges[0] = 1; pEdges[1] = 2;
pEdges[2] = 0; pEdges[3] = 2;
pEdges[4] = 0; pEdges[5] = 1; pEdges[6] = 3; pEdges[7] = 4;
pEdges[8] = 2; pEdges[9] = 4;
pEdges[10] = 2; pEdges[11] = 3;
int* d_pVertices;
int* d_pEdges;
bool* d_pFrontier;
bool* d_pVisited;
int* d_pCost;
cudaMalloc((void **)&d_pVertices, sizeof(int) * VCOUNT);
cudaMalloc((void **)&d_pEdges, sizeof(int) * ECOUNT);
cudaMalloc((void **)&d_pFrontier, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pVisited, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pCost, sizeof(int) * VCOUNT);
int source = 2;
pFrontier[source] = true;
pCost[source] = 0;
cudaMemcpy(d_pVertices, pVertices, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pEdges, pEdges, sizeof(int) * ECOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pFrontier, pFrontier, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pVisited, pVisited, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pCost, pCost, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
// Actual algorithm code goes here
int count = 0;
bool done = true;
bool* d_done;
cudaMalloc((void**)&d_done, sizeof(bool));
do
{
++count;
done = true;
cudaMemcpy(d_done, &done, sizeof(bool), cudaMemcpyHostToDevice);
bfs_kernel<<<1, VCOUNT>>>(d_pVertices,
d_pEdges,
d_pFrontier,
d_pVisited,
d_pCost,
VCOUNT,
ECOUNT,
d_done);
cudaMemcpy(&done, d_done, sizeof(bool), cudaMemcpyDeviceToHost);
} while(!done);
std::cout << "count: " << count << std::endl;
delete pVertices;
delete pEdges;
delete pFrontier;
delete pVisited;
delete pCost;
cudaFree(d_pVertices);
cudaFree(d_pEdges);
cudaFree(d_pFrontier);
cudaFree(d_pVisited);
cudaFree(d_pCost);
return 0;
}
bool frontierNotEmpty(bool* pFrontier, const int size)
{
for (int i = 0; i < size; ++i) if (pFrontier[i]) return true;
return false;
}
void print(bool* p, const int size, const int unit)
{
for (int i = 0; i < size; ++i)
{
std::cout << p[i] << ' ';
}
std::cout << std::endl;
} | code for sm_80
Function : _Z10bfs_kernelPiS_PbS0_S_iiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R28, SR_CTAID.X ; /* 0x00000000001c7919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R22, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff167624 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR36, c[0x0][0x118] ; /* 0x0000460000247ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff177624 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0060*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0070*/ IMAD R28, R28, c[0x0][0x0], R3 ; /* 0x000000001c1c7a24 */
/* 0x001fca00078e0203 */
/*0080*/ ISETP.GE.AND P0, PT, R28.reuse, 0x6, PT ; /* 0x000000061c00780c */
/* 0x040fe40003f06270 */
/*0090*/ SHF.R.S32.HI R27, RZ, 0x1f, R28 ; /* 0x0000001fff1b7819 */
/* 0x000fe4000001141c */
/*00a0*/ IADD3 R18, P1, R28, c[0x0][0x170], RZ ; /* 0x00005c001c127a10 */
/* 0x000fc80007f3e0ff */
/*00b0*/ IADD3.X R19, R27, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d001b137a10 */
/* 0x000fca0000ffe4ff */
/*00c0*/ @P0 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16000986 */
/* 0x0001e8000c101124 */
/*00d0*/ LDG.E.U8 R0, [R18.64] ; /* 0x0000002412007981 */
/* 0x000ea4000c1e1100 */
/*00e0*/ ISETP.NE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x004fda0003f05270 */
/*00f0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0100*/ IADD3 R16, P0, R28, c[0x0][0x178], RZ ; /* 0x00005e001c107a10 */
/* 0x001fc80007f1e0ff */
/*0110*/ IADD3.X R17, R27, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f001b117a10 */
/* 0x000fca00007fe4ff */
/*0120*/ LDG.E.U8 R0, [R16.64] ; /* 0x0000002410007981 */
/* 0x000ea2000c1e1100 */
/*0130*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe40007f3e0ff */
/*0140*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x004fda0003f05270 */
/*0150*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0160*/ MOV R2, 0x0 ; /* 0x0000000000027802 */
/* 0x000fe20000000f00 */
/*0170*/ STL [R1], R28 ; /* 0x0000001c01007387 */
/* 0x0001e20000100800 */
/*0180*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */
/* 0x000fe400008e06ff */
/*0190*/ IMAD.MOV.U32 R26, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff1a7624 */
/* 0x000fe400078e00ff */
/*01a0*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */
/* 0x000e620000000a00 */
/*01b0*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff197624 */
/* 0x000fe400078e00ff */
/*01c0*/ IMAD.MOV.U32 R24, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff187624 */
/* 0x000fe400078e00ff */
/*01d0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fc400078e00ff */
/*01e0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe400078e00ff */
/*01f0*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x001fe20000000000 */
/*0200*/ MOV R11, 0x270 ; /* 0x00000270000b7802 */
/* 0x000fe40000000f00 */
/*0210*/ MOV R20, 0x1f0 ; /* 0x000001f000147802 */
/* 0x000fe40000000f00 */
/*0220*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0230*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0240*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0250*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0260*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x002fea0003c00000 */
/*0270*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */
/* 0x000fe200078e00ff */
/*0280*/ STG.E.U8 [R18.64], RZ ; /* 0x000000ff12007986 */
/* 0x0001e2000c101124 */
/*0290*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe20003800000 */
/*02a0*/ IMAD.SHL.U32 R4, R28.reuse, 0x4, RZ ; /* 0x000000041c047824 */
/* 0x040fe200078e00ff */
/*02b0*/ ISETP.GE.AND P0, PT, R28.reuse, c[0x0][0x188], PT ; /* 0x000062001c007a0c */
/* 0x040fe20003f06270 */
/*02c0*/ STG.E.U8 [R16.64], R8 ; /* 0x0000000810007986 */
/* 0x0001e2000c101124 */
/*02d0*/ SHF.L.U64.HI R27, R28, 0x2, R27 ; /* 0x000000021c1b7819 */
/* 0x000fc6000001021b */
/*02e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*02f0*/ IADD3 R2, P1, R4, c[0x0][0x160], RZ ; /* 0x0000580004027a10 */
/* 0x000fc80007f3e0ff */
/*0300*/ IADD3.X R3, R27, c[0x0][0x164], RZ, P1, !PT ; /* 0x000059001b037a10 */
/* 0x000fca0000ffe4ff */
/*0310*/ @P0 LDG.E R26, [R2.64+0x4] ; /* 0x00000424021a0981 */
/* 0x000ea8000c1e1900 */
/*0320*/ LDG.E R5, [R2.64] ; /* 0x0000002402057981 */
/* 0x000ea4000c1e1900 */
/*0330*/ ISETP.GT.AND P0, PT, R26, R5, PT ; /* 0x000000051a00720c */
/* 0x004fda0003f04270 */
/*0340*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0350*/ IMAD.IADD R0, R26, 0x1, -R5 ; /* 0x000000011a007824 */
/* 0x001fe200078e0a05 */
/*0360*/ LOP3.LUT R3, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff037212 */
/* 0x000fe200078e33ff */
/*0370*/ BSSY B0, 0x5d0 ; /* 0x0000025000007945 */
/* 0x000fe20003800000 */
/*0380*/ IADD3 R2, P2, R4, c[0x0][0x180], RZ ; /* 0x0000600004027a10 */
/* 0x000fe40007f5e0ff */
/*0390*/ LOP3.LUT P1, R8, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300087812 */
/* 0x000fe2000782c0ff */
/*03a0*/ IMAD.IADD R3, R3, 0x1, R26 ; /* 0x0000000103037824 */
/* 0x000fca00078e021a */
/*03b0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe40003f06070 */
/*03c0*/ IADD3.X R3, R27, c[0x0][0x184], RZ, P2, !PT ; /* 0x000061001b037a10 */
/* 0x000fca00017fe4ff */
/*03d0*/ @!P1 BRA 0x5c0 ; /* 0x000001e000009947 */
/* 0x000fea0003800000 */
/*03e0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */
/* 0x000fe200078e00ff */
/*03f0*/ SHF.R.S32.HI R9, RZ, 0x1f, R5 ; /* 0x0000001fff097819 */
/* 0x000fe20000011405 */
/*0400*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e0008 */
/*0410*/ IADD3 R4, P1, R5.reuse, c[0x0][0x170], RZ ; /* 0x00005c0005047a10 */
/* 0x040fe20007f3e0ff */
/*0420*/ IMAD.WIDE R6, R5.reuse, R6, c[0x0][0x180] ; /* 0x0000600005067625 */
/* 0x040fe200078e0206 */
/*0430*/ IADD3 R10, P2, R5, c[0x0][0x178], RZ ; /* 0x00005e00050a7a10 */
/* 0x000fe40007f5e0ff */
/*0440*/ IADD3.X R15, R9.reuse, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d00090f7a10 */
/* 0x040fe20000ffe4ff */
/*0450*/ IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff007224 */
/* 0x000fe200078e0006 */
/*0460*/ IADD3.X R11, R9, c[0x0][0x17c], RZ, P2, !PT ; /* 0x00005f00090b7a10 */
/* 0x000fca00017fe4ff */
/*0470*/ LDG.E.U8 R6, [R10.64] ; /* 0x000000240a067981 */
/* 0x000ea4000c1e1100 */
/*0480*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x004fda0003f25270 */
/*0490*/ @!P1 LDG.E R6, [R2.64] ; /* 0x0000002402069981 */
/* 0x000ea2000c1e1900 */
/*04a0*/ IADD3 R12, R12, -0x1, RZ ; /* 0xffffffff0c0c7810 */
/* 0x000fe20007ffe0ff */
/*04b0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1 ; /* 0x00000001ff0e7424 */
/* 0x002fe200078e00ff */
/*04c0*/ IADD3 R10, P3, R10, 0x1, RZ ; /* 0x000000010a0a7810 */
/* 0x000fe20007f7e0ff */
/*04d0*/ @!P1 IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff089224 */
/* 0x000fe200078e0004 */
/*04e0*/ ISETP.NE.AND P4, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */
/* 0x000fe20003f85270 */
/*04f0*/ @!P1 IMAD.MOV.U32 R9, RZ, RZ, R15 ; /* 0x000000ffff099224 */
/* 0x000fe200078e000f */
/*0500*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */
/* 0x000fe20007ffe0ff */
/*0510*/ IMAD.X R11, RZ, RZ, R11, P3 ; /* 0x000000ffff0b7224 */
/* 0x000fe200018e060b */
/*0520*/ @!P1 IADD3 R13, R6, 0x1, RZ ; /* 0x00000001060d9810 */
/* 0x004fe20007ffe0ff */
/*0530*/ @!P1 IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff069224 */
/* 0x000fe200078e0000 */
/*0540*/ IADD3 R0, P2, R0, 0x4, RZ ; /* 0x0000000400007810 */
/* 0x000fc80007f5e0ff */
/*0550*/ @!P1 STG.E [R6.64], R13 ; /* 0x0000000d06009986 */
/* 0x0001e8000c101924 */
/*0560*/ @!P1 STG.E.U8 [R8.64], R14 ; /* 0x0000000e08009986 */
/* 0x0003e8000c101124 */
/*0570*/ @!P1 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16009986 */
/* 0x0003e2000c101124 */
/*0580*/ IADD3 R4, P1, R4, 0x1, RZ ; /* 0x0000000104047810 */
/* 0x000fe20007f3e0ff */
/*0590*/ IMAD.X R7, RZ, RZ, R7, P2 ; /* 0x000000ffff077224 */
/* 0x001fc800010e0607 */
/*05a0*/ IMAD.X R15, RZ, RZ, R15, P1 ; /* 0x000000ffff0f7224 */
/* 0x000fe200008e060f */
/*05b0*/ @P4 BRA 0x470 ; /* 0xfffffeb000004947 */
/* 0x000fea000383ffff */
/*05c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*05d0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*05e0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */
/* 0x000fe200078e00ff */
/*05f0*/ IADD3 R4, P0, R5.reuse, c[0x0][0x178], RZ ; /* 0x00005e0005047a10 */
/* 0x040fe20007f1e0ff */
/*0600*/ IMAD.MOV.U32 R0, RZ, RZ, R5.reuse ; /* 0x000000ffff007224 */
/* 0x100fe200078e0005 */
/*0610*/ SHF.R.S32.HI R13, RZ, 0x1f, R5 ; /* 0x0000001fff0d7819 */
/* 0x000fe20000011405 */
/*0620*/ IMAD.WIDE R6, R5, R6, c[0x0][0x180] ; /* 0x0000600005067625 */
/* 0x000fc800078e0206 */
/*0630*/ IMAD.MOV.U32 R19, RZ, RZ, R7 ; /* 0x000000ffff137224 */
/* 0x000fe200078e0007 */
/*0640*/ IADD3.X R7, R13, c[0x0][0x17c], RZ, P0, !PT ; /* 0x00005f000d077a10 */
/* 0x000fe200007fe4ff */
/*0650*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */
/* 0x000fe400078e0006 */
/*0660*/ IMAD.MOV.U32 R6, RZ, RZ, R4 ; /* 0x000000ffff067224 */
/* 0x000fca00078e0004 */
/*0670*/ LDG.E.U8 R4, [R6.64] ; /* 0x0000002406047981 */
/* 0x000ea4000c1e1100 */
/*0680*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f05270 */
/*0690*/ @!P0 LDG.E R4, [R2.64] ; /* 0x0000002402048981 */
/* 0x000ea2000c1e1900 */
/*06a0*/ IADD3 R8, P1, R25, R0, RZ ; /* 0x0000000019087210 */
/* 0x002fe20007f3e0ff */
/*06b0*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */
/* 0x000fe400078e000c */
/*06c0*/ IMAD.MOV.U32 R11, RZ, RZ, R19 ; /* 0x000000ffff0b7224 */
/* 0x000fe400078e0013 */
/*06d0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1 ; /* 0x00000001ff0e7424 */
/* 0x000fe400078e00ff */
/*06e0*/ IMAD.X R9, R13, 0x1, R24, P1 ; /* 0x000000010d097824 */
/* 0x000fe200008e0618 */
/*06f0*/ @!P0 IADD3 R15, R4, 0x1, RZ ; /* 0x00000001040f8810 */
/* 0x004fca0007ffe0ff */
/*0700*/ @!P0 STG.E [R10.64], R15 ; /* 0x0000000f0a008986 */
/* 0x0001e8000c101924 */
/*0710*/ @!P0 STG.E.U8 [R8.64], R14 ; /* 0x0000000e08008986 */
/* 0x000fe8000c101124 */
/*0720*/ @!P0 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16008986 */
/* 0x000fe8000c101124 */
/*0730*/ LDG.E.U8 R4, [R6.64+0x1] ; /* 0x0000012406047981 */
/* 0x000ea4000c1e1100 */
/*0740*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x004fda0003f05270 */
/*0750*/ @!P0 LDG.E R4, [R2.64] ; /* 0x0000002402048981 */
/* 0x000ea2000c1e1900 */
/*0760*/ IMAD.MOV.U32 R12, RZ, RZ, 0x1 ; /* 0x00000001ff0c7424 */
/* 0x000fe200078e00ff */
/*0770*/ @!P0 IADD3 R17, R4, 0x1, RZ ; /* 0x0000000104118810 */
/* 0x004fca0007ffe0ff */
/*0780*/ @!P0 STG.E [R10.64+0x4], R17 ; /* 0x000004110a008986 */
/* 0x000fe8000c101924 */
/*0790*/ @!P0 STG.E.U8 [R8.64+0x1], R12 ; /* 0x0000010c08008986 */
/* 0x0003e8000c101124 */
/*07a0*/ @!P0 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16008986 */
/* 0x0005e8000c101124 */
/*07b0*/ LDG.E.U8 R4, [R6.64+0x2] ; /* 0x0000022406047981 */
/* 0x000ee4000c1e1100 */
/*07c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x008fda0003f05270 */
/*07d0*/ @!P0 LDG.E R4, [R2.64] ; /* 0x0000002402048981 */
/* 0x000e24000c1e1900 */
/*07e0*/ @!P0 IADD3 R15, R4, 0x1, RZ ; /* 0x00000001040f8810 */
/* 0x001fca0007ffe0ff */
/*07f0*/ @!P0 STG.E [R10.64+0x8], R15 ; /* 0x0000080f0a008986 */
/* 0x0005e8000c101924 */
/*0800*/ @!P0 STG.E.U8 [R8.64+0x2], R14 ; /* 0x0000020e08008986 */
/* 0x0005e8000c101124 */
/*0810*/ @!P0 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16008986 */
/* 0x0005e8000c101124 */
/*0820*/ LDG.E.U8 R4, [R6.64+0x3] ; /* 0x0000032406047981 */
/* 0x000ee4000c1e1100 */
/*0830*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x008fda0003f05270 */
/*0840*/ @!P0 LDG.E R4, [R2.64] ; /* 0x0000002402048981 */
/* 0x000ee2000c1e1900 */
/*0850*/ IMAD.MOV.U32 R16, RZ, RZ, 0x1 ; /* 0x00000001ff107424 */
/* 0x000fe200078e00ff */
/*0860*/ IADD3 R5, R5, 0x4, RZ ; /* 0x0000000405057810 */
/* 0x000fe40007ffe0ff */
/*0870*/ IADD3 R25, P2, R25, 0x4, RZ ; /* 0x0000000419197810 */
/* 0x000fe40007f5e0ff */
/*0880*/ IADD3 R12, P3, R10, 0x10, RZ ; /* 0x000000100a0c7810 */
/* 0x002fc60007f7e0ff */
/*0890*/ IMAD.X R24, RZ, RZ, R24, P2 ; /* 0x000000ffff187224 */
/* 0x000fe400010e0618 */
/*08a0*/ IMAD.X R19, RZ, RZ, R11, P3 ; /* 0x000000ffff137224 */
/* 0x000fe200018e060b */
/*08b0*/ @!P0 IADD3 R17, R4, 0x1, RZ ; /* 0x0000000104118810 */
/* 0x008fe40007ffe0ff */
/*08c0*/ IADD3 R4, P1, R6, 0x4, RZ ; /* 0x0000000406047810 */
/* 0x000fc60007f3e0ff */
/*08d0*/ @!P0 STG.E [R10.64+0xc], R17 ; /* 0x00000c110a008986 */
/* 0x0005e4000c101924 */
/*08e0*/ IMAD.X R7, RZ, RZ, R7, P1 ; /* 0x000000ffff077224 */
/* 0x000fe400008e0607 */
/*08f0*/ @!P0 STG.E.U8 [R8.64+0x3], R16 ; /* 0x0000031008008986 */
/* 0x0005e8000c101124 */
/*0900*/ @!P0 STG.E.U8 [R22.64], RZ ; /* 0x000000ff16008986 */
/* 0x0005e2000c101124 */
/*0910*/ ISETP.GE.AND P0, PT, R5, R26, PT ; /* 0x0000001a0500720c */
/* 0x000fda0003f06270 */
/*0920*/ @!P0 BRA 0x660 ; /* 0xfffffd3000008947 */
/* 0x004fea000383ffff */
/*0930*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0940*/ BRA 0x940; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0950*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0960*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0970*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0980*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0990*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*09f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <stdio.h>
#include <memory.h>
#include <string.h>
#include <math.h>
#define VCOUNT 5
#define ECOUNT 12
/*
0 - -- - 1
- -
- -
2
- -
- -
3 - -- - 4
*/
bool frontierNotEmpty(bool* pFrontier, const int size);
void print(bool* p, const int size, const int unit);
__global__ void bfs_kernel(int* pV,
int* pE,
bool* pF,
bool* pX,
int* pC,
const int vcount,
const int ecount,
bool* done)
{
const int tid = threadIdx.x + blockIdx.x * blockDim.x;
// printf("tid = %d\n", tid);
if (tid > VCOUNT) { *done = false; }
// printf("done = %d\n", *done);
if (pF[tid] == true && pX[tid] == false)
{
printf("tid = %d\n", tid);
pF[tid] = false;
pX[tid] = true;
__syncthreads();
const int nidStart = pV[tid];
int nidEnd = -1;
if (tid >= vcount)
{
nidEnd = pV[tid + 1];
}
else
{
nidEnd = ecount;
}
// printf("nidStart = %d\n", nidStart);
// printf("nidEnd = %d\n", nidEnd);
for (int nid = nidStart; nid < nidEnd; ++nid)
{
if (!pX[nid])
{
pC[nid] = pC[tid] + 1;
pF[nid] = true;
*done = false;
}
}
}
}
int main()
{
// Allocate space for vertex, edge, frontier, visit and cost arrays
int* pVertices = new int[VCOUNT];
int* pEdges = new int[ECOUNT];
bool* pFrontier = new bool[VCOUNT];
bool* pVisited = new bool[VCOUNT];
int* pCost = new int[VCOUNT];
// Initialize arrays
for (int i = 0; i < VCOUNT; ++i)
{
pVertices[i] = i;
pFrontier[i] = false;
pVisited[i] = false;
pCost[i] = INT_MAX;
}
pEdges[0] = 1; pEdges[1] = 2;
pEdges[2] = 0; pEdges[3] = 2;
pEdges[4] = 0; pEdges[5] = 1; pEdges[6] = 3; pEdges[7] = 4;
pEdges[8] = 2; pEdges[9] = 4;
pEdges[10] = 2; pEdges[11] = 3;
int* d_pVertices;
int* d_pEdges;
bool* d_pFrontier;
bool* d_pVisited;
int* d_pCost;
cudaMalloc((void **)&d_pVertices, sizeof(int) * VCOUNT);
cudaMalloc((void **)&d_pEdges, sizeof(int) * ECOUNT);
cudaMalloc((void **)&d_pFrontier, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pVisited, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pCost, sizeof(int) * VCOUNT);
int source = 2;
pFrontier[source] = true;
pCost[source] = 0;
cudaMemcpy(d_pVertices, pVertices, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pEdges, pEdges, sizeof(int) * ECOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pFrontier, pFrontier, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pVisited, pVisited, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pCost, pCost, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
// Actual algorithm code goes here
int count = 0;
bool done = true;
bool* d_done;
cudaMalloc((void**)&d_done, sizeof(bool));
do
{
++count;
done = true;
cudaMemcpy(d_done, &done, sizeof(bool), cudaMemcpyHostToDevice);
bfs_kernel<<<1, VCOUNT>>>(d_pVertices,
d_pEdges,
d_pFrontier,
d_pVisited,
d_pCost,
VCOUNT,
ECOUNT,
d_done);
cudaMemcpy(&done, d_done, sizeof(bool), cudaMemcpyDeviceToHost);
} while(!done);
std::cout << "count: " << count << std::endl;
delete pVertices;
delete pEdges;
delete pFrontier;
delete pVisited;
delete pCost;
cudaFree(d_pVertices);
cudaFree(d_pEdges);
cudaFree(d_pFrontier);
cudaFree(d_pVisited);
cudaFree(d_pCost);
return 0;
}
bool frontierNotEmpty(bool* pFrontier, const int size)
{
for (int i = 0; i < size; ++i) if (pFrontier[i]) return true;
return false;
}
void print(bool* p, const int size, const int unit)
{
for (int i = 0; i < size; ++i)
{
std::cout << p[i] << ' ';
}
std::cout << std::endl;
} | .file "tmpxft_0014e2d9_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3674:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z16frontierNotEmptyPbi
.type _Z16frontierNotEmptyPbi, @function
_Z16frontierNotEmptyPbi:
.LFB3670:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L6
movq %rdi, %rax
movslq %esi, %rsi
addq %rsi, %rdi
.L5:
movzbl (%rax), %edx
testb %dl, %dl
jne .L3
addq $1, %rax
cmpq %rdi, %rax
jne .L5
.L3:
movl %edx, %eax
ret
.L6:
movl $0, %edx
jmp .L3
.cfi_endproc
.LFE3670:
.size _Z16frontierNotEmptyPbi, .-_Z16frontierNotEmptyPbi
.globl _Z5printPbii
.type _Z5printPbii, @function
_Z5printPbii:
.LFB3671:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $16, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
testl %esi, %esi
jle .L9
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi), %rbp
leaq _ZSt4cout(%rip), %r12
jmp .L12
.L10:
movl $32, %esi
call _ZNSo3putEc@PLT
.L11:
addq $1, %rbx
cmpq %rbp, %rbx
je .L9
.L12:
movzbl (%rbx), %esi
movq %r12, %rdi
call _ZNSo9_M_insertIbEERSoT_@PLT
movq %rax, %rdi
movb $32, 7(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rdi,%rax)
je .L10
leaq 7(%rsp), %rsi
movl $1, %edx
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L11
.L9:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
leaq _ZSt4cout(%rip), %rdx
movq 240(%rdx,%rax), %rbx
testq %rbx, %rbx
je .L20
cmpb $0, 56(%rbx)
je .L15
movzbl 67(%rbx), %esi
.L16:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L21
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L22
call _ZSt16__throw_bad_castv@PLT
.L22:
call __stack_chk_fail@PLT
.L15:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3671:
.size _Z5printPbii, .-_Z5printPbii
.globl _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
.type _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_, @function
_Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_:
.LFB3696:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movl %r9d, 20(%rsp)
movq 232(%rsp), %rax
movq %rax, 8(%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 20(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L27
.L23:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L28
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z10bfs_kernelPiS_PbS0_S_iiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L23
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3696:
.size _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_, .-_Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
.globl _Z10bfs_kernelPiS_PbS0_S_iiS0_
.type _Z10bfs_kernelPiS_PbS0_S_iiS0_, @function
_Z10bfs_kernelPiS_PbS0_S_iiS0_:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 24(%rsp)
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _Z10bfs_kernelPiS_PbS0_S_iiS0_, .-_Z10bfs_kernelPiS_PbS0_S_iiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "count: "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $20, %edi
call _Znam@PLT
movq %rax, %r15
movl $48, %edi
call _Znam@PLT
movq %rax, %r12
movl $5, %edi
call _Znam@PLT
movq %rax, %r14
movl $5, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $20, %edi
call _Znam@PLT
movq %rax, %r13
movl $0, %eax
.L32:
movl %eax, (%r15,%rax,4)
movb $0, (%r14,%rax)
movq 8(%rsp), %rbx
movb $0, (%rbx,%rax)
movl $2147483647, 0(%r13,%rax,4)
addq $1, %rax
cmpq $5, %rax
jne .L32
movl $1, (%r12)
movl $2, 4(%r12)
movl $0, 8(%r12)
movl $2, 12(%r12)
movl $0, 16(%r12)
movl $1, 20(%r12)
movl $3, 24(%r12)
movl $4, 28(%r12)
movl $2, 32(%r12)
movl $4, 36(%r12)
movl $2, 40(%r12)
movl $3, 44(%r12)
leaq 32(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $48, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $5, %esi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $5, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
movb $1, 2(%r14)
movl $0, 8(%r13)
movl $1, %ecx
movl $20, %edx
movq %r15, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $48, %edx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $5, %edx
movq %r14, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $5, %edx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $20, %edx
movq %r13, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movb $1, 31(%rsp)
leaq 72(%rsp), %rdi
movl $1, %esi
call cudaMalloc@PLT
movl $0, %ebx
leaq 31(%rsp), %rbp
jmp .L34
.L33:
movl $2, %ecx
movl $1, %edx
movq 72(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
cmpb $0, 31(%rsp)
jne .L39
.L34:
addl $1, %ebx
movb $1, 31(%rsp)
movl $1, %ecx
movl $1, %edx
movq %rbp, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
movl $5, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movl $1, %ecx
movq 80(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L33
pushq 72(%rsp)
.cfi_def_cfa_offset 184
pushq $12
.cfi_def_cfa_offset 192
movl $5, %r9d
movq 80(%rsp), %r8
movq 72(%rsp), %rcx
movq 64(%rsp), %rdx
movq 56(%rsp), %rsi
movq 48(%rsp), %rdi
call _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L33
.L39:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $4, %esi
movq %r15, %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq %r12, %rdi
call _ZdlPvm@PLT
movl $1, %esi
movq %r14, %rdi
call _ZdlPvm@PLT
movl $1, %esi
movq 8(%rsp), %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq %r13, %rdi
call _ZdlPvm@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 64(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L40
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L40:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "_Z10bfs_kernelPiS_PbS0_S_iiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3699:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10bfs_kernelPiS_PbS0_S_iiS0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3699:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <stdio.h>
#include <memory.h>
#include <string.h>
#include <math.h>
#define VCOUNT 5
#define ECOUNT 12
/*
0 - -- - 1
- -
- -
2
- -
- -
3 - -- - 4
*/
bool frontierNotEmpty(bool* pFrontier, const int size);
void print(bool* p, const int size, const int unit);
__global__ void bfs_kernel(int* pV,
int* pE,
bool* pF,
bool* pX,
int* pC,
const int vcount,
const int ecount,
bool* done)
{
const int tid = threadIdx.x + blockIdx.x * blockDim.x;
// printf("tid = %d\n", tid);
if (tid > VCOUNT) { *done = false; }
// printf("done = %d\n", *done);
if (pF[tid] == true && pX[tid] == false)
{
printf("tid = %d\n", tid);
pF[tid] = false;
pX[tid] = true;
__syncthreads();
const int nidStart = pV[tid];
int nidEnd = -1;
if (tid >= vcount)
{
nidEnd = pV[tid + 1];
}
else
{
nidEnd = ecount;
}
// printf("nidStart = %d\n", nidStart);
// printf("nidEnd = %d\n", nidEnd);
for (int nid = nidStart; nid < nidEnd; ++nid)
{
if (!pX[nid])
{
pC[nid] = pC[tid] + 1;
pF[nid] = true;
*done = false;
}
}
}
}
int main()
{
// Allocate space for vertex, edge, frontier, visit and cost arrays
int* pVertices = new int[VCOUNT];
int* pEdges = new int[ECOUNT];
bool* pFrontier = new bool[VCOUNT];
bool* pVisited = new bool[VCOUNT];
int* pCost = new int[VCOUNT];
// Initialize arrays
for (int i = 0; i < VCOUNT; ++i)
{
pVertices[i] = i;
pFrontier[i] = false;
pVisited[i] = false;
pCost[i] = INT_MAX;
}
pEdges[0] = 1; pEdges[1] = 2;
pEdges[2] = 0; pEdges[3] = 2;
pEdges[4] = 0; pEdges[5] = 1; pEdges[6] = 3; pEdges[7] = 4;
pEdges[8] = 2; pEdges[9] = 4;
pEdges[10] = 2; pEdges[11] = 3;
int* d_pVertices;
int* d_pEdges;
bool* d_pFrontier;
bool* d_pVisited;
int* d_pCost;
cudaMalloc((void **)&d_pVertices, sizeof(int) * VCOUNT);
cudaMalloc((void **)&d_pEdges, sizeof(int) * ECOUNT);
cudaMalloc((void **)&d_pFrontier, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pVisited, sizeof(bool) * VCOUNT);
cudaMalloc((void **)&d_pCost, sizeof(int) * VCOUNT);
int source = 2;
pFrontier[source] = true;
pCost[source] = 0;
cudaMemcpy(d_pVertices, pVertices, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pEdges, pEdges, sizeof(int) * ECOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pFrontier, pFrontier, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pVisited, pVisited, sizeof(bool) * VCOUNT, cudaMemcpyHostToDevice);
cudaMemcpy(d_pCost, pCost, sizeof(int) * VCOUNT, cudaMemcpyHostToDevice);
// Actual algorithm code goes here
int count = 0;
bool done = true;
bool* d_done;
cudaMalloc((void**)&d_done, sizeof(bool));
do
{
++count;
done = true;
cudaMemcpy(d_done, &done, sizeof(bool), cudaMemcpyHostToDevice);
bfs_kernel<<<1, VCOUNT>>>(d_pVertices,
d_pEdges,
d_pFrontier,
d_pVisited,
d_pCost,
VCOUNT,
ECOUNT,
d_done);
cudaMemcpy(&done, d_done, sizeof(bool), cudaMemcpyDeviceToHost);
} while(!done);
std::cout << "count: " << count << std::endl;
delete pVertices;
delete pEdges;
delete pFrontier;
delete pVisited;
delete pCost;
cudaFree(d_pVertices);
cudaFree(d_pEdges);
cudaFree(d_pFrontier);
cudaFree(d_pVisited);
cudaFree(d_pCost);
return 0;
}
bool frontierNotEmpty(bool* pFrontier, const int size)
{
for (int i = 0; i < size; ++i) if (pFrontier[i]) return true;
return false;
}
void print(bool* p, const int size, const int unit)
{
for (int i = 0; i < size; ++i)
{
std::cout << p[i] << ' ';
}
std::cout << std::endl;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <memory.h>
#include <string.h>
#include <math.h>
#define VCOUNT 5
#define ECOUNT 12
/*
0 - -- - 1
- -
- -
2
- -
- -
3 - -- - 4
*/
bool frontierNotEmpty(bool* pFrontier, const int size);
void print(bool* p, const int size, const int unit);
__global__ void bfs_kernel(int* pV,
int* pE,
bool* pF,
bool* pX,
int* pC,
const int vcount,
const int ecount,
bool* done)
{
const int tid = threadIdx.x + blockIdx.x * blockDim.x;
// printf("tid = %d\n", tid);
if (tid > VCOUNT) { *done = false; }
// printf("done = %d\n", *done);
if (pF[tid] == true && pX[tid] == false)
{
printf("tid = %d\n", tid);
pF[tid] = false;
pX[tid] = true;
__syncthreads();
const int nidStart = pV[tid];
int nidEnd = -1;
if (tid >= vcount)
{
nidEnd = pV[tid + 1];
}
else
{
nidEnd = ecount;
}
// printf("nidStart = %d\n", nidStart);
// printf("nidEnd = %d\n", nidEnd);
for (int nid = nidStart; nid < nidEnd; ++nid)
{
if (!pX[nid])
{
pC[nid] = pC[tid] + 1;
pF[nid] = true;
*done = false;
}
}
}
}
int main()
{
// Allocate space for vertex, edge, frontier, visit and cost arrays
int* pVertices = new int[VCOUNT];
int* pEdges = new int[ECOUNT];
bool* pFrontier = new bool[VCOUNT];
bool* pVisited = new bool[VCOUNT];
int* pCost = new int[VCOUNT];
// Initialize arrays
for (int i = 0; i < VCOUNT; ++i)
{
pVertices[i] = i;
pFrontier[i] = false;
pVisited[i] = false;
pCost[i] = INT_MAX;
}
pEdges[0] = 1; pEdges[1] = 2;
pEdges[2] = 0; pEdges[3] = 2;
pEdges[4] = 0; pEdges[5] = 1; pEdges[6] = 3; pEdges[7] = 4;
pEdges[8] = 2; pEdges[9] = 4;
pEdges[10] = 2; pEdges[11] = 3;
int* d_pVertices;
int* d_pEdges;
bool* d_pFrontier;
bool* d_pVisited;
int* d_pCost;
hipMalloc((void **)&d_pVertices, sizeof(int) * VCOUNT);
hipMalloc((void **)&d_pEdges, sizeof(int) * ECOUNT);
hipMalloc((void **)&d_pFrontier, sizeof(bool) * VCOUNT);
hipMalloc((void **)&d_pVisited, sizeof(bool) * VCOUNT);
hipMalloc((void **)&d_pCost, sizeof(int) * VCOUNT);
int source = 2;
pFrontier[source] = true;
pCost[source] = 0;
hipMemcpy(d_pVertices, pVertices, sizeof(int) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pEdges, pEdges, sizeof(int) * ECOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pFrontier, pFrontier, sizeof(bool) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pVisited, pVisited, sizeof(bool) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pCost, pCost, sizeof(int) * VCOUNT, hipMemcpyHostToDevice);
// Actual algorithm code goes here
int count = 0;
bool done = true;
bool* d_done;
hipMalloc((void**)&d_done, sizeof(bool));
do
{
++count;
done = true;
hipMemcpy(d_done, &done, sizeof(bool), hipMemcpyHostToDevice);
bfs_kernel<<<1, VCOUNT>>>(d_pVertices,
d_pEdges,
d_pFrontier,
d_pVisited,
d_pCost,
VCOUNT,
ECOUNT,
d_done);
hipMemcpy(&done, d_done, sizeof(bool), hipMemcpyDeviceToHost);
} while(!done);
std::cout << "count: " << count << std::endl;
delete pVertices;
delete pEdges;
delete pFrontier;
delete pVisited;
delete pCost;
hipFree(d_pVertices);
hipFree(d_pEdges);
hipFree(d_pFrontier);
hipFree(d_pVisited);
hipFree(d_pCost);
return 0;
}
bool frontierNotEmpty(bool* pFrontier, const int size)
{
for (int i = 0; i < size; ++i) if (pFrontier[i]) return true;
return false;
}
void print(bool* p, const int size, const int unit)
{
for (int i = 0; i < size; ++i)
{
std::cout << p[i] << ' ';
}
std::cout << std::endl;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <memory.h>
#include <string.h>
#include <math.h>
#define VCOUNT 5
#define ECOUNT 12
/*
0 - -- - 1
- -
- -
2
- -
- -
3 - -- - 4
*/
bool frontierNotEmpty(bool* pFrontier, const int size);
void print(bool* p, const int size, const int unit);
__global__ void bfs_kernel(int* pV,
int* pE,
bool* pF,
bool* pX,
int* pC,
const int vcount,
const int ecount,
bool* done)
{
const int tid = threadIdx.x + blockIdx.x * blockDim.x;
// printf("tid = %d\n", tid);
if (tid > VCOUNT) { *done = false; }
// printf("done = %d\n", *done);
if (pF[tid] == true && pX[tid] == false)
{
printf("tid = %d\n", tid);
pF[tid] = false;
pX[tid] = true;
__syncthreads();
const int nidStart = pV[tid];
int nidEnd = -1;
if (tid >= vcount)
{
nidEnd = pV[tid + 1];
}
else
{
nidEnd = ecount;
}
// printf("nidStart = %d\n", nidStart);
// printf("nidEnd = %d\n", nidEnd);
for (int nid = nidStart; nid < nidEnd; ++nid)
{
if (!pX[nid])
{
pC[nid] = pC[tid] + 1;
pF[nid] = true;
*done = false;
}
}
}
}
int main()
{
// Allocate space for vertex, edge, frontier, visit and cost arrays
int* pVertices = new int[VCOUNT];
int* pEdges = new int[ECOUNT];
bool* pFrontier = new bool[VCOUNT];
bool* pVisited = new bool[VCOUNT];
int* pCost = new int[VCOUNT];
// Initialize arrays
for (int i = 0; i < VCOUNT; ++i)
{
pVertices[i] = i;
pFrontier[i] = false;
pVisited[i] = false;
pCost[i] = INT_MAX;
}
pEdges[0] = 1; pEdges[1] = 2;
pEdges[2] = 0; pEdges[3] = 2;
pEdges[4] = 0; pEdges[5] = 1; pEdges[6] = 3; pEdges[7] = 4;
pEdges[8] = 2; pEdges[9] = 4;
pEdges[10] = 2; pEdges[11] = 3;
int* d_pVertices;
int* d_pEdges;
bool* d_pFrontier;
bool* d_pVisited;
int* d_pCost;
hipMalloc((void **)&d_pVertices, sizeof(int) * VCOUNT);
hipMalloc((void **)&d_pEdges, sizeof(int) * ECOUNT);
hipMalloc((void **)&d_pFrontier, sizeof(bool) * VCOUNT);
hipMalloc((void **)&d_pVisited, sizeof(bool) * VCOUNT);
hipMalloc((void **)&d_pCost, sizeof(int) * VCOUNT);
int source = 2;
pFrontier[source] = true;
pCost[source] = 0;
hipMemcpy(d_pVertices, pVertices, sizeof(int) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pEdges, pEdges, sizeof(int) * ECOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pFrontier, pFrontier, sizeof(bool) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pVisited, pVisited, sizeof(bool) * VCOUNT, hipMemcpyHostToDevice);
hipMemcpy(d_pCost, pCost, sizeof(int) * VCOUNT, hipMemcpyHostToDevice);
// Actual algorithm code goes here
int count = 0;
bool done = true;
bool* d_done;
hipMalloc((void**)&d_done, sizeof(bool));
do
{
++count;
done = true;
hipMemcpy(d_done, &done, sizeof(bool), hipMemcpyHostToDevice);
bfs_kernel<<<1, VCOUNT>>>(d_pVertices,
d_pEdges,
d_pFrontier,
d_pVisited,
d_pCost,
VCOUNT,
ECOUNT,
d_done);
hipMemcpy(&done, d_done, sizeof(bool), hipMemcpyDeviceToHost);
} while(!done);
std::cout << "count: " << count << std::endl;
delete pVertices;
delete pEdges;
delete pFrontier;
delete pVisited;
delete pCost;
hipFree(d_pVertices);
hipFree(d_pEdges);
hipFree(d_pFrontier);
hipFree(d_pVisited);
hipFree(d_pCost);
return 0;
}
bool frontierNotEmpty(bool* pFrontier, const int size)
{
for (int i = 0; i < size; ++i) if (pFrontier[i]) return true;
return false;
}
void print(bool* p, const int size, const int unit)
{
for (int i = 0; i < size; ++i)
{
std::cout << p[i] << ' ';
}
std::cout << std::endl;
} | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_ # -- Begin function _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.p2align 4, 0x90
.type _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_,@function
_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_: # @_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movl %r9d, 4(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_, .Lfunc_end0-_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 2 # 0x2
.long 0 # 0x0
.long 2 # 0x2
.LCPI1_1:
.long 0 # 0x0
.long 1 # 0x1
.long 3 # 0x3
.long 4 # 0x4
.LCPI1_2:
.long 2 # 0x2
.long 4 # 0x4
.long 2 # 0x2
.long 3 # 0x3
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 320
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $20, %edi
callq _Znam
movq %rax, %rbx
movl $48, %edi
callq _Znam
movq %rax, %r14
movl $5, %edi
callq _Znam
movq %rax, %r15
movl $5, %edi
callq _Znam
movq %rax, %r12
movl $20, %edi
callq _Znam
movq %rax, %r13
movl $0, (%r15)
movb $0, 4(%r15)
movb $0, 4(%r12)
movl $0, (%r12)
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, (%rbx,%rax,4)
movl $2147483647, (%r13,%rax,4) # imm = 0x7FFFFFFF
incq %rax
cmpq $5, %rax
jne .LBB1_1
# %bb.2:
movabsq $4294967297, %rbp # imm = 0x100000001
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,2,0,2]
movups %xmm0, (%r14)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [0,1,3,4]
movups %xmm0, 16(%r14)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [2,4,2,3]
movups %xmm0, 32(%r14)
leaq 56(%rsp), %rdi
movl $20, %esi
callq hipMalloc
leaq 48(%rsp), %rdi
movl $48, %esi
callq hipMalloc
leaq 40(%rsp), %rdi
movl $5, %esi
callq hipMalloc
leaq 32(%rsp), %rdi
movl $5, %esi
callq hipMalloc
leaq 24(%rsp), %rdi
movl $20, %esi
callq hipMalloc
movb $1, 2(%r15)
movl $0, 8(%r13)
movq 56(%rsp), %rdi
movl $20, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $48, %edx
movq %r14, 88(%rsp) # 8-byte Spill
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $5, %edx
movq %r15, 80(%rsp) # 8-byte Spill
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 32(%rsp), %rdi
movl $5, %edx
movq %r12, 72(%rsp) # 8-byte Spill
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $20, %edx
movq %r13, %rsi
movl $1, %ecx
callq hipMemcpy
movb $1, 15(%rsp)
leaq 16(%rsp), %rdi
movl $1, %esi
callq hipMalloc
xorl %r12d, %r12d
leaq 15(%rsp), %r14
leaq 4(%rbp), %r15
jmp .LBB1_3
.p2align 4, 0x90
.LBB1_5: # in Loop: Header=BB1_3 Depth=1
movq 16(%rsp), %rsi
movl $1, %edx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
incl %r12d
cmpb $0, 15(%rsp)
jne .LBB1_6
.LBB1_3: # =>This Inner Loop Header: Depth=1
movb $1, 15(%rsp)
movq 16(%rsp), %rdi
movl $1, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq %rbp, %rdi
movl $1, %esi
movq %r15, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4: # in Loop: Header=BB1_3 Depth=1
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
movq 16(%rsp), %r8
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
movq %rsi, 160(%rsp)
movq %rdi, 152(%rsp)
movl $5, 68(%rsp)
movl $12, 64(%rsp)
movq %r8, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 160(%rsp), %rax
movq %rax, 216(%rsp)
leaq 152(%rsp), %rax
movq %rax, 224(%rsp)
leaq 68(%rsp), %rax
movq %rax, 232(%rsp)
leaq 64(%rsp), %rax
movq %rax, 240(%rsp)
leaq 144(%rsp), %rax
movq %rax, 248(%rsp)
leaq 128(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %edi
leaq 192(%rsp), %r9
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB1_5
.LBB1_6:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $7, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r12d, %esi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r14
testq %r14, %r14
je .LBB1_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
movq 80(%rsp), %r12 # 8-byte Reload
je .LBB1_9
# %bb.8:
movzbl 67(%r14), %ecx
jmp .LBB1_10
.LBB1_9:
movq %r14, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB1_10: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq %rbx, %rdi
callq _ZdlPv
movq 88(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %r12, %rdi
callq _ZdlPv
movq 72(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %r13, %rdi
callq _ZdlPv
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_11:
.cfi_def_cfa_offset 320
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z16frontierNotEmptyPbi # -- Begin function _Z16frontierNotEmptyPbi
.p2align 4, 0x90
.type _Z16frontierNotEmptyPbi,@function
_Z16frontierNotEmptyPbi: # @_Z16frontierNotEmptyPbi
.cfi_startproc
# %bb.0:
testl %esi, %esi
setg %al
jle .LBB2_6
# %bb.1: # %.lr.ph.preheader
cmpb $0, (%rdi)
je .LBB2_2
.LBB2_6: # %._crit_edge
retq
.LBB2_2: # %.lr.ph16.preheader
movl %esi, %eax
movl $1, %edx
.p2align 4, 0x90
.LBB2_3: # %.lr.ph16
# =>This Inner Loop Header: Depth=1
movq %rdx, %rcx
cmpq %rdx, %rax
je .LBB2_5
# %bb.4: # %.lr.ph
# in Loop: Header=BB2_3 Depth=1
leaq 1(%rcx), %rdx
cmpb $0, (%rdi,%rcx)
je .LBB2_3
.LBB2_5: # %._crit_edge.loopexit
cmpq %rax, %rcx
setb %al
retq
.Lfunc_end2:
.size _Z16frontierNotEmptyPbi, .Lfunc_end2-_Z16frontierNotEmptyPbi
.cfi_endproc
# -- End function
.globl _Z5printPbii # -- Begin function _Z5printPbii
.p2align 4, 0x90
.type _Z5printPbii,@function
_Z5printPbii: # @_Z5printPbii
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %esi, %esi
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
movq %rdi, %rbx
movl %esi, %r15d
xorl %r12d, %r12d
leaq 7(%rsp), %r14
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_9: # in Loop: Header=BB3_2 Depth=1
movq %rax, %rdi
movl $32, %esi
callq _ZNSo3putEc
.LBB3_10: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
# in Loop: Header=BB3_2 Depth=1
incq %r12
cmpq %r12, %r15
je .LBB3_4
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movzbl (%rbx,%r12), %esi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIbEERSoT_
movb $32, 7(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_9
# %bb.3: # in Loop: Header=BB3_2 Depth=1
movl $1, %edx
movq %rax, %rdi
movq %r14, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB3_10
.LBB3_4: # %._crit_edge
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB3_11
# %bb.5: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB3_7
# %bb.6:
movzbl 67(%rbx), %eax
jmp .LBB3_8
.LBB3_7:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB3_8: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB3_11:
.cfi_def_cfa_offset 48
callq _ZSt16__throw_bad_castv
.Lfunc_end3:
.size _Z5printPbii, .Lfunc_end3-_Z5printPbii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10bfs_kernelPiS_PbS0_S_iiS0_,@object # @_Z10bfs_kernelPiS_PbS0_S_iiS0_
.section .rodata,"a",@progbits
.globl _Z10bfs_kernelPiS_PbS0_S_iiS0_
.p2align 3, 0x0
_Z10bfs_kernelPiS_PbS0_S_iiS0_:
.quad _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.size _Z10bfs_kernelPiS_PbS0_S_iiS0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "count: "
.size .L.str, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10bfs_kernelPiS_PbS0_S_iiS0_"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10bfs_kernelPiS_PbS0_S_iiS0_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014e2d9_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3674:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z16frontierNotEmptyPbi
.type _Z16frontierNotEmptyPbi, @function
_Z16frontierNotEmptyPbi:
.LFB3670:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L6
movq %rdi, %rax
movslq %esi, %rsi
addq %rsi, %rdi
.L5:
movzbl (%rax), %edx
testb %dl, %dl
jne .L3
addq $1, %rax
cmpq %rdi, %rax
jne .L5
.L3:
movl %edx, %eax
ret
.L6:
movl $0, %edx
jmp .L3
.cfi_endproc
.LFE3670:
.size _Z16frontierNotEmptyPbi, .-_Z16frontierNotEmptyPbi
.globl _Z5printPbii
.type _Z5printPbii, @function
_Z5printPbii:
.LFB3671:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $16, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
testl %esi, %esi
jle .L9
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi), %rbp
leaq _ZSt4cout(%rip), %r12
jmp .L12
.L10:
movl $32, %esi
call _ZNSo3putEc@PLT
.L11:
addq $1, %rbx
cmpq %rbp, %rbx
je .L9
.L12:
movzbl (%rbx), %esi
movq %r12, %rdi
call _ZNSo9_M_insertIbEERSoT_@PLT
movq %rax, %rdi
movb $32, 7(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rdi,%rax)
je .L10
leaq 7(%rsp), %rsi
movl $1, %edx
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L11
.L9:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
leaq _ZSt4cout(%rip), %rdx
movq 240(%rdx,%rax), %rbx
testq %rbx, %rbx
je .L20
cmpb $0, 56(%rbx)
je .L15
movzbl 67(%rbx), %esi
.L16:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L21
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L22
call _ZSt16__throw_bad_castv@PLT
.L22:
call __stack_chk_fail@PLT
.L15:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3671:
.size _Z5printPbii, .-_Z5printPbii
.globl _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
.type _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_, @function
_Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_:
.LFB3696:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
movq %rdx, 40(%rsp)
movq %rcx, 32(%rsp)
movq %r8, 24(%rsp)
movl %r9d, 20(%rsp)
movq 232(%rsp), %rax
movq %rax, 8(%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 20(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L27
.L23:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L28
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z10bfs_kernelPiS_PbS0_S_iiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L23
.L28:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3696:
.size _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_, .-_Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
.globl _Z10bfs_kernelPiS_PbS0_S_iiS0_
.type _Z10bfs_kernelPiS_PbS0_S_iiS0_, @function
_Z10bfs_kernelPiS_PbS0_S_iiS0_:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 24(%rsp)
.cfi_def_cfa_offset 24
movl 24(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
call _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _Z10bfs_kernelPiS_PbS0_S_iiS0_, .-_Z10bfs_kernelPiS_PbS0_S_iiS0_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "count: "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $20, %edi
call _Znam@PLT
movq %rax, %r15
movl $48, %edi
call _Znam@PLT
movq %rax, %r12
movl $5, %edi
call _Znam@PLT
movq %rax, %r14
movl $5, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $20, %edi
call _Znam@PLT
movq %rax, %r13
movl $0, %eax
.L32:
movl %eax, (%r15,%rax,4)
movb $0, (%r14,%rax)
movq 8(%rsp), %rbx
movb $0, (%rbx,%rax)
movl $2147483647, 0(%r13,%rax,4)
addq $1, %rax
cmpq $5, %rax
jne .L32
movl $1, (%r12)
movl $2, 4(%r12)
movl $0, 8(%r12)
movl $2, 12(%r12)
movl $0, 16(%r12)
movl $1, 20(%r12)
movl $3, 24(%r12)
movl $4, 28(%r12)
movl $2, 32(%r12)
movl $4, 36(%r12)
movl $2, 40(%r12)
movl $3, 44(%r12)
leaq 32(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $48, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $5, %esi
call cudaMalloc@PLT
leaq 56(%rsp), %rdi
movl $5, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movl $20, %esi
call cudaMalloc@PLT
movb $1, 2(%r14)
movl $0, 8(%r13)
movl $1, %ecx
movl $20, %edx
movq %r15, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $48, %edx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $5, %edx
movq %r14, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $5, %edx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $20, %edx
movq %r13, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movb $1, 31(%rsp)
leaq 72(%rsp), %rdi
movl $1, %esi
call cudaMalloc@PLT
movl $0, %ebx
leaq 31(%rsp), %rbp
jmp .L34
.L33:
movl $2, %ecx
movl $1, %edx
movq 72(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
cmpb $0, 31(%rsp)
jne .L39
.L34:
addl $1, %ebx
movb $1, 31(%rsp)
movl $1, %ecx
movl $1, %edx
movq %rbp, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
movl $5, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movl $1, %ecx
movq 80(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L33
pushq 72(%rsp)
.cfi_def_cfa_offset 184
pushq $12
.cfi_def_cfa_offset 192
movl $5, %r9d
movq 80(%rsp), %r8
movq 72(%rsp), %rcx
movq 64(%rsp), %rdx
movq 56(%rsp), %rsi
movq 48(%rsp), %rdi
call _Z44__device_stub__Z10bfs_kernelPiS_PbS0_S_iiS0_PiS_PbS0_S_iiS0_
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L33
.L39:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $4, %esi
movq %r15, %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq %r12, %rdi
call _ZdlPvm@PLT
movl $1, %esi
movq %r14, %rdi
call _ZdlPvm@PLT
movl $1, %esi
movq 8(%rsp), %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq %r13, %rdi
call _ZdlPvm@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 64(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L40
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L40:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "_Z10bfs_kernelPiS_PbS0_S_iiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3699:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z10bfs_kernelPiS_PbS0_S_iiS0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3699:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_ # -- Begin function _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.p2align 4, 0x90
.type _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_,@function
_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_: # @_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movl %r9d, 4(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_, .Lfunc_end0-_Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 2 # 0x2
.long 0 # 0x0
.long 2 # 0x2
.LCPI1_1:
.long 0 # 0x0
.long 1 # 0x1
.long 3 # 0x3
.long 4 # 0x4
.LCPI1_2:
.long 2 # 0x2
.long 4 # 0x4
.long 2 # 0x2
.long 3 # 0x3
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 320
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $20, %edi
callq _Znam
movq %rax, %rbx
movl $48, %edi
callq _Znam
movq %rax, %r14
movl $5, %edi
callq _Znam
movq %rax, %r15
movl $5, %edi
callq _Znam
movq %rax, %r12
movl $20, %edi
callq _Znam
movq %rax, %r13
movl $0, (%r15)
movb $0, 4(%r15)
movb $0, 4(%r12)
movl $0, (%r12)
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
movl %eax, (%rbx,%rax,4)
movl $2147483647, (%r13,%rax,4) # imm = 0x7FFFFFFF
incq %rax
cmpq $5, %rax
jne .LBB1_1
# %bb.2:
movabsq $4294967297, %rbp # imm = 0x100000001
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,2,0,2]
movups %xmm0, (%r14)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [0,1,3,4]
movups %xmm0, 16(%r14)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [2,4,2,3]
movups %xmm0, 32(%r14)
leaq 56(%rsp), %rdi
movl $20, %esi
callq hipMalloc
leaq 48(%rsp), %rdi
movl $48, %esi
callq hipMalloc
leaq 40(%rsp), %rdi
movl $5, %esi
callq hipMalloc
leaq 32(%rsp), %rdi
movl $5, %esi
callq hipMalloc
leaq 24(%rsp), %rdi
movl $20, %esi
callq hipMalloc
movb $1, 2(%r15)
movl $0, 8(%r13)
movq 56(%rsp), %rdi
movl $20, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $48, %edx
movq %r14, 88(%rsp) # 8-byte Spill
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $5, %edx
movq %r15, 80(%rsp) # 8-byte Spill
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 32(%rsp), %rdi
movl $5, %edx
movq %r12, 72(%rsp) # 8-byte Spill
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $20, %edx
movq %r13, %rsi
movl $1, %ecx
callq hipMemcpy
movb $1, 15(%rsp)
leaq 16(%rsp), %rdi
movl $1, %esi
callq hipMalloc
xorl %r12d, %r12d
leaq 15(%rsp), %r14
leaq 4(%rbp), %r15
jmp .LBB1_3
.p2align 4, 0x90
.LBB1_5: # in Loop: Header=BB1_3 Depth=1
movq 16(%rsp), %rsi
movl $1, %edx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
incl %r12d
cmpb $0, 15(%rsp)
jne .LBB1_6
.LBB1_3: # =>This Inner Loop Header: Depth=1
movb $1, 15(%rsp)
movq 16(%rsp), %rdi
movl $1, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq %rbp, %rdi
movl $1, %esi
movq %r15, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4: # in Loop: Header=BB1_3 Depth=1
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
movq 16(%rsp), %r8
movq %rax, 184(%rsp)
movq %rcx, 176(%rsp)
movq %rdx, 168(%rsp)
movq %rsi, 160(%rsp)
movq %rdi, 152(%rsp)
movl $5, 68(%rsp)
movl $12, 64(%rsp)
movq %r8, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 192(%rsp)
leaq 176(%rsp), %rax
movq %rax, 200(%rsp)
leaq 168(%rsp), %rax
movq %rax, 208(%rsp)
leaq 160(%rsp), %rax
movq %rax, 216(%rsp)
leaq 152(%rsp), %rax
movq %rax, 224(%rsp)
leaq 68(%rsp), %rax
movq %rax, 232(%rsp)
leaq 64(%rsp), %rax
movq %rax, 240(%rsp)
leaq 144(%rsp), %rax
movq %rax, 248(%rsp)
leaq 128(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 128(%rsp), %rsi
movl 136(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %edi
leaq 192(%rsp), %r9
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB1_5
.LBB1_6:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $7, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r12d, %esi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r14
testq %r14, %r14
je .LBB1_11
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
movq 80(%rsp), %r12 # 8-byte Reload
je .LBB1_9
# %bb.8:
movzbl 67(%r14), %ecx
jmp .LBB1_10
.LBB1_9:
movq %r14, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB1_10: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq %rbx, %rdi
callq _ZdlPv
movq 88(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %r12, %rdi
callq _ZdlPv
movq 72(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %r13, %rdi
callq _ZdlPv
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_11:
.cfi_def_cfa_offset 320
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z16frontierNotEmptyPbi # -- Begin function _Z16frontierNotEmptyPbi
.p2align 4, 0x90
.type _Z16frontierNotEmptyPbi,@function
_Z16frontierNotEmptyPbi: # @_Z16frontierNotEmptyPbi
.cfi_startproc
# %bb.0:
testl %esi, %esi
setg %al
jle .LBB2_6
# %bb.1: # %.lr.ph.preheader
cmpb $0, (%rdi)
je .LBB2_2
.LBB2_6: # %._crit_edge
retq
.LBB2_2: # %.lr.ph16.preheader
movl %esi, %eax
movl $1, %edx
.p2align 4, 0x90
.LBB2_3: # %.lr.ph16
# =>This Inner Loop Header: Depth=1
movq %rdx, %rcx
cmpq %rdx, %rax
je .LBB2_5
# %bb.4: # %.lr.ph
# in Loop: Header=BB2_3 Depth=1
leaq 1(%rcx), %rdx
cmpb $0, (%rdi,%rcx)
je .LBB2_3
.LBB2_5: # %._crit_edge.loopexit
cmpq %rax, %rcx
setb %al
retq
.Lfunc_end2:
.size _Z16frontierNotEmptyPbi, .Lfunc_end2-_Z16frontierNotEmptyPbi
.cfi_endproc
# -- End function
.globl _Z5printPbii # -- Begin function _Z5printPbii
.p2align 4, 0x90
.type _Z5printPbii,@function
_Z5printPbii: # @_Z5printPbii
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
testl %esi, %esi
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
movq %rdi, %rbx
movl %esi, %r15d
xorl %r12d, %r12d
leaq 7(%rsp), %r14
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_9: # in Loop: Header=BB3_2 Depth=1
movq %rax, %rdi
movl $32, %esi
callq _ZNSo3putEc
.LBB3_10: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
# in Loop: Header=BB3_2 Depth=1
incq %r12
cmpq %r12, %r15
je .LBB3_4
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movzbl (%rbx,%r12), %esi
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIbEERSoT_
movb $32, 7(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_9
# %bb.3: # in Loop: Header=BB3_2 Depth=1
movl $1, %edx
movq %rax, %rdi
movq %r14, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
jmp .LBB3_10
.LBB3_4: # %._crit_edge
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB3_11
# %bb.5: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB3_7
# %bb.6:
movzbl 67(%rbx), %eax
jmp .LBB3_8
.LBB3_7:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB3_8: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB3_11:
.cfi_def_cfa_offset 48
callq _ZSt16__throw_bad_castv
.Lfunc_end3:
.size _Z5printPbii, .Lfunc_end3-_Z5printPbii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10bfs_kernelPiS_PbS0_S_iiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10bfs_kernelPiS_PbS0_S_iiS0_,@object # @_Z10bfs_kernelPiS_PbS0_S_iiS0_
.section .rodata,"a",@progbits
.globl _Z10bfs_kernelPiS_PbS0_S_iiS0_
.p2align 3, 0x0
_Z10bfs_kernelPiS_PbS0_S_iiS0_:
.quad _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.size _Z10bfs_kernelPiS_PbS0_S_iiS0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "count: "
.size .L.str, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10bfs_kernelPiS_PbS0_S_iiS0_"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__bfs_kernelPiS_PbS0_S_iiS0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10bfs_kernelPiS_PbS0_S_iiS0_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
int main() {
cudaDeviceProp prop;
int count;
cudaGetDeviceCount( &count );
for(int i=0; i< count; i++) {
cudaGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
int main() {
cudaDeviceProp prop;
int count;
cudaGetDeviceCount( &count );
for(int i=0; i< count; i++) {
cudaGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} | .file "tmpxft_000b1ef7_00000000-6_ex2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string " ---General Information for device%d ---\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Name: %s\n"
.LC2:
.string "Computecapability: %d.%d\n"
.LC3:
.string "Clockrate: %d\n"
.section .rodata.str1.8
.align 8
.LC4:
.string " ---Memory Information for device%d ---\n"
.section .rodata.str1.1
.LC5:
.string "Total global mem: %lu\n"
.LC6:
.string "Total constant Mem: %ld\n"
.LC7:
.string "Max mem pitch: %ld\n"
.LC8:
.string "Texture Alignment: %ld\n"
.section .rodata.str1.8
.align 8
.LC9:
.string " ---MP Information for device%d ---\n"
.section .rodata.str1.1
.LC10:
.string "Multiprocessorcount: %d\n"
.LC11:
.string "Sharedmem per mp: %ld\n"
.LC12:
.string "Registersper mp: %d\n"
.LC13:
.string "Threads in warp: %d\n"
.LC14:
.string "Max threads per block: %d\n"
.section .rodata.str1.8
.align 8
.LC15:
.string "Max thread dimensions: (%d, %d, %d)\n"
.align 8
.LC16:
.string "Max griddimensions: (%d, %d, %d)\n"
.section .rodata.str1.1
.LC17:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1064, %rsp
.cfi_def_cfa_offset 1120
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC0(%rip), %r15
leaq .LC1(%rip), %r14
leaq .LC2(%rip), %r13
leaq .LC3(%rip), %r12
.L5:
leaq 16(%rsp), %rbp
movl %ebx, %esi
movq %rbp, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 328(%rsp), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 384(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jg .L5
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L9
movl $0, %eax
addq $1064, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
int main() {
cudaDeviceProp prop;
int count;
cudaGetDeviceCount( &count );
for(int i=0; i< count; i++) {
cudaGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
hipDeviceProp_t prop;
int count;
hipGetDeviceCount( &count );
for(int i=0; i< count; i++) {
hipGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
hipDeviceProp_t prop;
int count;
hipGetDeviceCount( &count );
for(int i=0; i< count; i++) {
hipGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
int main() {
hipDeviceProp_t prop;
int count;
hipGetDeviceCount( &count );
for(int i=0; i< count; i++) {
hipGetDeviceProperties( &prop, i );
printf( " ---General Information for device%d ---\n", i );
printf( "Name: %s\n", prop.name );
printf( "Computecapability: %d.%d\n", prop.major, prop.minor);
printf( "Clockrate: %d\n", prop.clockRate);
printf( " ---Memory Information for device%d ---\n", i );
printf( "Total global mem: %lu\n", prop.totalGlobalMem);
printf( "Total constant Mem: %ld\n", prop.totalConstMem);
printf( "Max mem pitch: %ld\n", prop.memPitch);
printf( "Texture Alignment: %ld\n", prop.textureAlignment);printf( " ---MP Information for device%d ---\n", i );
printf( "Multiprocessorcount: %d\n", prop.multiProcessorCount);printf( "Sharedmem per mp: %ld\n", prop.sharedMemPerBlock);
printf( "Registersper mp: %d\n", prop.regsPerBlock);
printf( "Threads in warp: %d\n", prop.warpSize);
printf( "Max threads per block: %d\n", prop.maxThreadsPerBlock);
printf( "Max thread dimensions: (%d, %d, %d)\n",prop.maxThreadsDim[0], prop.maxThreadsDim[1],prop.maxThreadsDim[2] );
printf( "Max griddimensions: (%d, %d, %d)\n",prop.maxGridSize[0], prop.maxGridSize[1],prop.maxGridSize[2] );
printf( "\n" );
}
return 0;
} | .text
.file "ex2.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 4(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 8(%rsp), %rbx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl 372(%rsp), %edx
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movl 356(%rsp), %esi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movl $.L.str.4, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movq 296(%rsp), %rsi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movq 360(%rsp), %rsi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movq 320(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 376(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $.L.str.9, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl 396(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movq 304(%rsp), %rsi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 312(%rsp), %esi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 316(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 328(%rsp), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movl 332(%rsp), %esi
movl 336(%rsp), %edx
movl 340(%rsp), %ecx
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 344(%rsp), %esi
movl 348(%rsp), %edx
movl 352(%rsp), %ecx
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 4(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz " ---General Information for device%d ---\n"
.size .L.str, 44
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Name: %s\n"
.size .L.str.1, 11
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Computecapability: %d.%d\n"
.size .L.str.2, 27
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Clockrate: %d\n"
.size .L.str.3, 16
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " ---Memory Information for device%d ---\n"
.size .L.str.4, 43
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Total global mem: %lu\n"
.size .L.str.5, 24
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Total constant Mem: %ld\n"
.size .L.str.6, 26
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Max mem pitch: %ld\n"
.size .L.str.7, 21
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Texture Alignment: %ld\n"
.size .L.str.8, 25
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " ---MP Information for device%d ---\n"
.size .L.str.9, 39
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Multiprocessorcount: %d\n"
.size .L.str.10, 26
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Sharedmem per mp: %ld\n"
.size .L.str.11, 24
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Registersper mp: %d\n"
.size .L.str.12, 22
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Threads in warp: %d\n"
.size .L.str.13, 22
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Max threads per block: %d\n"
.size .L.str.14, 28
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Max thread dimensions: (%d, %d, %d)\n"
.size .L.str.15, 38
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Max griddimensions: (%d, %d, %d)\n"
.size .L.str.16, 35
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b1ef7_00000000-6_ex2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string " ---General Information for device%d ---\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Name: %s\n"
.LC2:
.string "Computecapability: %d.%d\n"
.LC3:
.string "Clockrate: %d\n"
.section .rodata.str1.8
.align 8
.LC4:
.string " ---Memory Information for device%d ---\n"
.section .rodata.str1.1
.LC5:
.string "Total global mem: %lu\n"
.LC6:
.string "Total constant Mem: %ld\n"
.LC7:
.string "Max mem pitch: %ld\n"
.LC8:
.string "Texture Alignment: %ld\n"
.section .rodata.str1.8
.align 8
.LC9:
.string " ---MP Information for device%d ---\n"
.section .rodata.str1.1
.LC10:
.string "Multiprocessorcount: %d\n"
.LC11:
.string "Sharedmem per mp: %ld\n"
.LC12:
.string "Registersper mp: %d\n"
.LC13:
.string "Threads in warp: %d\n"
.LC14:
.string "Max threads per block: %d\n"
.section .rodata.str1.8
.align 8
.LC15:
.string "Max thread dimensions: (%d, %d, %d)\n"
.align 8
.LC16:
.string "Max griddimensions: (%d, %d, %d)\n"
.section .rodata.str1.1
.LC17:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1064, %rsp
.cfi_def_cfa_offset 1120
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC0(%rip), %r15
leaq .LC1(%rip), %r14
leaq .LC2(%rip), %r13
leaq .LC3(%rip), %r12
.L5:
leaq 16(%rsp), %rbp
movl %ebx, %esi
movq %rbp, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 328(%rsp), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 384(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jg .L5
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L9
movl $0, %eax
addq $1064, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "ex2.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 4(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 8(%rsp), %rbx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl 372(%rsp), %edx
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movl 356(%rsp), %esi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movl $.L.str.4, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movq 296(%rsp), %rsi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movq 360(%rsp), %rsi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movq 320(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 376(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $.L.str.9, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl 396(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movq 304(%rsp), %rsi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 312(%rsp), %esi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 316(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 328(%rsp), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movl 332(%rsp), %esi
movl 336(%rsp), %edx
movl 340(%rsp), %ecx
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 344(%rsp), %esi
movl 348(%rsp), %edx
movl 352(%rsp), %ecx
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 4(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz " ---General Information for device%d ---\n"
.size .L.str, 44
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Name: %s\n"
.size .L.str.1, 11
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Computecapability: %d.%d\n"
.size .L.str.2, 27
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Clockrate: %d\n"
.size .L.str.3, 16
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " ---Memory Information for device%d ---\n"
.size .L.str.4, 43
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Total global mem: %lu\n"
.size .L.str.5, 24
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Total constant Mem: %ld\n"
.size .L.str.6, 26
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Max mem pitch: %ld\n"
.size .L.str.7, 21
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Texture Alignment: %ld\n"
.size .L.str.8, 25
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " ---MP Information for device%d ---\n"
.size .L.str.9, 39
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Multiprocessorcount: %d\n"
.size .L.str.10, 26
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Sharedmem per mp: %ld\n"
.size .L.str.11, 24
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Registersper mp: %d\n"
.size .L.str.12, 22
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Threads in warp: %d\n"
.size .L.str.13, 22
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Max threads per block: %d\n"
.size .L.str.14, 28
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Max thread dimensions: (%d, %d, %d)\n"
.size .L.str.15, 38
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Max griddimensions: (%d, %d, %d)\n"
.size .L.str.16, 35
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
cudaMalloc((void**)&d_pixel, size);
cudaMalloc((void**)&d_temp, size);
cudaMemcpy(temp, d_pixel, size, cudaMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
cudaMemcpy(h_temp, d_temp, size, cudaMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
cudaFree(d_pixel);
cudaFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} | code for sm_80
Function : _Z9evalJuliaPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002200 */
/*0050*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002600 */
/*0060*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */
/* 0x001fe400078e0200 */
/*0070*/ IMAD R3, R5, c[0x0][0x4], R2 ; /* 0x0000010005037a24 */
/* 0x002fe200078e0202 */
/*0080*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fc800000001ff */
/*0090*/ LEA R0, R3, R0, 0x1 ; /* 0x0000000003007211 */
/* 0x000fcc00078e08ff */
/*00a0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fcc00078e0205 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fca00078e0205 */
/*00d0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*00e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
cudaMalloc((void**)&d_pixel, size);
cudaMalloc((void**)&d_temp, size);
cudaMemcpy(temp, d_pixel, size, cudaMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
cudaMemcpy(h_temp, d_temp, size, cudaMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
cudaFree(d_pixel);
cudaFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} | .file "tmpxft_00073b36_00000000-6_threadH.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z9evalJuliaPiS_PiS_
.type _Z30__device_stub__Z9evalJuliaPiS_PiS_, @function
_Z30__device_stub__Z9evalJuliaPiS_PiS_:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9evalJuliaPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z30__device_stub__Z9evalJuliaPiS_PiS_, .-_Z30__device_stub__Z9evalJuliaPiS_PiS_
.globl _Z9evalJuliaPiS_
.type _Z9evalJuliaPiS_, @function
_Z9evalJuliaPiS_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z9evalJuliaPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z9evalJuliaPiS_, .-_Z9evalJuliaPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "test begins"
.LC1:
.string "last kernel thread printed"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $256, %edi
call _Znam@PLT
movq %rax, %r13
movq %rax, 16(%rsp)
movl $256, %edi
call _Znam@PLT
movq %rax, 24(%rsp)
leaq 256(%r13), %rax
movq %rax, 8(%rsp)
movl $0, %r14d
leaq _ZSt4cout(%rip), %r15
jmp .L12
.L33:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L31
call _ZSt16__throw_bad_castv@PLT
.L31:
call __stack_chk_fail@PLT
.L15:
movq %r12, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r12), %rax
movl $10, %esi
movq %r12, %rdi
call *48(%rax)
movl %eax, %esi
.L16:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $1, %rbp
cmpq $8, %rbp
je .L32
.L17:
leal (%r14,%rbp), %esi
movl %esi, 0(%r13,%rbp,4)
movq %r15, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r12
testq %r12, %r12
je .L33
cmpb $0, 56(%r12)
je .L15
movzbl 67(%r12), %esi
jmp .L16
.L32:
addl $8, %r14d
addq $32, %r13
movq 8(%rsp), %rax
cmpq %rax, %r13
je .L18
.L12:
movl $0, %ebp
jmp .L17
.L18:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $4, 48(%rsp)
movl $4, 52(%rsp)
movl $1, 56(%rsp)
movl $2, 60(%rsp)
movl $2, 64(%rsp)
movl $1, 68(%rsp)
leaq 32(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $256, %edx
movq 32(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L34
.L19:
movl $2, %ecx
movl $256, %edx
movq 40(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rax
leaq 32(%rax), %r13
leaq 288(%rax), %r15
leaq _ZSt4cout(%rip), %r14
jmp .L20
.L34:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z30__device_stub__Z9evalJuliaPiS_PiS_
jmp .L19
.L37:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L35
call _ZSt16__throw_bad_castv@PLT
.L35:
call __stack_chk_fail@PLT
.L23:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
.L24:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r13, %r12
je .L36
.L25:
movl (%r12), %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L37
cmpb $0, 56(%rbp)
je .L23
movzbl 67(%rbp), %esi
jmp .L24
.L36:
addq $32, %r13
cmpq %r15, %r13
je .L26
.L20:
leaq -32(%r13), %r12
jmp .L25
.L26:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movl $4, %esi
movq 24(%rsp), %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq 16(%rsp), %rdi
call _ZdlPvm@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L38
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z9evalJuliaPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z9evalJuliaPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
cudaMalloc((void**)&d_pixel, size);
cudaMalloc((void**)&d_temp, size);
cudaMemcpy(temp, d_pixel, size, cudaMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
cudaMemcpy(h_temp, d_temp, size, cudaMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
cudaFree(d_pixel);
cudaFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} | #include <hip/hip_runtime.h>
#include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
hipMalloc((void**)&d_pixel, size);
hipMalloc((void**)&d_temp, size);
hipMemcpy(temp, d_pixel, size, hipMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
hipMemcpy(h_temp, d_temp, size, hipMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
hipFree(d_pixel);
hipFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
hipMalloc((void**)&d_pixel, size);
hipMalloc((void**)&d_temp, size);
hipMemcpy(temp, d_pixel, size, hipMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
hipMemcpy(h_temp, d_temp, size, hipMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
hipFree(d_pixel);
hipFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9evalJuliaPiS_
.globl _Z9evalJuliaPiS_
.p2align 8
.type _Z9evalJuliaPiS_,@function
_Z9evalJuliaPiS_:
s_load_b32 s4, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_mul_i32 s15, s15, s5
s_mul_i32 s14, s14, s4
v_add_lshl_u32 v1, s15, v1, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v0, s14, v0, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9evalJuliaPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9evalJuliaPiS_, .Lfunc_end0-_Z9evalJuliaPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9evalJuliaPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9evalJuliaPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<iostream>
//#include<stdio.h>
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
__global__ void evalJulia(int *d_pixel,
int *d_temp){
int x_index = threadIdx.x + blockIdx.x*blockDim.x;
int y_index = threadIdx.y + blockIdx.y*blockDim.y;
int tmp = x_index + 2*y_index;
d_temp[tmp] = d_pixel[tmp];
}
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
#define N 64
int main()
{
int *d_pixel;
int *d_temp;
int size = N * sizeof(int);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
int *temp = new int[N];
int *h_temp = new int[N];
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
temp[x + 8*y] = x + 8*y;
std::cout<<temp[x+8*y]<<std::endl;
}
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
std::cout<<"test begins"<<std::endl;
dim3 gridDim(4,4);
dim3 blockDim(2,2);
hipMalloc((void**)&d_pixel, size);
hipMalloc((void**)&d_temp, size);
hipMemcpy(temp, d_pixel, size, hipMemcpyHostToDevice);
//+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
evalJulia<<<gridDim,blockDim>>>(d_pixel, d_temp);
hipMemcpy(h_temp, d_temp, size, hipMemcpyDeviceToHost);
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
for (int y=0;y<8;y++)
for(int x=0;x<8;x++)
{
std::cout<<temp[x+8*y]<<std::endl;}
std::cout<<"last kernel thread printed"<<std::endl;
hipFree(d_pixel);
hipFree(d_temp);
delete(h_temp);
delete(temp);
return 0;
} | .text
.file "threadH.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__evalJuliaPiS_ # -- Begin function _Z24__device_stub__evalJuliaPiS_
.p2align 4, 0x90
.type _Z24__device_stub__evalJuliaPiS_,@function
_Z24__device_stub__evalJuliaPiS_: # @_Z24__device_stub__evalJuliaPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z9evalJuliaPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z24__device_stub__evalJuliaPiS_, .Lfunc_end0-_Z24__device_stub__evalJuliaPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $256, %edi # imm = 0x100
callq _Znam
movq %rax, %rbx
movl $256, %edi # imm = 0x100
callq _Znam
movq %rax, 16(%rsp) # 8-byte Spill
xorl %r15d, %r15d
xorl %ebp, %ebp
jmp .LBB1_1
.p2align 4, 0x90
.LBB1_18: # in Loop: Header=BB1_1 Depth=1
incq %rbp
movq 24(%rsp), %r15 # 8-byte Reload
addq $8, %r15
cmpq $8, %rbp
je .LBB1_5
.LBB1_1: # %.preheader53
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movl $8, %r14d
movq %r15, 24(%rsp) # 8-byte Spill
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_16: # in Loop: Header=BB1_2 Depth=2
movq %r12, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB1_17: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit40
# in Loop: Header=BB1_2 Depth=2
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r15
decq %r14
je .LBB1_18
.LBB1_2: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl %r15d, (%rbx,%r15,4)
movl $_ZSt4cout, %edi
movl %r15d, %esi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r12
testq %r12, %r12
je .LBB1_27
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i37
# in Loop: Header=BB1_2 Depth=2
cmpb $0, 56(%r12)
je .LBB1_16
# %bb.4: # in Loop: Header=BB1_2 Depth=2
movzbl 67(%r12), %ecx
jmp .LBB1_17
.LBB1_5:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r15
testq %r15, %r15
je .LBB1_27
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r15)
je .LBB1_8
# %bb.7:
movzbl 67(%r15), %eax
jmp .LBB1_9
.LBB1_8:
movq %r15, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_9: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
leaq 8(%rsp), %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
movq %rsp, %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
movq 8(%rsp), %rsi
movl $256, %edx # imm = 0x100
movq %rbx, %rdi
movl $1, %ecx
callq hipMemcpy
movabsq $17179869188, %rdi # imm = 0x400000004
movabsq $8589934594, %rdx # imm = 0x200000002
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_11
# %bb.10:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9evalJuliaPiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_11:
movq (%rsp), %rsi
movl $256, %edx # imm = 0x100
movq 16(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
xorl %r12d, %r12d
movq %rbx, %r13
jmp .LBB1_12
.p2align 4, 0x90
.LBB1_26: # in Loop: Header=BB1_12 Depth=1
incq %r12
addq $32, %r13
cmpq $8, %r12
je .LBB1_19
.LBB1_12: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_13 Depth 2
xorl %r14d, %r14d
jmp .LBB1_13
.p2align 4, 0x90
.LBB1_24: # in Loop: Header=BB1_13 Depth=2
movq %r15, %rdi
movq %rax, %rbp
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbp, %rax
.LBB1_25: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit50
# in Loop: Header=BB1_13 Depth=2
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r14
cmpq $8, %r14
je .LBB1_26
.LBB1_13: # Parent Loop BB1_12 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r13,%r14,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB1_27
# %bb.14: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i47
# in Loop: Header=BB1_13 Depth=2
cmpb $0, 56(%r15)
je .LBB1_24
# %bb.15: # in Loop: Header=BB1_13 Depth=2
movzbl 67(%r15), %ecx
jmp .LBB1_25
.LBB1_19:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $26, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r15
testq %r15, %r15
je .LBB1_27
# %bb.20: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i42
cmpb $0, 56(%r15)
je .LBB1_22
# %bb.21:
movzbl 67(%r15), %eax
jmp .LBB1_23
.LBB1_22:
movq %r15, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_23: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit45
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_27:
.cfi_def_cfa_offset 176
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9evalJuliaPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9evalJuliaPiS_,@object # @_Z9evalJuliaPiS_
.section .rodata,"a",@progbits
.globl _Z9evalJuliaPiS_
.p2align 3, 0x0
_Z9evalJuliaPiS_:
.quad _Z24__device_stub__evalJuliaPiS_
.size _Z9evalJuliaPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "test begins"
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "last kernel thread printed"
.size .L.str.1, 27
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9evalJuliaPiS_"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__evalJuliaPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9evalJuliaPiS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9evalJuliaPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002200 */
/*0050*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002600 */
/*0060*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */
/* 0x001fe400078e0200 */
/*0070*/ IMAD R3, R5, c[0x0][0x4], R2 ; /* 0x0000010005037a24 */
/* 0x002fe200078e0202 */
/*0080*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fc800000001ff */
/*0090*/ LEA R0, R3, R0, 0x1 ; /* 0x0000000003007211 */
/* 0x000fcc00078e08ff */
/*00a0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fcc00078e0205 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fca00078e0205 */
/*00d0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */
/* 0x004fe2000c101904 */
/*00e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9evalJuliaPiS_
.globl _Z9evalJuliaPiS_
.p2align 8
.type _Z9evalJuliaPiS_,@function
_Z9evalJuliaPiS_:
s_load_b32 s4, s[0:1], 0x1c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_mul_i32 s15, s15, s5
s_mul_i32 s14, s14, s4
v_add_lshl_u32 v1, s15, v1, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v0, s14, v0, v1
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9evalJuliaPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9evalJuliaPiS_, .Lfunc_end0-_Z9evalJuliaPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9evalJuliaPiS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9evalJuliaPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00073b36_00000000-6_threadH.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z30__device_stub__Z9evalJuliaPiS_PiS_
.type _Z30__device_stub__Z9evalJuliaPiS_PiS_, @function
_Z30__device_stub__Z9evalJuliaPiS_PiS_:
.LFB3694:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9evalJuliaPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z30__device_stub__Z9evalJuliaPiS_PiS_, .-_Z30__device_stub__Z9evalJuliaPiS_PiS_
.globl _Z9evalJuliaPiS_
.type _Z9evalJuliaPiS_, @function
_Z9evalJuliaPiS_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z30__device_stub__Z9evalJuliaPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z9evalJuliaPiS_, .-_Z9evalJuliaPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "test begins"
.LC1:
.string "last kernel thread printed"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $256, %edi
call _Znam@PLT
movq %rax, %r13
movq %rax, 16(%rsp)
movl $256, %edi
call _Znam@PLT
movq %rax, 24(%rsp)
leaq 256(%r13), %rax
movq %rax, 8(%rsp)
movl $0, %r14d
leaq _ZSt4cout(%rip), %r15
jmp .L12
.L33:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L31
call _ZSt16__throw_bad_castv@PLT
.L31:
call __stack_chk_fail@PLT
.L15:
movq %r12, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r12), %rax
movl $10, %esi
movq %r12, %rdi
call *48(%rax)
movl %eax, %esi
.L16:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $1, %rbp
cmpq $8, %rbp
je .L32
.L17:
leal (%r14,%rbp), %esi
movl %esi, 0(%r13,%rbp,4)
movq %r15, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r12
testq %r12, %r12
je .L33
cmpb $0, 56(%r12)
je .L15
movzbl 67(%r12), %esi
jmp .L16
.L32:
addl $8, %r14d
addq $32, %r13
movq 8(%rsp), %rax
cmpq %rax, %r13
je .L18
.L12:
movl $0, %ebp
jmp .L17
.L18:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $4, 48(%rsp)
movl $4, 52(%rsp)
movl $1, 56(%rsp)
movl $2, 60(%rsp)
movl $2, 64(%rsp)
movl $1, 68(%rsp)
leaq 32(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $256, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $256, %edx
movq 32(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L34
.L19:
movl $2, %ecx
movl $256, %edx
movq 40(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rax
leaq 32(%rax), %r13
leaq 288(%rax), %r15
leaq _ZSt4cout(%rip), %r14
jmp .L20
.L34:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
call _Z30__device_stub__Z9evalJuliaPiS_PiS_
jmp .L19
.L37:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L35
call _ZSt16__throw_bad_castv@PLT
.L35:
call __stack_chk_fail@PLT
.L23:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
.L24:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r13, %r12
je .L36
.L25:
movl (%r12), %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L37
cmpb $0, 56(%rbp)
je .L23
movzbl 67(%rbp), %esi
jmp .L24
.L36:
addq $32, %r13
cmpq %r15, %r13
je .L26
.L20:
leaq -32(%r13), %r12
jmp .L25
.L26:
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movl $4, %esi
movq 24(%rsp), %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq 16(%rsp), %rdi
call _ZdlPvm@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L38
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC2:
.string "_Z9evalJuliaPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC2(%rip), %rdx
movq %rdx, %rcx
leaq _Z9evalJuliaPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "threadH.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__evalJuliaPiS_ # -- Begin function _Z24__device_stub__evalJuliaPiS_
.p2align 4, 0x90
.type _Z24__device_stub__evalJuliaPiS_,@function
_Z24__device_stub__evalJuliaPiS_: # @_Z24__device_stub__evalJuliaPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z9evalJuliaPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z24__device_stub__evalJuliaPiS_, .Lfunc_end0-_Z24__device_stub__evalJuliaPiS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $120, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $256, %edi # imm = 0x100
callq _Znam
movq %rax, %rbx
movl $256, %edi # imm = 0x100
callq _Znam
movq %rax, 16(%rsp) # 8-byte Spill
xorl %r15d, %r15d
xorl %ebp, %ebp
jmp .LBB1_1
.p2align 4, 0x90
.LBB1_18: # in Loop: Header=BB1_1 Depth=1
incq %rbp
movq 24(%rsp), %r15 # 8-byte Reload
addq $8, %r15
cmpq $8, %rbp
je .LBB1_5
.LBB1_1: # %.preheader53
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
movl $8, %r14d
movq %r15, 24(%rsp) # 8-byte Spill
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_16: # in Loop: Header=BB1_2 Depth=2
movq %r12, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB1_17: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit40
# in Loop: Header=BB1_2 Depth=2
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r15
decq %r14
je .LBB1_18
.LBB1_2: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
movl %r15d, (%rbx,%r15,4)
movl $_ZSt4cout, %edi
movl %r15d, %esi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r12
testq %r12, %r12
je .LBB1_27
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i37
# in Loop: Header=BB1_2 Depth=2
cmpb $0, 56(%r12)
je .LBB1_16
# %bb.4: # in Loop: Header=BB1_2 Depth=2
movzbl 67(%r12), %ecx
jmp .LBB1_17
.LBB1_5:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r15
testq %r15, %r15
je .LBB1_27
# %bb.6: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r15)
je .LBB1_8
# %bb.7:
movzbl 67(%r15), %eax
jmp .LBB1_9
.LBB1_8:
movq %r15, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_9: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
leaq 8(%rsp), %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
movq %rsp, %rdi
movl $256, %esi # imm = 0x100
callq hipMalloc
movq 8(%rsp), %rsi
movl $256, %edx # imm = 0x100
movq %rbx, %rdi
movl $1, %ecx
callq hipMemcpy
movabsq $17179869188, %rdi # imm = 0x400000004
movabsq $8589934594, %rdx # imm = 0x200000002
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_11
# %bb.10:
movq 8(%rsp), %rax
movq (%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z9evalJuliaPiS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_11:
movq (%rsp), %rsi
movl $256, %edx # imm = 0x100
movq 16(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
xorl %r12d, %r12d
movq %rbx, %r13
jmp .LBB1_12
.p2align 4, 0x90
.LBB1_26: # in Loop: Header=BB1_12 Depth=1
incq %r12
addq $32, %r13
cmpq $8, %r12
je .LBB1_19
.LBB1_12: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_13 Depth 2
xorl %r14d, %r14d
jmp .LBB1_13
.p2align 4, 0x90
.LBB1_24: # in Loop: Header=BB1_13 Depth=2
movq %r15, %rdi
movq %rax, %rbp
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %rbp, %rax
.LBB1_25: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit50
# in Loop: Header=BB1_13 Depth=2
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r14
cmpq $8, %r14
je .LBB1_26
.LBB1_13: # Parent Loop BB1_12 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r13,%r14,4), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB1_27
# %bb.14: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i47
# in Loop: Header=BB1_13 Depth=2
cmpb $0, 56(%r15)
je .LBB1_24
# %bb.15: # in Loop: Header=BB1_13 Depth=2
movzbl 67(%r15), %ecx
jmp .LBB1_25
.LBB1_19:
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $26, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r15
testq %r15, %r15
je .LBB1_27
# %bb.20: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i42
cmpb $0, 56(%r15)
je .LBB1_22
# %bb.21:
movzbl 67(%r15), %eax
jmp .LBB1_23
.LBB1_22:
movq %r15, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_23: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit45
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi # 8-byte Reload
callq _ZdlPv
movq %rbx, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $120, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_27:
.cfi_def_cfa_offset 176
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9evalJuliaPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9evalJuliaPiS_,@object # @_Z9evalJuliaPiS_
.section .rodata,"a",@progbits
.globl _Z9evalJuliaPiS_
.p2align 3, 0x0
_Z9evalJuliaPiS_:
.quad _Z24__device_stub__evalJuliaPiS_
.size _Z9evalJuliaPiS_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "test begins"
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "last kernel thread printed"
.size .L.str.1, 27
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9evalJuliaPiS_"
.size .L__unnamed_1, 17
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__evalJuliaPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9evalJuliaPiS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} | code for sm_80
Function : _Z7kernelFPKfS0_S0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*0020*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff057624 */
/* 0x000fe200078e00ff */
/*0030*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */
/* 0x000fe20000000f00 */
/*0040*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fe200078e00ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0060*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff077624 */
/* 0x000fe200078e00ff */
/*0070*/ MOV R6, c[0x0][0x170] ; /* 0x00005c0000067a02 */
/* 0x000fe20000000f00 */
/*0080*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*00a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee2000c1e1900 */
/*00b0*/ MOV R8, c[0x0][0x178] ; /* 0x00005e0000087a02 */
/* 0x000fc40000000f00 */
/*00c0*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */
/* 0x000fe20000000f00 */
/*00d0*/ FADD R0, R2, R5 ; /* 0x0000000502007221 */
/* 0x004fc80000000000 */
/*00e0*/ FADD R11, R0, R7 ; /* 0x00000007000b7221 */
/* 0x008fca0000000000 */
/*00f0*/ STG.E [R8.64], R11 ; /* 0x0000000b08007986 */
/* 0x000fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} | .file "tmpxft_00108210_00000000-6_kernelF.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
.type _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf, @function
_Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z7kernelFPKfS0_S0_Pf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf, .-_Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
.globl _Z7kernelFPKfS0_S0_Pf
.type _Z7kernelFPKfS0_S0_Pf, @function
_Z7kernelFPKfS0_S0_Pf:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z7kernelFPKfS0_S0_Pf, .-_Z7kernelFPKfS0_S0_Pf
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7kernelFPKfS0_S0_Pf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7kernelFPKfS0_S0_Pf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernelFPKfS0_S0_Pf
.globl _Z7kernelFPKfS0_S0_Pf
.p2align 8
.type _Z7kernelFPKfS0_S0_Pf,@function
_Z7kernelFPKfS0_S0_Pf:
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s0, s[0:1], 0x0
s_load_b32 s1, s[2:3], 0x0
s_load_b32 s2, s[4:5], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v0, s0, s1
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v1, 0 :: v_dual_add_f32 v0, s2, v0
global_store_b32 v1, v0, s[6:7]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernelFPKfS0_S0_Pf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 32
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 8
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7kernelFPKfS0_S0_Pf, .Lfunc_end0-_Z7kernelFPKfS0_S0_Pf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 32
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7kernelFPKfS0_S0_Pf
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z7kernelFPKfS0_S0_Pf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernelF(const float *d_xAx, const float *d_bx, const float *d_c, float *d_y)
{
*d_y = *d_xAx + *d_bx + *d_c;
} | .text
.file "kernelF.hip"
.globl _Z22__device_stub__kernelFPKfS0_S0_Pf # -- Begin function _Z22__device_stub__kernelFPKfS0_S0_Pf
.p2align 4, 0x90
.type _Z22__device_stub__kernelFPKfS0_S0_Pf,@function
_Z22__device_stub__kernelFPKfS0_S0_Pf: # @_Z22__device_stub__kernelFPKfS0_S0_Pf
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7kernelFPKfS0_S0_Pf, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z22__device_stub__kernelFPKfS0_S0_Pf, .Lfunc_end0-_Z22__device_stub__kernelFPKfS0_S0_Pf
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7kernelFPKfS0_S0_Pf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7kernelFPKfS0_S0_Pf,@object # @_Z7kernelFPKfS0_S0_Pf
.section .rodata,"a",@progbits
.globl _Z7kernelFPKfS0_S0_Pf
.p2align 3, 0x0
_Z7kernelFPKfS0_S0_Pf:
.quad _Z22__device_stub__kernelFPKfS0_S0_Pf
.size _Z7kernelFPKfS0_S0_Pf, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7kernelFPKfS0_S0_Pf"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__kernelFPKfS0_S0_Pf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7kernelFPKfS0_S0_Pf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7kernelFPKfS0_S0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*0020*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff057624 */
/* 0x000fe200078e00ff */
/*0030*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */
/* 0x000fe20000000f00 */
/*0040*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fe200078e00ff */
/*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0060*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff077624 */
/* 0x000fe200078e00ff */
/*0070*/ MOV R6, c[0x0][0x170] ; /* 0x00005c0000067a02 */
/* 0x000fe20000000f00 */
/*0080*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea8000c1e1900 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*00a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee2000c1e1900 */
/*00b0*/ MOV R8, c[0x0][0x178] ; /* 0x00005e0000087a02 */
/* 0x000fc40000000f00 */
/*00c0*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */
/* 0x000fe20000000f00 */
/*00d0*/ FADD R0, R2, R5 ; /* 0x0000000502007221 */
/* 0x004fc80000000000 */
/*00e0*/ FADD R11, R0, R7 ; /* 0x00000007000b7221 */
/* 0x008fca0000000000 */
/*00f0*/ STG.E [R8.64], R11 ; /* 0x0000000b08007986 */
/* 0x000fe2000c101904 */
/*0100*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0110*/ BRA 0x110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernelFPKfS0_S0_Pf
.globl _Z7kernelFPKfS0_S0_Pf
.p2align 8
.type _Z7kernelFPKfS0_S0_Pf,@function
_Z7kernelFPKfS0_S0_Pf:
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s0, s[0:1], 0x0
s_load_b32 s1, s[2:3], 0x0
s_load_b32 s2, s[4:5], 0x0
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v0, s0, s1
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v1, 0 :: v_dual_add_f32 v0, s2, v0
global_store_b32 v1, v0, s[6:7]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernelFPKfS0_S0_Pf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 32
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 8
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7kernelFPKfS0_S0_Pf, .Lfunc_end0-_Z7kernelFPKfS0_S0_Pf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 32
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7kernelFPKfS0_S0_Pf
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z7kernelFPKfS0_S0_Pf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00108210_00000000-6_kernelF.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
.type _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf, @function
_Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z7kernelFPKfS0_S0_Pf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf, .-_Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
.globl _Z7kernelFPKfS0_S0_Pf
.type _Z7kernelFPKfS0_S0_Pf, @function
_Z7kernelFPKfS0_S0_Pf:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z7kernelFPKfS0_S0_PfPKfS0_S0_Pf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z7kernelFPKfS0_S0_Pf, .-_Z7kernelFPKfS0_S0_Pf
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7kernelFPKfS0_S0_Pf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7kernelFPKfS0_S0_Pf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernelF.hip"
.globl _Z22__device_stub__kernelFPKfS0_S0_Pf # -- Begin function _Z22__device_stub__kernelFPKfS0_S0_Pf
.p2align 4, 0x90
.type _Z22__device_stub__kernelFPKfS0_S0_Pf,@function
_Z22__device_stub__kernelFPKfS0_S0_Pf: # @_Z22__device_stub__kernelFPKfS0_S0_Pf
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7kernelFPKfS0_S0_Pf, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z22__device_stub__kernelFPKfS0_S0_Pf, .Lfunc_end0-_Z22__device_stub__kernelFPKfS0_S0_Pf
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7kernelFPKfS0_S0_Pf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7kernelFPKfS0_S0_Pf,@object # @_Z7kernelFPKfS0_S0_Pf
.section .rodata,"a",@progbits
.globl _Z7kernelFPKfS0_S0_Pf
.p2align 3, 0x0
_Z7kernelFPKfS0_S0_Pf:
.quad _Z22__device_stub__kernelFPKfS0_S0_Pf
.size _Z7kernelFPKfS0_S0_Pf, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7kernelFPKfS0_S0_Pf"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__kernelFPKfS0_S0_Pf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7kernelFPKfS0_S0_Pf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} | code for sm_80
Function : _Z3otpPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0030*/ MOV R5, c[0x0][0x16c] ; /* 0x00005b0000057a02 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */
/* 0x000fca0000000f00 */
/*0060*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0070*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x001fca00078e0003 */
/*0080*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0090*/ LOP3.LUT R7, R5, R0, RZ, 0x3c, !PT ; /* 0x0000000005077212 */
/* 0x004fca00078e3cff */
/*00a0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} | .file "tmpxft_001a7c72_00000000-6_otp.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z24__device_stub__Z3otpPiS_PiS_
.type _Z24__device_stub__Z3otpPiS_PiS_, @function
_Z24__device_stub__Z3otpPiS_PiS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z3otpPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z24__device_stub__Z3otpPiS_PiS_, .-_Z24__device_stub__Z3otpPiS_PiS_
.globl _Z3otpPiS_
.type _Z3otpPiS_, @function
_Z3otpPiS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z24__device_stub__Z3otpPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z3otpPiS_, .-_Z3otpPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3otpPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3otpPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} | #include <hip/hip_runtime.h>
__global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3otpPiS_
.globl _Z3otpPiS_
.p2align 8
.type _Z3otpPiS_,@function
_Z3otpPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_load_b32 s2, s[2:3], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_xor_b32_e32 v1, s2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3otpPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 4
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3otpPiS_, .Lfunc_end0-_Z3otpPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3otpPiS_
.private_segment_fixed_size: 0
.sgpr_count: 4
.sgpr_spill_count: 0
.symbol: _Z3otpPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__
void otp(int *v, int *k) {
v[threadIdx.x] = v[threadIdx.x] ^ (*k);
} | .text
.file "otp.hip"
.globl _Z18__device_stub__otpPiS_ # -- Begin function _Z18__device_stub__otpPiS_
.p2align 4, 0x90
.type _Z18__device_stub__otpPiS_,@function
_Z18__device_stub__otpPiS_: # @_Z18__device_stub__otpPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z3otpPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z18__device_stub__otpPiS_, .Lfunc_end0-_Z18__device_stub__otpPiS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3otpPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3otpPiS_,@object # @_Z3otpPiS_
.section .rodata,"a",@progbits
.globl _Z3otpPiS_
.p2align 3, 0x0
_Z3otpPiS_:
.quad _Z18__device_stub__otpPiS_
.size _Z3otpPiS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3otpPiS_"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__otpPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3otpPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3otpPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0030*/ MOV R5, c[0x0][0x16c] ; /* 0x00005b0000057a02 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */
/* 0x000fca0000000f00 */
/*0060*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */
/* 0x000ea2000c1e1900 */
/*0070*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x001fca00078e0003 */
/*0080*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0090*/ LOP3.LUT R7, R5, R0, RZ, 0x3c, !PT ; /* 0x0000000005077212 */
/* 0x004fca00078e3cff */
/*00a0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe2000c101904 */
/*00b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3otpPiS_
.globl _Z3otpPiS_
.p2align 8
.type _Z3otpPiS_,@function
_Z3otpPiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_load_b32 s2, s[2:3], 0x0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_xor_b32_e32 v1, s2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3otpPiS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 4
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3otpPiS_, .Lfunc_end0-_Z3otpPiS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3otpPiS_
.private_segment_fixed_size: 0
.sgpr_count: 4
.sgpr_spill_count: 0
.symbol: _Z3otpPiS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a7c72_00000000-6_otp.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z24__device_stub__Z3otpPiS_PiS_
.type _Z24__device_stub__Z3otpPiS_PiS_, @function
_Z24__device_stub__Z3otpPiS_PiS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z3otpPiS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z24__device_stub__Z3otpPiS_PiS_, .-_Z24__device_stub__Z3otpPiS_PiS_
.globl _Z3otpPiS_
.type _Z3otpPiS_, @function
_Z3otpPiS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z24__device_stub__Z3otpPiS_PiS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z3otpPiS_, .-_Z3otpPiS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3otpPiS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3otpPiS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "otp.hip"
.globl _Z18__device_stub__otpPiS_ # -- Begin function _Z18__device_stub__otpPiS_
.p2align 4, 0x90
.type _Z18__device_stub__otpPiS_,@function
_Z18__device_stub__otpPiS_: # @_Z18__device_stub__otpPiS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z3otpPiS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z18__device_stub__otpPiS_, .Lfunc_end0-_Z18__device_stub__otpPiS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3otpPiS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3otpPiS_,@object # @_Z3otpPiS_
.section .rodata,"a",@progbits
.globl _Z3otpPiS_
.p2align 3, 0x0
_Z3otpPiS_:
.quad _Z18__device_stub__otpPiS_
.size _Z3otpPiS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3otpPiS_"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__otpPiS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3otpPiS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} | code for sm_80
Function : _Z3psoP9blockDatafffb
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002200 */
/*0030*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e680000002500 */
/*0040*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000ea20000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0203 */
/*0060*/ IMAD R0, R0, c[0x0][0xc], R5 ; /* 0x0000030000007a24 */
/* 0x002fc800078e0205 */
/*0070*/ IMAD R9, R0, c[0x0][0x0], R9 ; /* 0x0000000000097a24 */
/* 0x004fca00078e0209 */
/*0080*/ ISETP.GT.U32.AND P0, PT, R9, 0x1ff, PT ; /* 0x000001ff0900780c */
/* 0x000fda0003f04070 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ULDC.64 UR8, c[0x0][0x160] ; /* 0x0000580000087ab9 */
/* 0x000fe40000000a00 */
/*00b0*/ UIADD3 UR5, UP1, UR8, 0x1800, URZ ; /* 0x0000180008057890 */
/* 0x000fe4000ff3e03f */
/*00c0*/ ULDC.S8 UR4, c[0x0][0x174] ; /* 0x00005d0000047ab9 */
/* 0x000fe40000000200 */
/*00d0*/ UISETP.NE.AND UP0, UPT, UR4, URZ, UPT ; /* 0x0000003f0400728c */
/* 0x000fe4000bf05270 */
/*00e0*/ UIADD3.X UR6, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f067290 */
/* 0x000fe40008ffe43f */
/*00f0*/ USEL UR4, UR5, UR8, !UP0 ; /* 0x0000000805047287 */
/* 0x000fc4000c000000 */
/*0100*/ USEL UR7, UR6, UR9, !UP0 ; /* 0x0000000906077287 */
/* 0x000fe4000c000000 */
/*0110*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */
/* 0x000fe40000000a00 */
/*0120*/ MOV R2, UR4 ; /* 0x0000000400027c02 */
/* 0x000fe40008000f00 */
/*0130*/ MOV R3, UR7 ; /* 0x0000000700037c02 */
/* 0x000fca0008000f00 */
/*0140*/ IMAD.WIDE.U32 R4, R9, 0xc, R2 ; /* 0x0000000c09047825 */
/* 0x000fca00078e0002 */
/*0150*/ LDG.E R13, [R4.64] ; /* 0x0000000a040d7981 */
/* 0x000ea2000c1e1900 */
/*0160*/ USEL UR4, UR5, UR8, UP0 ; /* 0x0000000805047287 */
/* 0x000fe40008000000 */
/*0170*/ USEL UR5, UR6, UR9, UP0 ; /* 0x0000000906057287 */
/* 0x000fc80008000000 */
/*0180*/ MOV R6, UR4 ; /* 0x0000000400067c02 */
/* 0x000fe40008000f00 */
/*0190*/ MOV R7, UR5 ; /* 0x0000000500077c02 */
/* 0x000fca0008000f00 */
/*01a0*/ IMAD.WIDE.U32 R6, R9, 0xc, R6 ; /* 0x0000000c09067825 */
/* 0x000fca00078e0006 */
/*01b0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x0041e8000c10190a */
/*01c0*/ LDG.E R15, [R4.64+0x4] ; /* 0x0000040a040f7981 */
/* 0x000ea8000c1e1900 */
/*01d0*/ STG.E [R6.64+0x4], R15 ; /* 0x0000040f06007986 */
/* 0x004fe8000c10190a */
/*01e0*/ LDG.E R17, [R4.64+0x8] ; /* 0x0000080a04117981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ STG.E [R6.64+0x8], R17 ; /* 0x0000081106007986 */
/* 0x004fe8000c10190a */
/*0200*/ LDG.E R0, [R4.64+0x4] ; /* 0x0000040a04007981 */
/* 0x000ea2000c1e1900 */
/*0210*/ F2F.F64.F32 R10, R15 ; /* 0x0000000f000a7310 */
/* 0x000ff00000201800 */
/*0220*/ F2F.F64.F32 R8, R0 ; /* 0x0000000000087310 */
/* 0x004e640000201800 */
/*0230*/ DFMA R8, R8, 2, R10 ; /* 0x400000000808782b */
/* 0x002e54000000000a */
/*0240*/ F2F.F32.F64 R9, R8 ; /* 0x0000000800097310 */
/* 0x002e640000301000 */
/*0250*/ STG.E [R6.64+0x4], R9 ; /* 0x0000040906007986 */
/* 0x0023e8000c10190a */
/*0260*/ LDG.E R10, [R4.64] ; /* 0x0000000a040a7981 */
/* 0x000ea8000c1e1900 */
/*0270*/ LDG.E R11, [R4.64+0x8] ; /* 0x0000080a040b7981 */
/* 0x000ea4000c1e1900 */
/*0280*/ FADD R10, -R10, R11 ; /* 0x0000000b0a0a7221 */
/* 0x004fc80000000100 */
/*0290*/ FADD R11, R9, R10 ; /* 0x0000000a090b7221 */
/* 0x000fca0000000000 */
/*02a0*/ STG.E [R6.64+0x4], R11 ; /* 0x0000040b06007986 */
/* 0x000fe8000c10190a */
/*02b0*/ LDG.E R2, [R2.64+0x8] ; /* 0x0000080a02027981 */
/* 0x000ea8000c1e1900 */
/*02c0*/ LDG.E R13, [R4.64+0x8] ; /* 0x0000080a040d7981 */
/* 0x001ea8000c1e1900 */
/*02d0*/ LDG.E R0, [R4.64] ; /* 0x0000000a04007981 */
/* 0x000ee2000c1e1900 */
/*02e0*/ FSETP.GT.AND P0, PT, R13, R2, PT ; /* 0x000000020d00720b */
/* 0x004fc80003f04000 */
/*02f0*/ FSEL R13, R13, R2, P0 ; /* 0x000000020d0d7208 */
/* 0x000fca0000000000 */
/*0300*/ FADD R0, R13, -R0 ; /* 0x800000000d007221 */
/* 0x008fc80000000000 */
/*0310*/ FADD R9, R11, R0 ; /* 0x000000000b097221 */
/* 0x002fca0000000000 */
/*0320*/ STG.E [R6.64+0x4], R9 ; /* 0x0000040906007986 */
/* 0x000fe2000c10190a */
/*0330*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0340*/ BRA 0x340; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} | .file "tmpxft_0017f288_00000000-6_pso_v1.0.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z4initP8particleS0_j
.type _Z4initP8particleS0_j, @function
_Z4initP8particleS0_j:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z4initP8particleS0_j, .-_Z4initP8particleS0_j
.globl _Z6globalP8particlejj
.type _Z6globalP8particlejj, @function
_Z6globalP8particlejj:
.LFB2058:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2058:
.size _Z6globalP8particlejj, .-_Z6globalP8particlejj
.globl _Z8inertialP8particleS0_j
.type _Z8inertialP8particleS0_j, @function
_Z8inertialP8particleS0_j:
.LFB2059:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z8inertialP8particleS0_j, .-_Z8inertialP8particleS0_j
.globl _Z9cognitiveP8particleS0_j
.type _Z9cognitiveP8particleS0_j, @function
_Z9cognitiveP8particleS0_j:
.LFB2060:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2060:
.size _Z9cognitiveP8particleS0_j, .-_Z9cognitiveP8particleS0_j
.globl _Z6socialP8particleS0_j
.type _Z6socialP8particleS0_j, @function
_Z6socialP8particleS0_j:
.LFB2061:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2061:
.size _Z6socialP8particleS0_j, .-_Z6socialP8particleS0_j
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
movl $0, %eax
ret
.cfi_endproc
.LFE2062:
.size main, .-main
.globl _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
.type _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb, @function
_Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movss %xmm2, 12(%rsp)
movb %sil, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3psoP9blockDatafffb(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb, .-_Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
.globl _Z3psoP9blockDatafffb
.type _Z3psoP9blockDatafffb, @function
_Z3psoP9blockDatafffb:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movzbl %sil, %esi
call _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z3psoP9blockDatafffb, .-_Z3psoP9blockDatafffb
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3psoP9blockDatafffb"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3psoP9blockDatafffb(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3psoP9blockDatafffb
.globl _Z3psoP9blockDatafffb
.p2align 8
.type _Z3psoP9blockDatafffb,@function
_Z3psoP9blockDatafffb:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 0x200, v0
s_cbranch_execz .LBB0_2
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, 1, s2
s_add_u32 s4, s0, 0x1800
s_addc_u32 s5, s1, 0
s_cmp_eq_u32 s2, 1
s_cselect_b32 s3, s1, s5
s_cselect_b32 s2, s0, s4
s_cselect_b32 s1, s5, s1
v_mad_u64_u32 v[1:2], null, v0, 12, s[2:3]
s_cselect_b32 s0, s4, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v0, 12, s[0:1]
global_load_b32 v5, v[1:2], off
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v5, off
global_load_b32 v0, v[1:2], off offset:4
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v0, off offset:4
global_load_b32 v5, v[1:2], off offset:8
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v5, off offset:8
global_load_b32 v7, v[1:2], off offset:4
v_cvt_f64_f32_e32 v[5:6], v0
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[7:8], v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[5:6], v[7:8], 2.0, v[5:6]
v_cvt_f32_f64_e32 v0, v[5:6]
global_store_b32 v[3:4], v0, off offset:4
s_clause 0x1
global_load_b32 v5, v[1:2], off offset:8
global_load_b32 v6, v[1:2], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v0, v5, v0 :: v_dual_mov_b32 v5, 0
global_store_b32 v[3:4], v0, off offset:4
s_clause 0x2
global_load_b32 v5, v5, s[2:3] offset:8
global_load_b32 v6, v[1:2], off offset:8
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(1)
v_cmp_gt_f32_e32 vcc_lo, v6, v5
v_cndmask_b32_e32 v2, v5, v6, vcc_lo
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v1, v2, v1
v_add_f32_e32 v0, v0, v1
global_store_b32 v[3:4], v0, off offset:4
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3psoP9blockDatafffb
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3psoP9blockDatafffb, .Lfunc_end0-_Z3psoP9blockDatafffb
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 1
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3psoP9blockDatafffb
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3psoP9blockDatafffb.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define DIM 1
#define PARTICLE_COUNT 512
#define W 2.0
#define C1 1.0
#define C2 1.0
typedef struct {
float pos[DIM];
float del[DIM];
float bsf[DIM];
} particle;
typedef struct {
particle s[PARTICLE_COUNT];
particle d[PARTICLE_COUNT];
} blockData;
__device__ void init(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].pos[i] = s[index].pos[i];
d[index].del[i] = s[index].del[i];
d[index].bsf[i] = s[index].bsf[i];
}
}
__device__ float global(particle * s, unsigned int i, unsigned int d) {
unsigned int pu, pd;
pu = (i + 1) % DIM;
pd = (i - 1) % DIM;
float a = s[i].bsf[d];
float b = s[pu].bsf[d];
float c = s[pd].bsf[d];
return (a > b) ? (a > c ? a : c) : ( b > c ? b : c);
}
__device__ void inertial(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += s[index].del[i] * W;
}
}
__device__ void cognitive(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C1 * (s[index].bsf[i] - s[index].pos[i]);
}
}
__device__ void social(particle * s, particle * d, unsigned int index) {
for(unsigned int i = 0; i < DIM; i++) {
d[index].del[i] += C2 * (global(s, index, i) - s[index].pos[i]);
}
//GLOBAL BEST
}
__global__ void pso(blockData * p, float w, float c1, float c2, bool sw) {
unsigned int x_i = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int y_i = threadIdx.y + blockIdx.y * blockDim.y;
unsigned index = x_i + y_i * blockDim.x * gridDim.x;
particle * s = sw ? (particle *)p->s : (particle *)p->d;
particle * d = sw ? (particle *)p->d : (particle *)p->s;
if (index < PARTICLE_COUNT) {
init(s, d, index);
inertial(s, d, index);
cognitive(s, d, index);
social(s, d, index);
}
}
int main() {
return 0;
} | .text
.file "pso_v1.0.hip"
.globl _Z18__device_stub__psoP9blockDatafffb # -- Begin function _Z18__device_stub__psoP9blockDatafffb
.p2align 4, 0x90
.type _Z18__device_stub__psoP9blockDatafffb,@function
_Z18__device_stub__psoP9blockDatafffb: # @_Z18__device_stub__psoP9blockDatafffb
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movss %xmm2, 12(%rsp)
movb %sil, 11(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 11(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3psoP9blockDatafffb, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z18__device_stub__psoP9blockDatafffb, .Lfunc_end0-_Z18__device_stub__psoP9blockDatafffb
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
xorl %eax, %eax
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3psoP9blockDatafffb, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3psoP9blockDatafffb,@object # @_Z3psoP9blockDatafffb
.section .rodata,"a",@progbits
.globl _Z3psoP9blockDatafffb
.p2align 3, 0x0
_Z3psoP9blockDatafffb:
.quad _Z18__device_stub__psoP9blockDatafffb
.size _Z3psoP9blockDatafffb, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3psoP9blockDatafffb"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__psoP9blockDatafffb
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3psoP9blockDatafffb
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3psoP9blockDatafffb
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002600 */
/*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002200 */
/*0030*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e680000002500 */
/*0040*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000ea20000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */
/* 0x001fc800078e0203 */
/*0060*/ IMAD R0, R0, c[0x0][0xc], R5 ; /* 0x0000030000007a24 */
/* 0x002fc800078e0205 */
/*0070*/ IMAD R9, R0, c[0x0][0x0], R9 ; /* 0x0000000000097a24 */
/* 0x004fca00078e0209 */
/*0080*/ ISETP.GT.U32.AND P0, PT, R9, 0x1ff, PT ; /* 0x000001ff0900780c */
/* 0x000fda0003f04070 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ULDC.64 UR8, c[0x0][0x160] ; /* 0x0000580000087ab9 */
/* 0x000fe40000000a00 */
/*00b0*/ UIADD3 UR5, UP1, UR8, 0x1800, URZ ; /* 0x0000180008057890 */
/* 0x000fe4000ff3e03f */
/*00c0*/ ULDC.S8 UR4, c[0x0][0x174] ; /* 0x00005d0000047ab9 */
/* 0x000fe40000000200 */
/*00d0*/ UISETP.NE.AND UP0, UPT, UR4, URZ, UPT ; /* 0x0000003f0400728c */
/* 0x000fe4000bf05270 */
/*00e0*/ UIADD3.X UR6, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f067290 */
/* 0x000fe40008ffe43f */
/*00f0*/ USEL UR4, UR5, UR8, !UP0 ; /* 0x0000000805047287 */
/* 0x000fc4000c000000 */
/*0100*/ USEL UR7, UR6, UR9, !UP0 ; /* 0x0000000906077287 */
/* 0x000fe4000c000000 */
/*0110*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */
/* 0x000fe40000000a00 */
/*0120*/ MOV R2, UR4 ; /* 0x0000000400027c02 */
/* 0x000fe40008000f00 */
/*0130*/ MOV R3, UR7 ; /* 0x0000000700037c02 */
/* 0x000fca0008000f00 */
/*0140*/ IMAD.WIDE.U32 R4, R9, 0xc, R2 ; /* 0x0000000c09047825 */
/* 0x000fca00078e0002 */
/*0150*/ LDG.E R13, [R4.64] ; /* 0x0000000a040d7981 */
/* 0x000ea2000c1e1900 */
/*0160*/ USEL UR4, UR5, UR8, UP0 ; /* 0x0000000805047287 */
/* 0x000fe40008000000 */
/*0170*/ USEL UR5, UR6, UR9, UP0 ; /* 0x0000000906057287 */
/* 0x000fc80008000000 */
/*0180*/ MOV R6, UR4 ; /* 0x0000000400067c02 */
/* 0x000fe40008000f00 */
/*0190*/ MOV R7, UR5 ; /* 0x0000000500077c02 */
/* 0x000fca0008000f00 */
/*01a0*/ IMAD.WIDE.U32 R6, R9, 0xc, R6 ; /* 0x0000000c09067825 */
/* 0x000fca00078e0006 */
/*01b0*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */
/* 0x0041e8000c10190a */
/*01c0*/ LDG.E R15, [R4.64+0x4] ; /* 0x0000040a040f7981 */
/* 0x000ea8000c1e1900 */
/*01d0*/ STG.E [R6.64+0x4], R15 ; /* 0x0000040f06007986 */
/* 0x004fe8000c10190a */
/*01e0*/ LDG.E R17, [R4.64+0x8] ; /* 0x0000080a04117981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ STG.E [R6.64+0x8], R17 ; /* 0x0000081106007986 */
/* 0x004fe8000c10190a */
/*0200*/ LDG.E R0, [R4.64+0x4] ; /* 0x0000040a04007981 */
/* 0x000ea2000c1e1900 */
/*0210*/ F2F.F64.F32 R10, R15 ; /* 0x0000000f000a7310 */
/* 0x000ff00000201800 */
/*0220*/ F2F.F64.F32 R8, R0 ; /* 0x0000000000087310 */
/* 0x004e640000201800 */
/*0230*/ DFMA R8, R8, 2, R10 ; /* 0x400000000808782b */
/* 0x002e54000000000a */
/*0240*/ F2F.F32.F64 R9, R8 ; /* 0x0000000800097310 */
/* 0x002e640000301000 */
/*0250*/ STG.E [R6.64+0x4], R9 ; /* 0x0000040906007986 */
/* 0x0023e8000c10190a */
/*0260*/ LDG.E R10, [R4.64] ; /* 0x0000000a040a7981 */
/* 0x000ea8000c1e1900 */
/*0270*/ LDG.E R11, [R4.64+0x8] ; /* 0x0000080a040b7981 */
/* 0x000ea4000c1e1900 */
/*0280*/ FADD R10, -R10, R11 ; /* 0x0000000b0a0a7221 */
/* 0x004fc80000000100 */
/*0290*/ FADD R11, R9, R10 ; /* 0x0000000a090b7221 */
/* 0x000fca0000000000 */
/*02a0*/ STG.E [R6.64+0x4], R11 ; /* 0x0000040b06007986 */
/* 0x000fe8000c10190a */
/*02b0*/ LDG.E R2, [R2.64+0x8] ; /* 0x0000080a02027981 */
/* 0x000ea8000c1e1900 */
/*02c0*/ LDG.E R13, [R4.64+0x8] ; /* 0x0000080a040d7981 */
/* 0x001ea8000c1e1900 */
/*02d0*/ LDG.E R0, [R4.64] ; /* 0x0000000a04007981 */
/* 0x000ee2000c1e1900 */
/*02e0*/ FSETP.GT.AND P0, PT, R13, R2, PT ; /* 0x000000020d00720b */
/* 0x004fc80003f04000 */
/*02f0*/ FSEL R13, R13, R2, P0 ; /* 0x000000020d0d7208 */
/* 0x000fca0000000000 */
/*0300*/ FADD R0, R13, -R0 ; /* 0x800000000d007221 */
/* 0x008fc80000000000 */
/*0310*/ FADD R9, R11, R0 ; /* 0x000000000b097221 */
/* 0x002fca0000000000 */
/*0320*/ STG.E [R6.64+0x4], R9 ; /* 0x0000040906007986 */
/* 0x000fe2000c10190a */
/*0330*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0340*/ BRA 0x340; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0380*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0390*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*03f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3psoP9blockDatafffb
.globl _Z3psoP9blockDatafffb
.p2align 8
.type _Z3psoP9blockDatafffb,@function
_Z3psoP9blockDatafffb:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 0x200, v0
s_cbranch_execz .LBB0_2
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, 1, s2
s_add_u32 s4, s0, 0x1800
s_addc_u32 s5, s1, 0
s_cmp_eq_u32 s2, 1
s_cselect_b32 s3, s1, s5
s_cselect_b32 s2, s0, s4
s_cselect_b32 s1, s5, s1
v_mad_u64_u32 v[1:2], null, v0, 12, s[2:3]
s_cselect_b32 s0, s4, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v0, 12, s[0:1]
global_load_b32 v5, v[1:2], off
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v5, off
global_load_b32 v0, v[1:2], off offset:4
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v0, off offset:4
global_load_b32 v5, v[1:2], off offset:8
s_waitcnt vmcnt(0)
global_store_b32 v[3:4], v5, off offset:8
global_load_b32 v7, v[1:2], off offset:4
v_cvt_f64_f32_e32 v[5:6], v0
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[7:8], v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[5:6], v[7:8], 2.0, v[5:6]
v_cvt_f32_f64_e32 v0, v[5:6]
global_store_b32 v[3:4], v0, off offset:4
s_clause 0x1
global_load_b32 v5, v[1:2], off offset:8
global_load_b32 v6, v[1:2], off
s_waitcnt vmcnt(0)
v_sub_f32_e32 v5, v5, v6
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v0, v5, v0 :: v_dual_mov_b32 v5, 0
global_store_b32 v[3:4], v0, off offset:4
s_clause 0x2
global_load_b32 v5, v5, s[2:3] offset:8
global_load_b32 v6, v[1:2], off offset:8
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(1)
v_cmp_gt_f32_e32 vcc_lo, v6, v5
v_cndmask_b32_e32 v2, v5, v6, vcc_lo
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_f32_e32 v1, v2, v1
v_add_f32_e32 v0, v0, v1
global_store_b32 v[3:4], v0, off offset:4
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3psoP9blockDatafffb
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3psoP9blockDatafffb, .Lfunc_end0-_Z3psoP9blockDatafffb
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 1
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3psoP9blockDatafffb
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3psoP9blockDatafffb.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017f288_00000000-6_pso_v1.0.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z4initP8particleS0_j
.type _Z4initP8particleS0_j, @function
_Z4initP8particleS0_j:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z4initP8particleS0_j, .-_Z4initP8particleS0_j
.globl _Z6globalP8particlejj
.type _Z6globalP8particlejj, @function
_Z6globalP8particlejj:
.LFB2058:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2058:
.size _Z6globalP8particlejj, .-_Z6globalP8particlejj
.globl _Z8inertialP8particleS0_j
.type _Z8inertialP8particleS0_j, @function
_Z8inertialP8particleS0_j:
.LFB2059:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z8inertialP8particleS0_j, .-_Z8inertialP8particleS0_j
.globl _Z9cognitiveP8particleS0_j
.type _Z9cognitiveP8particleS0_j, @function
_Z9cognitiveP8particleS0_j:
.LFB2060:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2060:
.size _Z9cognitiveP8particleS0_j, .-_Z9cognitiveP8particleS0_j
.globl _Z6socialP8particleS0_j
.type _Z6socialP8particleS0_j, @function
_Z6socialP8particleS0_j:
.LFB2061:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2061:
.size _Z6socialP8particleS0_j, .-_Z6socialP8particleS0_j
.globl main
.type main, @function
main:
.LFB2062:
.cfi_startproc
endbr64
movl $0, %eax
ret
.cfi_endproc
.LFE2062:
.size main, .-main
.globl _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
.type _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb, @function
_Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb:
.LFB2087:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movss %xmm2, 12(%rsp)
movb %sil, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3psoP9blockDatafffb(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb, .-_Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
.globl _Z3psoP9blockDatafffb
.type _Z3psoP9blockDatafffb, @function
_Z3psoP9blockDatafffb:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movzbl %sil, %esi
call _Z35__device_stub__Z3psoP9blockDatafffbP9blockDatafffb
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z3psoP9blockDatafffb, .-_Z3psoP9blockDatafffb
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3psoP9blockDatafffb"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3psoP9blockDatafffb(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "pso_v1.0.hip"
.globl _Z18__device_stub__psoP9blockDatafffb # -- Begin function _Z18__device_stub__psoP9blockDatafffb
.p2align 4, 0x90
.type _Z18__device_stub__psoP9blockDatafffb,@function
_Z18__device_stub__psoP9blockDatafffb: # @_Z18__device_stub__psoP9blockDatafffb
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movss %xmm2, 12(%rsp)
movb %sil, 11(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 11(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3psoP9blockDatafffb, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z18__device_stub__psoP9blockDatafffb, .Lfunc_end0-_Z18__device_stub__psoP9blockDatafffb
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
xorl %eax, %eax
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3psoP9blockDatafffb, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z3psoP9blockDatafffb,@object # @_Z3psoP9blockDatafffb
.section .rodata,"a",@progbits
.globl _Z3psoP9blockDatafffb
.p2align 3, 0x0
_Z3psoP9blockDatafffb:
.quad _Z18__device_stub__psoP9blockDatafffb
.size _Z3psoP9blockDatafffb, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z3psoP9blockDatafffb"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__psoP9blockDatafffb
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3psoP9blockDatafffb
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} | code for sm_80
Function : _Z11addForces_kP6float2iiiiffim
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e220000002200 */
/*0020*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff037624 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff0b7624 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e620000002100 */
/*0060*/ IADD3 R0, R7, c[0x0][0x174], RZ ; /* 0x00005d0007007a10 */
/* 0x001fc80007ffe0ff */
/*0070*/ SHF.R.S32.HI R2, RZ, 0x1f, R0 ; /* 0x0000001fff027819 */
/* 0x000fe40000011400 */
/*0080*/ SHF.R.S32.HI R4, RZ, 0x1f, R6 ; /* 0x0000001fff047819 */
/* 0x002fe40000011406 */
/*0090*/ IADD3 R5, P0, R6, c[0x0][0x170], RZ ; /* 0x00005c0006057a10 */
/* 0x000fe20007f1e0ff */
/*00a0*/ IMAD R9, R2, c[0x0][0x188], RZ ; /* 0x0000620002097a24 */
/* 0x000fe400078e02ff */
/*00b0*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0003 */
/*00c0*/ IMAD R9, R0, c[0x0][0x18c], R9 ; /* 0x0000630000097a24 */
/* 0x000fe200078e0209 */
/*00d0*/ LEA.HI.X.SX32 R0, R11, R4, 0x1, P0 ; /* 0x000000040b007211 */
/* 0x000fe400000f0eff */
/*00e0*/ LEA R4, P0, R5, R2, 0x3 ; /* 0x0000000205047211 */
/* 0x000fe200078018ff */
/*00f0*/ IMAD.IADD R2, R3, 0x1, R9 ; /* 0x0000000103027824 */
/* 0x000fca00078e0209 */
/*0100*/ LEA.HI.X R5, R5, R2, R0, 0x3, P0 ; /* 0x0000000205057211 */
/* 0x000fca00000f1c00 */
/*0110*/ LDG.E.64 R2, [R4.64] ; /* 0x0000000404027981 */
/* 0x000162000c1e1b00 */
/*0120*/ IADD3 R0, R6, -c[0x0][0x180], RZ ; /* 0x8000600006007a10 */
/* 0x000fe20007ffe0ff */
/*0130*/ BSSY B0, 0x2a0 ; /* 0x0000016000007945 */
/* 0x000fe20003800000 */
/*0140*/ IADD3 R6, R7, -c[0x0][0x180], RZ ; /* 0x8000600007067a10 */
/* 0x000fc60007ffe0ff */
/*0150*/ IMAD R0, R0, R0, RZ ; /* 0x0000000000007224 */
/* 0x000fe400078e02ff */
/*0160*/ IMAD R6, R6, R6, RZ ; /* 0x0000000606067224 */
/* 0x000fe400078e02ff */
/*0170*/ IMAD R0, R0, R0, RZ ; /* 0x0000000000007224 */
/* 0x000fe400078e02ff */
/*0180*/ IMAD R7, R6, R6, RZ ; /* 0x0000000606077224 */
/* 0x000fc800078e02ff */
/*0190*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x000e700000201400 */
/*01a0*/ I2F R7, R7 ; /* 0x0000000700077306 */
/* 0x000ea20000201400 */
/*01b0*/ FADD R6, R0, 1 ; /* 0x3f80000000067421 */
/* 0x002fc80000000000 */
/*01c0*/ FADD R6, R6, R7 ; /* 0x0000000706067221 */
/* 0x004fca0000000000 */
/*01d0*/ IADD3 R8, R6, 0x1800000, RZ ; /* 0x0180000006087810 */
/* 0x000fc80007ffe0ff */
/*01e0*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000008087812 */
/* 0x000fc800078ec0ff */
/*01f0*/ ISETP.GT.U32.AND P0, PT, R8, 0x1ffffff, PT ; /* 0x01ffffff0800780c */
/* 0x000fda0003f04070 */
/*0200*/ @P0 BRA 0x250 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0210*/ MOV R0, 0x230 ; /* 0x0000023000007802 */
/* 0x001fe40000000f00 */
/*0220*/ CALL.REL.NOINC 0x2e0 ; /* 0x000000b000007944 */
/* 0x020fea0003c00000 */
/*0230*/ IMAD.MOV.U32 R0, RZ, RZ, R8 ; /* 0x000000ffff007224 */
/* 0x000fe200078e0008 */
/*0240*/ BRA 0x290 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0250*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x001e240000001000 */
/*0260*/ FFMA R0, R6, R7, -1 ; /* 0xbf80000006007423 */
/* 0x001fc80000000007 */
/*0270*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */
/* 0x000fc80000010100 */
/*0280*/ FFMA R0, R7, R0, R7 ; /* 0x0000000007007223 */
/* 0x000fe40000000007 */
/*0290*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02a0*/ FFMA R3, R0.reuse, c[0x0][0x17c], R3 ; /* 0x00005f0000037a23 */
/* 0x060fe40000000003 */
/*02b0*/ FFMA R2, R0, c[0x0][0x178], R2 ; /* 0x00005e0000027a23 */
/* 0x000fca0000000002 */
/*02c0*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x000fe2000c101b04 */
/*02d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02e0*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fe200078e00ff */
/*02f0*/ BSSY B1, 0x600 ; /* 0x0000030000017945 */
/* 0x000fe80003800000 */
/*0300*/ SHF.R.U32.HI R7, RZ, 0x18, R7 ; /* 0x00000018ff077819 */
/* 0x000fc80000011607 */
/*0310*/ ISETP.NE.U32.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05070 */
/*0320*/ @P0 BRA 0x3d0 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0330*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fca00078e00ff */
/*0340*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05270 */
/*0350*/ @P0 FFMA R8, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006080823 */
/* 0x000fe200000000ff */
/*0360*/ @!P0 MUFU.RCP R7, R6 ; /* 0x0000000600078308 */
/* 0x000ff00000001000 */
/*0370*/ @P0 MUFU.RCP R9, R8 ; /* 0x0000000800090308 */
/* 0x000e240000001000 */
/*0380*/ @P0 FFMA R10, R8, R9, -1 ; /* 0xbf800000080a0423 */
/* 0x001fc80000000009 */
/*0390*/ @P0 FADD.FTZ R10, -R10, -RZ ; /* 0x800000ff0a0a0221 */
/* 0x000fc80000010100 */
/*03a0*/ @P0 FFMA R10, R9, R10, R9 ; /* 0x0000000a090a0223 */
/* 0x000fc80000000009 */
/*03b0*/ @P0 FFMA R7, R10, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000a070823 */
/* 0x000fe200000000ff */
/*03c0*/ BRA 0x5f0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*03d0*/ IADD3 R8, R7, -0xfd, RZ ; /* 0xffffff0307087810 */
/* 0x000fc80007ffe0ff */
/*03e0*/ ISETP.GT.U32.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x000fda0003f04070 */
/*03f0*/ @P0 BRA 0x5e0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*0400*/ LOP3.LUT R9, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06097812 */
/* 0x000fe200078ec0ff */
/*0410*/ IMAD.MOV.U32 R13, RZ, RZ, 0x3 ; /* 0x00000003ff0d7424 */
/* 0x000fc600078e00ff */
/*0420*/ LOP3.LUT R9, R9, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000009097812 */
/* 0x000fe400078efcff */
/*0430*/ SHF.L.U32 R14, R13, R8, RZ ; /* 0x000000080d0e7219 */
/* 0x000fe400000006ff */
/*0440*/ MUFU.RCP R10, R9 ; /* 0x00000009000a7308 */
/* 0x000e240000001000 */
/*0450*/ FFMA R11, R9, R10, -1 ; /* 0xbf800000090b7423 */
/* 0x001fc8000000000a */
/*0460*/ FADD.FTZ R11, -R11, -RZ ; /* 0x800000ff0b0b7221 */
/* 0x000fc80000010100 */
/*0470*/ FFMA.RM R12, R10.reuse, R11.reuse, R10.reuse ; /* 0x0000000b0a0c7223 */
/* 0x1c0fe4000000400a */
/*0480*/ FFMA.RP R11, R10, R11, R10 ; /* 0x0000000b0a0b7223 */
/* 0x000fc6000000800a */
/*0490*/ LOP3.LUT R10, R12.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0c0a7812 */
/* 0x040fe400078ec0ff */
/*04a0*/ FSETP.NEU.FTZ.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720b */
/* 0x000fe40003f1d000 */
/*04b0*/ LOP3.LUT R11, R10, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000a0b7812 */
/* 0x000fe400078efcff */
/*04c0*/ SEL R10, RZ, 0xffffffff, !P0 ; /* 0xffffffffff0a7807 */
/* 0x000fe40004000000 */
/*04d0*/ LOP3.LUT R9, R14, R11, RZ, 0xc0, !PT ; /* 0x0000000b0e097212 */
/* 0x000fc600078ec0ff */
/*04e0*/ IMAD.MOV R10, RZ, RZ, -R10 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e0a0a */
/*04f0*/ SHF.R.U32.HI R9, RZ, R8, R9 ; /* 0x00000008ff097219 */
/* 0x000fc80000011609 */
/*0500*/ LOP3.LUT P1, RZ, R10, R8, R11, 0xf8, !PT ; /* 0x000000080aff7212 */
/* 0x000fe4000782f80b */
/*0510*/ LOP3.LUT P0, RZ, R9.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000109ff7812 */
/* 0x040fe4000780c0ff */
/*0520*/ LOP3.LUT P2, RZ, R9, 0x2, RZ, 0xc0, !PT ; /* 0x0000000209ff7812 */
/* 0x000fc8000784c0ff */
/*0530*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0540*/ LOP3.LUT P1, RZ, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06ff7812 */
/* 0x000fe4000782c0ff */
/*0550*/ SEL R8, RZ, 0x1, !P0 ; /* 0x00000001ff087807 */
/* 0x000fca0004000000 */
/*0560*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fca00078e0a08 */
/*0570*/ ISETP.GE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe40003f06270 */
/*0580*/ IADD3 R8, R7, -0xfc, RZ ; /* 0xffffff0407087810 */
/* 0x000fc80007ffe0ff */
/*0590*/ SHF.R.U32.HI R7, RZ, R8, R11 ; /* 0x00000008ff077219 */
/* 0x000fce000001160b */
/*05a0*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */
/* 0x000fca0007ffe0ff */
/*05b0*/ @!P1 IMAD.SHL.U32 R7, R7, 0x2, RZ ; /* 0x0000000207079824 */
/* 0x000fca00078e00ff */
/*05c0*/ LOP3.LUT R7, R7, 0x80000000, R6, 0xf8, !PT ; /* 0x8000000007077812 */
/* 0x000fe200078ef806 */
/*05d0*/ BRA 0x5f0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*05e0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x0000640000001000 */
/*05f0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0600*/ IMAD.MOV.U32 R8, RZ, RZ, R7 ; /* 0x000000ffff087224 */
/* 0x002fe400078e0007 */
/*0610*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */
/* 0x001fe400078e0000 */
/*0620*/ IMAD.MOV.U32 R7, RZ, RZ, 0x0 ; /* 0x00000000ff077424 */
/* 0x000fc800078e00ff */
/*0630*/ RET.REL.NODEC R6 0x0 ; /* 0xfffff9c006007950 */
/* 0x000fea0003c3ffff */
/*0640*/ BRA 0x640; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} | .file "tmpxft_0016d536_00000000-6_addForces_k.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
.type _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim, @function
_Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim:
.LFB2051:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movl %esi, 36(%rsp)
movl %edx, 32(%rsp)
movl %ecx, 28(%rsp)
movl %r8d, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 36(%rsp), %rax
movq %rax, 120(%rsp)
leaq 32(%rsp), %rax
movq %rax, 128(%rsp)
leaq 28(%rsp), %rax
movq %rax, 136(%rsp)
leaq 24(%rsp), %rax
movq %rax, 144(%rsp)
leaq 20(%rsp), %rax
movq %rax, 152(%rsp)
leaq 16(%rsp), %rax
movq %rax, 160(%rsp)
leaq 12(%rsp), %rax
movq %rax, 168(%rsp)
leaq 208(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z11addForces_kP6float2iiiiffim(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim, .-_Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
.globl _Z11addForces_kP6float2iiiiffim
.type _Z11addForces_kP6float2iiiiffim, @function
_Z11addForces_kP6float2iiiiffim:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
pushq 24(%rsp)
.cfi_def_cfa_offset 32
call _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z11addForces_kP6float2iiiiffim, .-_Z11addForces_kP6float2iiiiffim
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z11addForces_kP6float2iiiiffim"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11addForces_kP6float2iiiiffim(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.globl _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 8
.type _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@function
_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x28
s_load_b64 s[8:9], s[0:1], 0x0
v_bfe_u32 v4, v0, 10, 10
s_load_b32 s0, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, s5, v4
v_subrev_nc_u32_e32 v4, s0, v4
v_ashrrev_i32_e32 v5, 31, v3
v_mul_lo_u32 v6, v3, s3
v_mad_u64_u32 v[1:2], null, v3, s2, s[8:9]
s_ashr_i32 s3, s4, 31
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v5, s2
v_and_b32_e32 v5, 0x3ff, v0
s_mov_b32 s2, s4
v_mul_lo_u32 v4, v4, v4
s_lshl_b64 s[2:3], s[2:3], 3
v_lshlrev_b32_e32 v0, 3, v5
v_subrev_nc_u32_e32 v5, s0, v5
v_add3_u32 v2, v3, v2, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mul_lo_u32 v4, v4, v4
v_add_co_u32 v0, vcc_lo, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v2, vcc_lo
v_mul_lo_u32 v5, v5, v5
v_add_co_u32 v0, vcc_lo, v0, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cvt_f32_i32_e32 v4, v4
v_mul_lo_u32 v5, v5, v5
global_load_b64 v[2:3], v[0:1], off
v_cvt_f32_i32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, 1.0, v5
v_add_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v5, null, v4, v4, 1.0
v_div_scale_f32 v8, vcc_lo, 1.0, v4, 1.0
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v5, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, -v5, v7, v8
v_div_fmas_f32 v5, v5, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_div_fixup_f32 v4, v5, v4, 1.0
s_waitcnt vmcnt(0)
v_fma_f32 v2, s6, v4, v2
v_fmac_f32_e32 v3, s7, v4
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 48
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 10
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, .Lfunc_end0-_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 8
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 48
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.private_segment_fixed_size: 0
.sgpr_count: 12
.sgpr_spill_count: 0
.symbol: _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void addForces_k(float2 *v, int dx, int dy, int spx, int spy, float fx, float fy, int r, size_t pitch) {
int tx = threadIdx.x;
int ty = threadIdx.y;
float2 *fj = (float2*)((char*)v + (ty + spy) * pitch) + tx + spx;
float2 vterm = *fj;
tx -= r; ty -= r;
float s = 1.f / (1.f + tx*tx*tx*tx + ty*ty*ty*ty);
vterm.x += s * fx;
vterm.y += s * fy;
*fj = vterm;
} | .text
.file "addForces_k.hip"
.globl _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim # -- Begin function _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 4, 0x90
.type _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@function
_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim: # @_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movl %esi, 36(%rsp)
movl %edx, 32(%rsp)
movl %ecx, 28(%rsp)
movl %r8d, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rax
movq %rax, 112(%rsp)
leaq 28(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 176(%rsp), %rax
movq %rax, 160(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, .Lfunc_end0-_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@object # @_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.section .rodata,"a",@progbits
.globl _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 3, 0x0
_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim:
.quad _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.size _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim"
.size .L__unnamed_1, 49
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11addForces_kP6float2iiiiffim
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */
/* 0x000e220000002200 */
/*0020*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff037624 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff0b7624 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e620000002100 */
/*0060*/ IADD3 R0, R7, c[0x0][0x174], RZ ; /* 0x00005d0007007a10 */
/* 0x001fc80007ffe0ff */
/*0070*/ SHF.R.S32.HI R2, RZ, 0x1f, R0 ; /* 0x0000001fff027819 */
/* 0x000fe40000011400 */
/*0080*/ SHF.R.S32.HI R4, RZ, 0x1f, R6 ; /* 0x0000001fff047819 */
/* 0x002fe40000011406 */
/*0090*/ IADD3 R5, P0, R6, c[0x0][0x170], RZ ; /* 0x00005c0006057a10 */
/* 0x000fe20007f1e0ff */
/*00a0*/ IMAD R9, R2, c[0x0][0x188], RZ ; /* 0x0000620002097a24 */
/* 0x000fe400078e02ff */
/*00b0*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fc800078e0003 */
/*00c0*/ IMAD R9, R0, c[0x0][0x18c], R9 ; /* 0x0000630000097a24 */
/* 0x000fe200078e0209 */
/*00d0*/ LEA.HI.X.SX32 R0, R11, R4, 0x1, P0 ; /* 0x000000040b007211 */
/* 0x000fe400000f0eff */
/*00e0*/ LEA R4, P0, R5, R2, 0x3 ; /* 0x0000000205047211 */
/* 0x000fe200078018ff */
/*00f0*/ IMAD.IADD R2, R3, 0x1, R9 ; /* 0x0000000103027824 */
/* 0x000fca00078e0209 */
/*0100*/ LEA.HI.X R5, R5, R2, R0, 0x3, P0 ; /* 0x0000000205057211 */
/* 0x000fca00000f1c00 */
/*0110*/ LDG.E.64 R2, [R4.64] ; /* 0x0000000404027981 */
/* 0x000162000c1e1b00 */
/*0120*/ IADD3 R0, R6, -c[0x0][0x180], RZ ; /* 0x8000600006007a10 */
/* 0x000fe20007ffe0ff */
/*0130*/ BSSY B0, 0x2a0 ; /* 0x0000016000007945 */
/* 0x000fe20003800000 */
/*0140*/ IADD3 R6, R7, -c[0x0][0x180], RZ ; /* 0x8000600007067a10 */
/* 0x000fc60007ffe0ff */
/*0150*/ IMAD R0, R0, R0, RZ ; /* 0x0000000000007224 */
/* 0x000fe400078e02ff */
/*0160*/ IMAD R6, R6, R6, RZ ; /* 0x0000000606067224 */
/* 0x000fe400078e02ff */
/*0170*/ IMAD R0, R0, R0, RZ ; /* 0x0000000000007224 */
/* 0x000fe400078e02ff */
/*0180*/ IMAD R7, R6, R6, RZ ; /* 0x0000000606077224 */
/* 0x000fc800078e02ff */
/*0190*/ I2F R0, R0 ; /* 0x0000000000007306 */
/* 0x000e700000201400 */
/*01a0*/ I2F R7, R7 ; /* 0x0000000700077306 */
/* 0x000ea20000201400 */
/*01b0*/ FADD R6, R0, 1 ; /* 0x3f80000000067421 */
/* 0x002fc80000000000 */
/*01c0*/ FADD R6, R6, R7 ; /* 0x0000000706067221 */
/* 0x004fca0000000000 */
/*01d0*/ IADD3 R8, R6, 0x1800000, RZ ; /* 0x0180000006087810 */
/* 0x000fc80007ffe0ff */
/*01e0*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000008087812 */
/* 0x000fc800078ec0ff */
/*01f0*/ ISETP.GT.U32.AND P0, PT, R8, 0x1ffffff, PT ; /* 0x01ffffff0800780c */
/* 0x000fda0003f04070 */
/*0200*/ @P0 BRA 0x250 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*0210*/ MOV R0, 0x230 ; /* 0x0000023000007802 */
/* 0x001fe40000000f00 */
/*0220*/ CALL.REL.NOINC 0x2e0 ; /* 0x000000b000007944 */
/* 0x020fea0003c00000 */
/*0230*/ IMAD.MOV.U32 R0, RZ, RZ, R8 ; /* 0x000000ffff007224 */
/* 0x000fe200078e0008 */
/*0240*/ BRA 0x290 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0250*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x001e240000001000 */
/*0260*/ FFMA R0, R6, R7, -1 ; /* 0xbf80000006007423 */
/* 0x001fc80000000007 */
/*0270*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */
/* 0x000fc80000010100 */
/*0280*/ FFMA R0, R7, R0, R7 ; /* 0x0000000007007223 */
/* 0x000fe40000000007 */
/*0290*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*02a0*/ FFMA R3, R0.reuse, c[0x0][0x17c], R3 ; /* 0x00005f0000037a23 */
/* 0x060fe40000000003 */
/*02b0*/ FFMA R2, R0, c[0x0][0x178], R2 ; /* 0x00005e0000027a23 */
/* 0x000fca0000000002 */
/*02c0*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x000fe2000c101b04 */
/*02d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02e0*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fe200078e00ff */
/*02f0*/ BSSY B1, 0x600 ; /* 0x0000030000017945 */
/* 0x000fe80003800000 */
/*0300*/ SHF.R.U32.HI R7, RZ, 0x18, R7 ; /* 0x00000018ff077819 */
/* 0x000fc80000011607 */
/*0310*/ ISETP.NE.U32.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05070 */
/*0320*/ @P0 BRA 0x3d0 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*0330*/ IMAD.SHL.U32 R7, R6, 0x2, RZ ; /* 0x0000000206077824 */
/* 0x000fca00078e00ff */
/*0340*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */
/* 0x000fda0003f05270 */
/*0350*/ @P0 FFMA R8, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006080823 */
/* 0x000fe200000000ff */
/*0360*/ @!P0 MUFU.RCP R7, R6 ; /* 0x0000000600078308 */
/* 0x000ff00000001000 */
/*0370*/ @P0 MUFU.RCP R9, R8 ; /* 0x0000000800090308 */
/* 0x000e240000001000 */
/*0380*/ @P0 FFMA R10, R8, R9, -1 ; /* 0xbf800000080a0423 */
/* 0x001fc80000000009 */
/*0390*/ @P0 FADD.FTZ R10, -R10, -RZ ; /* 0x800000ff0a0a0221 */
/* 0x000fc80000010100 */
/*03a0*/ @P0 FFMA R10, R9, R10, R9 ; /* 0x0000000a090a0223 */
/* 0x000fc80000000009 */
/*03b0*/ @P0 FFMA R7, R10, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000a070823 */
/* 0x000fe200000000ff */
/*03c0*/ BRA 0x5f0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*03d0*/ IADD3 R8, R7, -0xfd, RZ ; /* 0xffffff0307087810 */
/* 0x000fc80007ffe0ff */
/*03e0*/ ISETP.GT.U32.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */
/* 0x000fda0003f04070 */
/*03f0*/ @P0 BRA 0x5e0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*0400*/ LOP3.LUT R9, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06097812 */
/* 0x000fe200078ec0ff */
/*0410*/ IMAD.MOV.U32 R13, RZ, RZ, 0x3 ; /* 0x00000003ff0d7424 */
/* 0x000fc600078e00ff */
/*0420*/ LOP3.LUT R9, R9, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000009097812 */
/* 0x000fe400078efcff */
/*0430*/ SHF.L.U32 R14, R13, R8, RZ ; /* 0x000000080d0e7219 */
/* 0x000fe400000006ff */
/*0440*/ MUFU.RCP R10, R9 ; /* 0x00000009000a7308 */
/* 0x000e240000001000 */
/*0450*/ FFMA R11, R9, R10, -1 ; /* 0xbf800000090b7423 */
/* 0x001fc8000000000a */
/*0460*/ FADD.FTZ R11, -R11, -RZ ; /* 0x800000ff0b0b7221 */
/* 0x000fc80000010100 */
/*0470*/ FFMA.RM R12, R10.reuse, R11.reuse, R10.reuse ; /* 0x0000000b0a0c7223 */
/* 0x1c0fe4000000400a */
/*0480*/ FFMA.RP R11, R10, R11, R10 ; /* 0x0000000b0a0b7223 */
/* 0x000fc6000000800a */
/*0490*/ LOP3.LUT R10, R12.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0c0a7812 */
/* 0x040fe400078ec0ff */
/*04a0*/ FSETP.NEU.FTZ.AND P0, PT, R12, R11, PT ; /* 0x0000000b0c00720b */
/* 0x000fe40003f1d000 */
/*04b0*/ LOP3.LUT R11, R10, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000a0b7812 */
/* 0x000fe400078efcff */
/*04c0*/ SEL R10, RZ, 0xffffffff, !P0 ; /* 0xffffffffff0a7807 */
/* 0x000fe40004000000 */
/*04d0*/ LOP3.LUT R9, R14, R11, RZ, 0xc0, !PT ; /* 0x0000000b0e097212 */
/* 0x000fc600078ec0ff */
/*04e0*/ IMAD.MOV R10, RZ, RZ, -R10 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e0a0a */
/*04f0*/ SHF.R.U32.HI R9, RZ, R8, R9 ; /* 0x00000008ff097219 */
/* 0x000fc80000011609 */
/*0500*/ LOP3.LUT P1, RZ, R10, R8, R11, 0xf8, !PT ; /* 0x000000080aff7212 */
/* 0x000fe4000782f80b */
/*0510*/ LOP3.LUT P0, RZ, R9.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000109ff7812 */
/* 0x040fe4000780c0ff */
/*0520*/ LOP3.LUT P2, RZ, R9, 0x2, RZ, 0xc0, !PT ; /* 0x0000000209ff7812 */
/* 0x000fc8000784c0ff */
/*0530*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0540*/ LOP3.LUT P1, RZ, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06ff7812 */
/* 0x000fe4000782c0ff */
/*0550*/ SEL R8, RZ, 0x1, !P0 ; /* 0x00000001ff087807 */
/* 0x000fca0004000000 */
/*0560*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fca00078e0a08 */
/*0570*/ ISETP.GE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe40003f06270 */
/*0580*/ IADD3 R8, R7, -0xfc, RZ ; /* 0xffffff0407087810 */
/* 0x000fc80007ffe0ff */
/*0590*/ SHF.R.U32.HI R7, RZ, R8, R11 ; /* 0x00000008ff077219 */
/* 0x000fce000001160b */
/*05a0*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */
/* 0x000fca0007ffe0ff */
/*05b0*/ @!P1 IMAD.SHL.U32 R7, R7, 0x2, RZ ; /* 0x0000000207079824 */
/* 0x000fca00078e00ff */
/*05c0*/ LOP3.LUT R7, R7, 0x80000000, R6, 0xf8, !PT ; /* 0x8000000007077812 */
/* 0x000fe200078ef806 */
/*05d0*/ BRA 0x5f0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*05e0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */
/* 0x0000640000001000 */
/*05f0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0600*/ IMAD.MOV.U32 R8, RZ, RZ, R7 ; /* 0x000000ffff087224 */
/* 0x002fe400078e0007 */
/*0610*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */
/* 0x001fe400078e0000 */
/*0620*/ IMAD.MOV.U32 R7, RZ, RZ, 0x0 ; /* 0x00000000ff077424 */
/* 0x000fc800078e00ff */
/*0630*/ RET.REL.NODEC R6 0x0 ; /* 0xfffff9c006007950 */
/* 0x000fea0003c3ffff */
/*0640*/ BRA 0x640; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.globl _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 8
.type _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@function
_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x28
s_load_b64 s[8:9], s[0:1], 0x0
v_bfe_u32 v4, v0, 10, 10
s_load_b32 s0, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v3, s5, v4
v_subrev_nc_u32_e32 v4, s0, v4
v_ashrrev_i32_e32 v5, 31, v3
v_mul_lo_u32 v6, v3, s3
v_mad_u64_u32 v[1:2], null, v3, s2, s[8:9]
s_ashr_i32 s3, s4, 31
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, v5, s2
v_and_b32_e32 v5, 0x3ff, v0
s_mov_b32 s2, s4
v_mul_lo_u32 v4, v4, v4
s_lshl_b64 s[2:3], s[2:3], 3
v_lshlrev_b32_e32 v0, 3, v5
v_subrev_nc_u32_e32 v5, s0, v5
v_add3_u32 v2, v3, v2, v6
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mul_lo_u32 v4, v4, v4
v_add_co_u32 v0, vcc_lo, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v1, vcc_lo, 0, v2, vcc_lo
v_mul_lo_u32 v5, v5, v5
v_add_co_u32 v0, vcc_lo, v0, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cvt_f32_i32_e32 v4, v4
v_mul_lo_u32 v5, v5, v5
global_load_b64 v[2:3], v[0:1], off
v_cvt_f32_i32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, 1.0, v5
v_add_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v5, null, v4, v4, 1.0
v_div_scale_f32 v8, vcc_lo, 1.0, v4, 1.0
v_rcp_f32_e32 v6, v5
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v5, v6, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, v7, v6
v_mul_f32_e32 v7, v8, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v9, -v5, v7, v8
v_fmac_f32_e32 v7, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v5, -v5, v7, v8
v_div_fmas_f32 v5, v5, v6, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_div_fixup_f32 v4, v5, v4, 1.0
s_waitcnt vmcnt(0)
v_fma_f32 v2, s6, v4, v2
v_fmac_f32_e32 v3, s7, v4
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 48
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 10
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, .Lfunc_end0-_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 8
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 48
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.private_segment_fixed_size: 0
.sgpr_count: 12
.sgpr_spill_count: 0
.symbol: _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016d536_00000000-6_addForces_k.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
.type _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim, @function
_Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim:
.LFB2051:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movl %esi, 36(%rsp)
movl %edx, 32(%rsp)
movl %ecx, 28(%rsp)
movl %r8d, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 36(%rsp), %rax
movq %rax, 120(%rsp)
leaq 32(%rsp), %rax
movq %rax, 128(%rsp)
leaq 28(%rsp), %rax
movq %rax, 136(%rsp)
leaq 24(%rsp), %rax
movq %rax, 144(%rsp)
leaq 20(%rsp), %rax
movq %rax, 152(%rsp)
leaq 16(%rsp), %rax
movq %rax, 160(%rsp)
leaq 12(%rsp), %rax
movq %rax, 168(%rsp)
leaq 208(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z11addForces_kP6float2iiiiffim(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim, .-_Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
.globl _Z11addForces_kP6float2iiiiffim
.type _Z11addForces_kP6float2iiiiffim, @function
_Z11addForces_kP6float2iiiiffim:
.LFB2052:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
pushq 24(%rsp)
.cfi_def_cfa_offset 32
call _Z45__device_stub__Z11addForces_kP6float2iiiiffimP6float2iiiiffim
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z11addForces_kP6float2iiiiffim, .-_Z11addForces_kP6float2iiiiffim
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z11addForces_kP6float2iiiiffim"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z11addForces_kP6float2iiiiffim(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "addForces_k.hip"
.globl _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim # -- Begin function _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 4, 0x90
.type _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@function
_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim: # @_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movl %esi, 36(%rsp)
movl %edx, 32(%rsp)
movl %ecx, 28(%rsp)
movl %r8d, 24(%rsp)
movss %xmm0, 20(%rsp)
movss %xmm1, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rax
movq %rax, 112(%rsp)
leaq 28(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 176(%rsp), %rax
movq %rax, 160(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, .Lfunc_end0-_Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim,@object # @_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.section .rodata,"a",@progbits
.globl _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.p2align 3, 0x0
_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim:
.quad _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.size _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim"
.size .L__unnamed_1, 49
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z26__device_stub__addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z11addForces_kP15HIP_vector_typeIfLj2EEiiiiffim
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <curand.h>
#include <curand_kernel.h>
//Constant Declarations:
#define POP_SIZE 2048
#define CHANCE 3
#define PERCENT_CROSS 0.2
//Function declarations:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, curandState_t* states);
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit);
void fitnessCalculation();
void evolution();
void mutation(char *mutant, int n);
void printPopulation();
char randChar();
int randNumb(int n);
__device__ char randCharDev(int targetSize);
__device__ int randNumbDev(int n);
//Global Variables:
char *target = "Hello";
char *population[POP_SIZE];
char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";
int fitness[POP_SIZE];
int best = 500;
int fit = 0;
int main()
{
srand((unsigned int)time(NULL));
//Variables
// char *target = "Hello"; //CPU
char *d_target; //GPU
// char *population[POP_SIZE]; //CPU
char *d_population[POP_SIZE]; //GPU
// char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` "; //CPU
char *d_charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";//GPU
// int fitness[POP_SIZE]; //CPU
int d_fitness[POP_SIZE];//GPU
// int best = 500; //CPU
int *d_best; //GPU
// int fit = 0; //CPU
int *d_fit; //GPU
//CPU memory allocation
for(int i = 0; i < POP_SIZE; i++) //CPU
{
population[i] =(char*)malloc(sizeof(char)*strlen(target));
}
for(int j = 0; j < POP_SIZE; j++) //GPU
{
d_population[j] =(char*)malloc(sizeof(char)*strlen(target));
}
//GPU memory allocation
cudaMalloc((char **)&d_target,sizeof(char)*strlen(target));
cudaMalloc((void **)&d_population,sizeof(population));
for (int k = 0; k < POP_SIZE; k++)
{
cudaMalloc((char**)&d_population[k],sizeof(char)*strlen(target));
}
cudaMalloc((char**)&d_charmap,sizeof(char)*strlen(charmap));
cudaMalloc((void**)&d_fitness,sizeof(fitness));
cudaMalloc((void**)&d_best,sizeof(int));
cudaMalloc((void**)&d_fit,sizeof(int));
//Sending data to GPU
cudaMemcpy(d_target,target,strlen(target)*sizeof(char),cudaMemcpyHostToDevice);
cudaMemcpy(d_charmap,charmap,strlen(charmap)*sizeof(char),cudaMemcpyHostToDevice);
cudaMemcpy(d_best,&best,sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(d_fit,&fit,sizeof(int),cudaMemcpyHostToDevice);
//Initializing random seed and allocating it both on CPU and GPU:
curandState_t* states;
unsigned int *h_seed = (unsigned int*)malloc(sizeof(unsigned int)*POP_SIZE);
srand(time(NULL));
for(int i=0;i<POP_SIZE;i++)
{
h_seed[i] = rand()%100000;
}
cudaMalloc((void**) &states, POP_SIZE * sizeof(curandState_t));
unsigned int *d_seed;
cudaMalloc((void**)&d_seed, sizeof(unsigned int)*POP_SIZE);
cudaMemcpy(d_seed, h_seed, sizeof(unsigned int)*POP_SIZE,cudaMemcpyHostToDevice);
//Initializing population:
clock_t start_pop = clock();
initialization<<<1,POP_SIZE>>>(population,target,strlen(target),d_charmap,strlen(charmap),d_seed,states);
clock_t finished_pop = clock();
double popInit_time = ((double)(finished_pop - start_pop)/CLOCKS_PER_SEC);
// Cleaning up random init:
cudaFree(states); cudaFree(d_seed);
free(h_seed);
//Copy result back:
cudaMemcpy(population,d_population,sizeof(population),cudaMemcpyDeviceToHost);
//Clean GPU:
cudaFree(d_target); cudaFree(d_charmap);
for(int p = 0; p < POP_SIZE; p++)
cudaFree(d_population[p]);
cudaFree(d_population);
//Calculating Fitness:
clock_t start_fitCalc = clock();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target, strlen(target), d_best, d_fit);
clock_t finished_fitCalc = clock();
double fitCalc_time = ((double)(finished_fitCalc - start_fitCalc)/CLOCKS_PER_SEC);
clock_t start_evol = clock();
evolution();
clock_t finished_evol = clock();
double evol_time = ((double)(finished_evol - start_evol)/CLOCKS_PER_SEC);
printPopulation();
///*
int nIterations = 0;
while(best)
{
evolution();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target,strlen(target),d_best,d_fit);
printPopulation();
nIterations++;
}
//*/
printf("InitTime: %f FitTime: %f Evol: %f nIterations: %d\n",popInit_time,fitCalc_time,evol_time,nIterations);
return 0;
}
// ================================================ GA Functions =============================================== //
// CUDA initialization:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, curandState_t* states)
{
curand_init(seed[threadIdx.x],threadIdx.x,0,&states[threadIdx.x]);
int randNumb = curand(&states[threadIdx.x])% charmapSize;
int index = blockDim.x * blockIdx.x + threadIdx.x;
for(int j = 0; j < targetSize; j++)
{
population[index][j] = charmap[randNumb];
randNumb = curand(&states[(threadIdx.x)+randNumb])% charmapSize;
}
population[index][targetSize] = '\0';
}
//The lesser the better. 0 is the optimal value:
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit)
{
int index = blockDim.x * blockIdx.x + threadIdx.x;
fitness[index] = 0;
for (int j = (int)sizeof(target)-1; j >= 0; j--)
{
fitness[index] += abs(target[j]-population[index][j]);
}
if(fitness[index] < *best)
{
*best = fitness[index];
*fit = index;
}
}
void fitnessCalculation()
{
int i = POP_SIZE-1;
int j;
while(i >= 0)
{
fitness[i] = 0;
for (j = (int)sizeof(target)-1; j >= 0; j--) {
fitness[i] += abs(target[j]-population[i][j]);
}
if(fitness[i] < best)
{
best = fitness[i];
fit = i;
}
i--;
}
}
void evolution()
{
int j = 0;
char *newBorn = population[fit];
int lucky;
for(int i = 0; i < POP_SIZE; i++)
{
while(1)
{
if(j >= POP_SIZE)
{
j = 0;
}
//Selection:
if(fitness[j] <= best)
{
newBorn = population[j];
//Mutation:
lucky = randNumb(POP_SIZE);
if(lucky != j)
{
mutation(population[lucky],randNumb(CHANCE));
}
fitnessCalculation();
j++;
break;
}
//Crossover:
else
{
for(int n = 0; n < strlen(target)*PERCENT_CROSS; n++)
{
population[j][randNumb(strlen(target))] = newBorn[randNumb(strlen(target))];
}
}
j++;
}
}
}
void mutation(char *mutant, int n)
{
for(int k = 0; k < n; k++)
{
mutant[randNumb(strlen(target))] = randChar();
}
}
// ================================================ End GA Steps =============================================== //
// Helper Functions:
void printPopulation()
{
for(int i = 0; i < POP_SIZE; i++)
{
printf("P: %s F: %d\n",population[i],fitness[i]);
}
printf("Target: %s\n",target);
printf("Best: %s - %d\n",population[fit],best);
}
char randChar()
{
return charmap[randNumb(strlen(charmap))];
}
int randNumb(int n)
{
return (rand()%(int)(n));
} | .file "tmpxft_0012d76b_00000000-6_parallel_ga.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2280:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2280:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z18fitnessCalculationv
.type _Z18fitnessCalculationv, @function
_Z18fitnessCalculationv:
.LFB2272:
.cfi_startproc
endbr64
movq target(%rip), %r8
leaq 8188+fitness(%rip), %r10
movl $2047, %r9d
leaq population(%rip), %r11
jmp .L6
.L5:
subq $1, %r9
subq $4, %r10
cmpq $-1, %r9
je .L9
.L6:
movq %r10, %rsi
movl $0, (%r10)
movq (%r11,%r9,8), %rdi
movl $7, %ecx
.L4:
movsbl (%r8,%rcx), %edx
movsbl (%rdi,%rcx), %eax
subl %eax, %edx
movl %edx, %eax
negl %eax
cmovs %edx, %eax
addl (%rsi), %eax
movl %eax, (%rsi)
subq $1, %rcx
cmpq $-1, %rcx
jne .L4
cmpl best(%rip), %eax
jge .L5
movl %eax, best(%rip)
movl %r9d, fit(%rip)
jmp .L5
.L9:
ret
.cfi_endproc
.LFE2272:
.size _Z18fitnessCalculationv, .-_Z18fitnessCalculationv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "P: %s F: %d\n"
.LC1:
.string "Target: %s\n"
.LC2:
.string "Best: %s - %d\n"
.text
.globl _Z15printPopulationv
.type _Z15printPopulationv, @function
_Z15printPopulationv:
.LFB2275:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
leaq fitness(%rip), %rbx
leaq population(%rip), %rbp
leaq 8192(%rbx), %r13
leaq .LC0(%rip), %r12
.L11:
movl (%rbx), %ecx
movq 0(%rbp), %rdx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
addq $8, %rbp
cmpq %r13, %rbx
jne .L11
movq target(%rip), %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movslq fit(%rip), %rdx
leaq population(%rip), %rax
movq (%rax,%rdx,8), %rdx
movl best(%rip), %ecx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2275:
.size _Z15printPopulationv, .-_Z15printPopulationv
.globl _Z8randCharv
.type _Z8randCharv, @function
_Z8randCharv:
.LFB2276:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq charmap(%rip), %rbp
movq %rbp, %rdi
call strlen@PLT
movq %rax, %rbx
call rand@PLT
cltd
idivl %ebx
movslq %edx, %rdx
movzbl 0(%rbp,%rdx), %eax
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2276:
.size _Z8randCharv, .-_Z8randCharv
.globl _Z8mutationPci
.type _Z8mutationPci, @function
_Z8mutationPci:
.LFB2274:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L21
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movq %rdi, %r14
movl %esi, %r13d
movl $0, %r12d
.L18:
call _Z8randCharv
movl %eax, %ebp
movq target(%rip), %rdi
call strlen@PLT
movq %rax, %rbx
call rand@PLT
cltd
idivl %ebx
movslq %edx, %rdx
movb %bpl, (%r14,%rdx)
addl $1, %r12d
cmpl %r12d, %r13d
jne .L18
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE2274:
.size _Z8mutationPci, .-_Z8mutationPci
.globl _Z9evolutionv
.type _Z9evolutionv, @function
_Z9evolutionv:
.LFB2273:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movslq fit(%rip), %rdx
leaq population(%rip), %rax
movq (%rax,%rdx,8), %r15
movl $2048, 12(%rsp)
movl $0, 8(%rsp)
movq %rax, %r14
jmp .L33
.L41:
movl 8(%rsp), %ebp
movq (%r14,%rax,8), %r15
call rand@PLT
cltd
shrl $21, %edx
leal (%rax,%rdx), %ebx
andl $2047, %ebx
subl %edx, %ebx
cmpl %ebx, %ebp
jne .L39
.L28:
call _Z18fitnessCalculationv
addl $1, 8(%rsp)
subl $1, 12(%rsp)
jne .L33
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L39:
.cfi_restore_state
call rand@PLT
movslq %eax, %rdx
imulq $1431655766, %rdx, %rdx
shrq $32, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,2), %edx
subl %edx, %eax
movl %eax, %esi
movslq %ebx, %rbx
movq (%r14,%rbx,8), %rdi
call _Z8mutationPci
jmp .L28
.L31:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
.L32:
mulsd .LC3(%rip), %xmm0
comisd %xmm1, %xmm0
jbe .L40
call rand@PLT
cltd
idivl %ebp
movslq %edx, %rdx
movzbl (%r15,%rdx), %r12d
movq (%r14,%r13,8), %rbp
movq target(%rip), %rdi
call strlen@PLT
movq %rax, (%rsp)
call rand@PLT
cltd
idivl (%rsp)
movslq %edx, %rdx
movb %r12b, 0(%rbp,%rdx)
addl $1, %ebx
.L27:
movq target(%rip), %rdi
call strlen@PLT
movq %rax, %rbp
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
testq %rax, %rax
js .L31
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L32
.L40:
addl $1, 8(%rsp)
.L33:
movl 8(%rsp), %ecx
cmpl $2048, %ecx
movl $0, %eax
cmovl %ecx, %eax
movl %eax, 8(%rsp)
cltq
leaq fitness(%rip), %rsi
movl best(%rip), %ecx
cmpl %ecx, (%rsi,%rax,4)
jle .L41
movl $0, %ebx
movslq 8(%rsp), %r13
jmp .L27
.cfi_endproc
.LFE2273:
.size _Z9evolutionv, .-_Z9evolutionv
.globl _Z8randNumbi
.type _Z8randNumbi, @function
_Z8randNumbi:
.LFB2277:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movl %edi, %ebx
call rand@PLT
cltd
idivl %ebx
movl %edx, %eax
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2277:
.size _Z8randNumbi, .-_Z8randNumbi
.globl _Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW
.type _Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW, @function
_Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW:
.LFB2302:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movl %edx, 28(%rsp)
movq %rcx, 16(%rsp)
movl %r8d, 24(%rsp)
movq %r9, 8(%rsp)
movq 192(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 28(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 24(%rsp), %rax
movq %rax, 144(%rsp)
leaq 8(%rsp), %rax
movq %rax, 152(%rsp)
movq %rsp, %rax
movq %rax, 160(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L48
.L44:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L49
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L48:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z14initializationPPcS_iS_iPjP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L44
.L49:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2302:
.size _Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW, .-_Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW
.globl _Z14initializationPPcS_iS_iPjP17curandStateXORWOW
.type _Z14initializationPPcS_iS_iPjP17curandStateXORWOW, @function
_Z14initializationPPcS_iS_iPjP17curandStateXORWOW:
.LFB2303:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
pushq 24(%rsp)
.cfi_def_cfa_offset 32
call _Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW
addq $24, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2303:
.size _Z14initializationPPcS_iS_iPjP17curandStateXORWOW, .-_Z14initializationPPcS_iS_iPjP17curandStateXORWOW
.globl _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_
.type _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_, @function
_Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_:
.LFB2304:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movq %r8, 8(%rsp)
movq %r9, (%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movq %rsp, %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L56
.L52:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L57
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L56:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z18fitnessCalculationPiPPcS0_iS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L52
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2304:
.size _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_, .-_Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_
.globl _Z18fitnessCalculationPiPPcS0_iS_S_
.type _Z18fitnessCalculationPiPPcS0_iS_S_, @function
_Z18fitnessCalculationPiPPcS0_iS_S_:
.LFB2305:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2305:
.size _Z18fitnessCalculationPiPPcS0_iS_S_, .-_Z18fitnessCalculationPiPPcS0_iS_S_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` "
.align 8
.LC6:
.string "InitTime: %f FitTime: %f Evol: %f nIterations: %d\n"
.text
.globl main
.type main, @function
main:
.LFB2271:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
leaq -24576(%rsp), %r11
.cfi_def_cfa 11, 24632
.LPSRL0:
subq $4096, %rsp
orq $0, (%rsp)
cmpq %r11, %rsp
jne .LPSRL0
.cfi_def_cfa_register 7
subq $104, %rsp
.cfi_def_cfa_offset 24736
movq %fs:40, %rax
movq %rax, 24664(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
leaq .LC4(%rip), %rax
movq %rax, 16(%rsp)
leaq population(%rip), %rbx
leaq 16384(%rbx), %rbp
.L61:
movq target(%rip), %r13
movq %r13, %rdi
call strlen@PLT
movq %rax, %rdi
call malloc@PLT
movq %rax, (%rbx)
addq $8, %rbx
cmpq %rbp, %rbx
jne .L61
leaq 8272(%rsp), %rbx
leaq 24656(%rsp), %r12
movq %rbx, %rbp
.L62:
movq %r13, %rdi
call strlen@PLT
movq %rax, %rdi
call malloc@PLT
movq %rax, 0(%rbp)
addq $8, %rbp
cmpq %r12, %rbp
jne .L62
movq %r13, %rdi
call strlen@PLT
movq %rax, %rsi
leaq 8(%rsp), %rdi
call cudaMalloc@PLT
leaq 8272(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
movq %rbx, %rbp
.L63:
movq target(%rip), %rdi
call strlen@PLT
movq %rax, %rsi
movq %rbp, %rdi
call cudaMalloc@PLT
addq $8, %rbp
cmpq %r12, %rbp
jne .L63
movq charmap(%rip), %rdi
call strlen@PLT
movq %rax, %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
leaq 80(%rsp), %rdi
movl $8192, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movq target(%rip), %rbp
movq %rbp, %rdi
call strlen@PLT
movq %rax, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movq charmap(%rip), %rbp
movq %rbp, %rdi
call strlen@PLT
movq %rax, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4, %edx
leaq best(%rip), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4, %edx
leaq fit(%rip), %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $8192, %edi
call malloc@PLT
movq %rax, %r14
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movq %r14, %rbp
leaq 8192(%r14), %r13
.L64:
call rand@PLT
movslq %eax, %rdx
imulq $351843721, %rdx, %rdx
sarq $45, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $100000, %edx, %edx
subl %edx, %eax
movl %eax, 0(%rbp)
addq $4, %rbp
cmpq %r13, %rbp
jne .L64
leaq 40(%rsp), %rdi
movl $98304, %esi
call cudaMalloc@PLT
leaq 48(%rsp), %rdi
movl $8192, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $8192, %edx
movq %r14, %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %rbp
movl $2048, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L79
.L65:
call clock@PLT
subq %rbp, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC5(%rip), %xmm0
movq %xmm0, %rbp
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
movq %r14, %rdi
call free@PLT
leaq 8272(%rsp), %rsi
movl $2, %ecx
movl $16384, %edx
leaq population(%rip), %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
.L66:
movq (%rbx), %rdi
call cudaFree@PLT
addq $8, %rbx
cmpq %r12, %rbx
jne .L66
leaq 8272(%rsp), %rdi
call cudaFree@PLT
call clock@PLT
movq %rax, %rbx
movl $2048, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L80
.L67:
call clock@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC5(%rip), %xmm0
movq %xmm0, %r12
call clock@PLT
movq %rax, %rbx
call _Z9evolutionv
call clock@PLT
subq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC5(%rip), %xmm0
movq %xmm0, %r13
call _Z15printPopulationv
movl best(%rip), %ebx
testl %ebx, %ebx
je .L68
movl $0, %ebx
leaq population(%rip), %r14
jmp .L70
.L79:
movq charmap(%rip), %rdi
call strlen@PLT
movq %rax, %r15
movq target(%rip), %r13
movq %r13, %rdi
call strlen@PLT
subq $8, %rsp
.cfi_def_cfa_offset 24744
pushq 48(%rsp)
.cfi_def_cfa_offset 24752
movq 64(%rsp), %r9
movl %r15d, %r8d
movq 32(%rsp), %rcx
movl %eax, %edx
movq %r13, %rsi
leaq population(%rip), %rdi
call _Z63__device_stub__Z14initializationPPcS_iS_iPjP17curandStateXORWOWPPcS_iS_iPjP17curandStateXORWOW
addq $16, %rsp
.cfi_def_cfa_offset 24736
jmp .L65
.L80:
movq target(%rip), %r12
movq %r12, %rdi
call strlen@PLT
leaq 80(%rsp), %rdi
movq 32(%rsp), %r9
movq 24(%rsp), %r8
movl %eax, %ecx
movq %r12, %rdx
leaq population(%rip), %rsi
call _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_
jmp .L67
.L69:
call _Z15printPopulationv
addl $1, %ebx
cmpl $0, best(%rip)
je .L68
.L70:
call _Z9evolutionv
movl $2048, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L69
movq target(%rip), %r15
movq %r15, %rdi
call strlen@PLT
leaq 80(%rsp), %rdi
movq 32(%rsp), %r9
movq 24(%rsp), %r8
movl %eax, %ecx
movq %r15, %rdx
movq %r14, %rsi
call _Z49__device_stub__Z18fitnessCalculationPiPPcS0_iS_S_PiPPcS0_iS_S_
jmp .L69
.L68:
movl %ebx, %edx
movq %r13, %xmm2
movq %r12, %xmm1
movq %rbp, %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $3, %eax
call __printf_chk@PLT
movq 24664(%rsp), %rax
subq %fs:40, %rax
jne .L81
movl $0, %eax
addq $24680, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L81:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2271:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC7:
.string "_Z18fitnessCalculationPiPPcS0_iS_S_"
.align 8
.LC8:
.string "_Z14initializationPPcS_iS_iPjP17curandStateXORWOW"
.section .rodata.str1.1
.LC9:
.string "precalc_xorwow_matrix"
.LC10:
.string "precalc_xorwow_offset_matrix"
.LC11:
.string "mrg32k3aM1"
.LC12:
.string "mrg32k3aM2"
.LC13:
.string "mrg32k3aM1SubSeq"
.LC14:
.string "mrg32k3aM2SubSeq"
.LC15:
.string "mrg32k3aM1Seq"
.LC16:
.string "mrg32k3aM2Seq"
.LC17:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2307:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z18fitnessCalculationPiPPcS0_iS_S_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z14initializationPPcS_iS_iPjP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC16(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC17(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2307:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl fit
.bss
.align 4
.type fit, @object
.size fit, 4
fit:
.zero 4
.globl best
.data
.align 4
.type best, @object
.size best, 4
best:
.long 500
.globl fitness
.bss
.align 32
.type fitness, @object
.size fitness, 8192
fitness:
.zero 8192
.globl charmap
.section .data.rel.local,"aw"
.align 8
.type charmap, @object
.size charmap, 8
charmap:
.quad .LC4
.globl population
.bss
.align 32
.type population, @object
.size population, 16384
population:
.zero 16384
.globl target
.section .rodata.str1.1
.LC18:
.string "Hello"
.section .data.rel.local
.align 8
.type target, @object
.size target, 8
target:
.quad .LC18
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long -1717986918
.long 1070176665
.align 8
.LC5:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <curand.h>
#include <curand_kernel.h>
//Constant Declarations:
#define POP_SIZE 2048
#define CHANCE 3
#define PERCENT_CROSS 0.2
//Function declarations:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, curandState_t* states);
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit);
void fitnessCalculation();
void evolution();
void mutation(char *mutant, int n);
void printPopulation();
char randChar();
int randNumb(int n);
__device__ char randCharDev(int targetSize);
__device__ int randNumbDev(int n);
//Global Variables:
char *target = "Hello";
char *population[POP_SIZE];
char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";
int fitness[POP_SIZE];
int best = 500;
int fit = 0;
int main()
{
srand((unsigned int)time(NULL));
//Variables
// char *target = "Hello"; //CPU
char *d_target; //GPU
// char *population[POP_SIZE]; //CPU
char *d_population[POP_SIZE]; //GPU
// char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` "; //CPU
char *d_charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";//GPU
// int fitness[POP_SIZE]; //CPU
int d_fitness[POP_SIZE];//GPU
// int best = 500; //CPU
int *d_best; //GPU
// int fit = 0; //CPU
int *d_fit; //GPU
//CPU memory allocation
for(int i = 0; i < POP_SIZE; i++) //CPU
{
population[i] =(char*)malloc(sizeof(char)*strlen(target));
}
for(int j = 0; j < POP_SIZE; j++) //GPU
{
d_population[j] =(char*)malloc(sizeof(char)*strlen(target));
}
//GPU memory allocation
cudaMalloc((char **)&d_target,sizeof(char)*strlen(target));
cudaMalloc((void **)&d_population,sizeof(population));
for (int k = 0; k < POP_SIZE; k++)
{
cudaMalloc((char**)&d_population[k],sizeof(char)*strlen(target));
}
cudaMalloc((char**)&d_charmap,sizeof(char)*strlen(charmap));
cudaMalloc((void**)&d_fitness,sizeof(fitness));
cudaMalloc((void**)&d_best,sizeof(int));
cudaMalloc((void**)&d_fit,sizeof(int));
//Sending data to GPU
cudaMemcpy(d_target,target,strlen(target)*sizeof(char),cudaMemcpyHostToDevice);
cudaMemcpy(d_charmap,charmap,strlen(charmap)*sizeof(char),cudaMemcpyHostToDevice);
cudaMemcpy(d_best,&best,sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(d_fit,&fit,sizeof(int),cudaMemcpyHostToDevice);
//Initializing random seed and allocating it both on CPU and GPU:
curandState_t* states;
unsigned int *h_seed = (unsigned int*)malloc(sizeof(unsigned int)*POP_SIZE);
srand(time(NULL));
for(int i=0;i<POP_SIZE;i++)
{
h_seed[i] = rand()%100000;
}
cudaMalloc((void**) &states, POP_SIZE * sizeof(curandState_t));
unsigned int *d_seed;
cudaMalloc((void**)&d_seed, sizeof(unsigned int)*POP_SIZE);
cudaMemcpy(d_seed, h_seed, sizeof(unsigned int)*POP_SIZE,cudaMemcpyHostToDevice);
//Initializing population:
clock_t start_pop = clock();
initialization<<<1,POP_SIZE>>>(population,target,strlen(target),d_charmap,strlen(charmap),d_seed,states);
clock_t finished_pop = clock();
double popInit_time = ((double)(finished_pop - start_pop)/CLOCKS_PER_SEC);
// Cleaning up random init:
cudaFree(states); cudaFree(d_seed);
free(h_seed);
//Copy result back:
cudaMemcpy(population,d_population,sizeof(population),cudaMemcpyDeviceToHost);
//Clean GPU:
cudaFree(d_target); cudaFree(d_charmap);
for(int p = 0; p < POP_SIZE; p++)
cudaFree(d_population[p]);
cudaFree(d_population);
//Calculating Fitness:
clock_t start_fitCalc = clock();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target, strlen(target), d_best, d_fit);
clock_t finished_fitCalc = clock();
double fitCalc_time = ((double)(finished_fitCalc - start_fitCalc)/CLOCKS_PER_SEC);
clock_t start_evol = clock();
evolution();
clock_t finished_evol = clock();
double evol_time = ((double)(finished_evol - start_evol)/CLOCKS_PER_SEC);
printPopulation();
///*
int nIterations = 0;
while(best)
{
evolution();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target,strlen(target),d_best,d_fit);
printPopulation();
nIterations++;
}
//*/
printf("InitTime: %f FitTime: %f Evol: %f nIterations: %d\n",popInit_time,fitCalc_time,evol_time,nIterations);
return 0;
}
// ================================================ GA Functions =============================================== //
// CUDA initialization:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, curandState_t* states)
{
curand_init(seed[threadIdx.x],threadIdx.x,0,&states[threadIdx.x]);
int randNumb = curand(&states[threadIdx.x])% charmapSize;
int index = blockDim.x * blockIdx.x + threadIdx.x;
for(int j = 0; j < targetSize; j++)
{
population[index][j] = charmap[randNumb];
randNumb = curand(&states[(threadIdx.x)+randNumb])% charmapSize;
}
population[index][targetSize] = '\0';
}
//The lesser the better. 0 is the optimal value:
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit)
{
int index = blockDim.x * blockIdx.x + threadIdx.x;
fitness[index] = 0;
for (int j = (int)sizeof(target)-1; j >= 0; j--)
{
fitness[index] += abs(target[j]-population[index][j]);
}
if(fitness[index] < *best)
{
*best = fitness[index];
*fit = index;
}
}
void fitnessCalculation()
{
int i = POP_SIZE-1;
int j;
while(i >= 0)
{
fitness[i] = 0;
for (j = (int)sizeof(target)-1; j >= 0; j--) {
fitness[i] += abs(target[j]-population[i][j]);
}
if(fitness[i] < best)
{
best = fitness[i];
fit = i;
}
i--;
}
}
void evolution()
{
int j = 0;
char *newBorn = population[fit];
int lucky;
for(int i = 0; i < POP_SIZE; i++)
{
while(1)
{
if(j >= POP_SIZE)
{
j = 0;
}
//Selection:
if(fitness[j] <= best)
{
newBorn = population[j];
//Mutation:
lucky = randNumb(POP_SIZE);
if(lucky != j)
{
mutation(population[lucky],randNumb(CHANCE));
}
fitnessCalculation();
j++;
break;
}
//Crossover:
else
{
for(int n = 0; n < strlen(target)*PERCENT_CROSS; n++)
{
population[j][randNumb(strlen(target))] = newBorn[randNumb(strlen(target))];
}
}
j++;
}
}
}
void mutation(char *mutant, int n)
{
for(int k = 0; k < n; k++)
{
mutant[randNumb(strlen(target))] = randChar();
}
}
// ================================================ End GA Steps =============================================== //
// Helper Functions:
void printPopulation()
{
for(int i = 0; i < POP_SIZE; i++)
{
printf("P: %s F: %d\n",population[i],fitness[i]);
}
printf("Target: %s\n",target);
printf("Best: %s - %d\n",population[fit],best);
}
char randChar()
{
return charmap[randNumb(strlen(charmap))];
}
int randNumb(int n)
{
return (rand()%(int)(n));
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
//Constant Declarations:
#define POP_SIZE 2048
#define CHANCE 3
#define PERCENT_CROSS 0.2
//Function declarations:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, hiprandState_t* states);
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit);
void fitnessCalculation();
void evolution();
void mutation(char *mutant, int n);
void printPopulation();
char randChar();
int randNumb(int n);
__device__ char randCharDev(int targetSize);
__device__ int randNumbDev(int n);
//Global Variables:
char *target = "Hello";
char *population[POP_SIZE];
char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";
int fitness[POP_SIZE];
int best = 500;
int fit = 0;
int main()
{
srand((unsigned int)time(NULL));
//Variables
// char *target = "Hello"; //CPU
char *d_target; //GPU
// char *population[POP_SIZE]; //CPU
char *d_population[POP_SIZE]; //GPU
// char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` "; //CPU
char *d_charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";//GPU
// int fitness[POP_SIZE]; //CPU
int d_fitness[POP_SIZE];//GPU
// int best = 500; //CPU
int *d_best; //GPU
// int fit = 0; //CPU
int *d_fit; //GPU
//CPU memory allocation
for(int i = 0; i < POP_SIZE; i++) //CPU
{
population[i] =(char*)malloc(sizeof(char)*strlen(target));
}
for(int j = 0; j < POP_SIZE; j++) //GPU
{
d_population[j] =(char*)malloc(sizeof(char)*strlen(target));
}
//GPU memory allocation
hipMalloc((char **)&d_target,sizeof(char)*strlen(target));
hipMalloc((void **)&d_population,sizeof(population));
for (int k = 0; k < POP_SIZE; k++)
{
hipMalloc((char**)&d_population[k],sizeof(char)*strlen(target));
}
hipMalloc((char**)&d_charmap,sizeof(char)*strlen(charmap));
hipMalloc((void**)&d_fitness,sizeof(fitness));
hipMalloc((void**)&d_best,sizeof(int));
hipMalloc((void**)&d_fit,sizeof(int));
//Sending data to GPU
hipMemcpy(d_target,target,strlen(target)*sizeof(char),hipMemcpyHostToDevice);
hipMemcpy(d_charmap,charmap,strlen(charmap)*sizeof(char),hipMemcpyHostToDevice);
hipMemcpy(d_best,&best,sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(d_fit,&fit,sizeof(int),hipMemcpyHostToDevice);
//Initializing random seed and allocating it both on CPU and GPU:
hiprandState_t* states;
unsigned int *h_seed = (unsigned int*)malloc(sizeof(unsigned int)*POP_SIZE);
srand(time(NULL));
for(int i=0;i<POP_SIZE;i++)
{
h_seed[i] = rand()%100000;
}
hipMalloc((void**) &states, POP_SIZE * sizeof(hiprandState_t));
unsigned int *d_seed;
hipMalloc((void**)&d_seed, sizeof(unsigned int)*POP_SIZE);
hipMemcpy(d_seed, h_seed, sizeof(unsigned int)*POP_SIZE,hipMemcpyHostToDevice);
//Initializing population:
clock_t start_pop = clock();
initialization<<<1,POP_SIZE>>>(population,target,strlen(target),d_charmap,strlen(charmap),d_seed,states);
clock_t finished_pop = clock();
double popInit_time = ((double)(finished_pop - start_pop)/CLOCKS_PER_SEC);
// Cleaning up random init:
hipFree(states); hipFree(d_seed);
free(h_seed);
//Copy result back:
hipMemcpy(population,d_population,sizeof(population),hipMemcpyDeviceToHost);
//Clean GPU:
hipFree(d_target); hipFree(d_charmap);
for(int p = 0; p < POP_SIZE; p++)
hipFree(d_population[p]);
hipFree(d_population);
//Calculating Fitness:
clock_t start_fitCalc = clock();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target, strlen(target), d_best, d_fit);
clock_t finished_fitCalc = clock();
double fitCalc_time = ((double)(finished_fitCalc - start_fitCalc)/CLOCKS_PER_SEC);
clock_t start_evol = clock();
evolution();
clock_t finished_evol = clock();
double evol_time = ((double)(finished_evol - start_evol)/CLOCKS_PER_SEC);
printPopulation();
///*
int nIterations = 0;
while(best)
{
evolution();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target,strlen(target),d_best,d_fit);
printPopulation();
nIterations++;
}
//*/
printf("InitTime: %f FitTime: %f Evol: %f nIterations: %d\n",popInit_time,fitCalc_time,evol_time,nIterations);
return 0;
}
// ================================================ GA Functions =============================================== //
// CUDA initialization:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, hiprandState_t* states)
{
hiprand_init(seed[threadIdx.x],threadIdx.x,0,&states[threadIdx.x]);
int randNumb = hiprand(&states[threadIdx.x])% charmapSize;
int index = blockDim.x * blockIdx.x + threadIdx.x;
for(int j = 0; j < targetSize; j++)
{
population[index][j] = charmap[randNumb];
randNumb = hiprand(&states[(threadIdx.x)+randNumb])% charmapSize;
}
population[index][targetSize] = '\0';
}
//The lesser the better. 0 is the optimal value:
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit)
{
int index = blockDim.x * blockIdx.x + threadIdx.x;
fitness[index] = 0;
for (int j = (int)sizeof(target)-1; j >= 0; j--)
{
fitness[index] += abs(target[j]-population[index][j]);
}
if(fitness[index] < *best)
{
*best = fitness[index];
*fit = index;
}
}
void fitnessCalculation()
{
int i = POP_SIZE-1;
int j;
while(i >= 0)
{
fitness[i] = 0;
for (j = (int)sizeof(target)-1; j >= 0; j--) {
fitness[i] += abs(target[j]-population[i][j]);
}
if(fitness[i] < best)
{
best = fitness[i];
fit = i;
}
i--;
}
}
void evolution()
{
int j = 0;
char *newBorn = population[fit];
int lucky;
for(int i = 0; i < POP_SIZE; i++)
{
while(1)
{
if(j >= POP_SIZE)
{
j = 0;
}
//Selection:
if(fitness[j] <= best)
{
newBorn = population[j];
//Mutation:
lucky = randNumb(POP_SIZE);
if(lucky != j)
{
mutation(population[lucky],randNumb(CHANCE));
}
fitnessCalculation();
j++;
break;
}
//Crossover:
else
{
for(int n = 0; n < strlen(target)*PERCENT_CROSS; n++)
{
population[j][randNumb(strlen(target))] = newBorn[randNumb(strlen(target))];
}
}
j++;
}
}
}
void mutation(char *mutant, int n)
{
for(int k = 0; k < n; k++)
{
mutant[randNumb(strlen(target))] = randChar();
}
}
// ================================================ End GA Steps =============================================== //
// Helper Functions:
void printPopulation()
{
for(int i = 0; i < POP_SIZE; i++)
{
printf("P: %s F: %d\n",population[i],fitness[i]);
}
printf("Target: %s\n",target);
printf("Best: %s - %d\n",population[fit],best);
}
char randChar()
{
return charmap[randNumb(strlen(charmap))];
}
int randNumb(int n)
{
return (rand()%(int)(n));
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
//Constant Declarations:
#define POP_SIZE 2048
#define CHANCE 3
#define PERCENT_CROSS 0.2
//Function declarations:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, hiprandState_t* states);
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit);
void fitnessCalculation();
void evolution();
void mutation(char *mutant, int n);
void printPopulation();
char randChar();
int randNumb(int n);
__device__ char randCharDev(int targetSize);
__device__ int randNumbDev(int n);
//Global Variables:
char *target = "Hello";
char *population[POP_SIZE];
char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";
int fitness[POP_SIZE];
int best = 500;
int fit = 0;
int main()
{
srand((unsigned int)time(NULL));
//Variables
// char *target = "Hello"; //CPU
char *d_target; //GPU
// char *population[POP_SIZE]; //CPU
char *d_population[POP_SIZE]; //GPU
// char *charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` "; //CPU
char *d_charmap = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|;:',./?~` ";//GPU
// int fitness[POP_SIZE]; //CPU
int d_fitness[POP_SIZE];//GPU
// int best = 500; //CPU
int *d_best; //GPU
// int fit = 0; //CPU
int *d_fit; //GPU
//CPU memory allocation
for(int i = 0; i < POP_SIZE; i++) //CPU
{
population[i] =(char*)malloc(sizeof(char)*strlen(target));
}
for(int j = 0; j < POP_SIZE; j++) //GPU
{
d_population[j] =(char*)malloc(sizeof(char)*strlen(target));
}
//GPU memory allocation
hipMalloc((char **)&d_target,sizeof(char)*strlen(target));
hipMalloc((void **)&d_population,sizeof(population));
for (int k = 0; k < POP_SIZE; k++)
{
hipMalloc((char**)&d_population[k],sizeof(char)*strlen(target));
}
hipMalloc((char**)&d_charmap,sizeof(char)*strlen(charmap));
hipMalloc((void**)&d_fitness,sizeof(fitness));
hipMalloc((void**)&d_best,sizeof(int));
hipMalloc((void**)&d_fit,sizeof(int));
//Sending data to GPU
hipMemcpy(d_target,target,strlen(target)*sizeof(char),hipMemcpyHostToDevice);
hipMemcpy(d_charmap,charmap,strlen(charmap)*sizeof(char),hipMemcpyHostToDevice);
hipMemcpy(d_best,&best,sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(d_fit,&fit,sizeof(int),hipMemcpyHostToDevice);
//Initializing random seed and allocating it both on CPU and GPU:
hiprandState_t* states;
unsigned int *h_seed = (unsigned int*)malloc(sizeof(unsigned int)*POP_SIZE);
srand(time(NULL));
for(int i=0;i<POP_SIZE;i++)
{
h_seed[i] = rand()%100000;
}
hipMalloc((void**) &states, POP_SIZE * sizeof(hiprandState_t));
unsigned int *d_seed;
hipMalloc((void**)&d_seed, sizeof(unsigned int)*POP_SIZE);
hipMemcpy(d_seed, h_seed, sizeof(unsigned int)*POP_SIZE,hipMemcpyHostToDevice);
//Initializing population:
clock_t start_pop = clock();
initialization<<<1,POP_SIZE>>>(population,target,strlen(target),d_charmap,strlen(charmap),d_seed,states);
clock_t finished_pop = clock();
double popInit_time = ((double)(finished_pop - start_pop)/CLOCKS_PER_SEC);
// Cleaning up random init:
hipFree(states); hipFree(d_seed);
free(h_seed);
//Copy result back:
hipMemcpy(population,d_population,sizeof(population),hipMemcpyDeviceToHost);
//Clean GPU:
hipFree(d_target); hipFree(d_charmap);
for(int p = 0; p < POP_SIZE; p++)
hipFree(d_population[p]);
hipFree(d_population);
//Calculating Fitness:
clock_t start_fitCalc = clock();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target, strlen(target), d_best, d_fit);
clock_t finished_fitCalc = clock();
double fitCalc_time = ((double)(finished_fitCalc - start_fitCalc)/CLOCKS_PER_SEC);
clock_t start_evol = clock();
evolution();
clock_t finished_evol = clock();
double evol_time = ((double)(finished_evol - start_evol)/CLOCKS_PER_SEC);
printPopulation();
///*
int nIterations = 0;
while(best)
{
evolution();
fitnessCalculation<<<1,POP_SIZE>>>(d_fitness,population,target,strlen(target),d_best,d_fit);
printPopulation();
nIterations++;
}
//*/
printf("InitTime: %f FitTime: %f Evol: %f nIterations: %d\n",popInit_time,fitCalc_time,evol_time,nIterations);
return 0;
}
// ================================================ GA Functions =============================================== //
// CUDA initialization:
__global__ void initialization(char **population, char *target, int targetSize, char *charmap,int charmapSize, unsigned int *seed, hiprandState_t* states)
{
hiprand_init(seed[threadIdx.x],threadIdx.x,0,&states[threadIdx.x]);
int randNumb = hiprand(&states[threadIdx.x])% charmapSize;
int index = blockDim.x * blockIdx.x + threadIdx.x;
for(int j = 0; j < targetSize; j++)
{
population[index][j] = charmap[randNumb];
randNumb = hiprand(&states[(threadIdx.x)+randNumb])% charmapSize;
}
population[index][targetSize] = '\0';
}
//The lesser the better. 0 is the optimal value:
__global__ void fitnessCalculation(int *fitness, char **population, char *target, int targetSize, int *best, int *fit)
{
int index = blockDim.x * blockIdx.x + threadIdx.x;
fitness[index] = 0;
for (int j = (int)sizeof(target)-1; j >= 0; j--)
{
fitness[index] += abs(target[j]-population[index][j]);
}
if(fitness[index] < *best)
{
*best = fitness[index];
*fit = index;
}
}
void fitnessCalculation()
{
int i = POP_SIZE-1;
int j;
while(i >= 0)
{
fitness[i] = 0;
for (j = (int)sizeof(target)-1; j >= 0; j--) {
fitness[i] += abs(target[j]-population[i][j]);
}
if(fitness[i] < best)
{
best = fitness[i];
fit = i;
}
i--;
}
}
void evolution()
{
int j = 0;
char *newBorn = population[fit];
int lucky;
for(int i = 0; i < POP_SIZE; i++)
{
while(1)
{
if(j >= POP_SIZE)
{
j = 0;
}
//Selection:
if(fitness[j] <= best)
{
newBorn = population[j];
//Mutation:
lucky = randNumb(POP_SIZE);
if(lucky != j)
{
mutation(population[lucky],randNumb(CHANCE));
}
fitnessCalculation();
j++;
break;
}
//Crossover:
else
{
for(int n = 0; n < strlen(target)*PERCENT_CROSS; n++)
{
population[j][randNumb(strlen(target))] = newBorn[randNumb(strlen(target))];
}
}
j++;
}
}
}
void mutation(char *mutant, int n)
{
for(int k = 0; k < n; k++)
{
mutant[randNumb(strlen(target))] = randChar();
}
}
// ================================================ End GA Steps =============================================== //
// Helper Functions:
void printPopulation()
{
for(int i = 0; i < POP_SIZE; i++)
{
printf("P: %s F: %d\n",population[i],fitness[i]);
}
printf("Target: %s\n",target);
printf("Best: %s - %d\n",population[fit],best);
}
char randChar()
{
return charmap[randNumb(strlen(charmap))];
}
int randNumb(int n)
{
return (rand()%(int)(n));
} | .text
.file "parallel_ga.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24856, %rsp # imm = 0x6118
.cfi_def_cfa_offset 24912
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movq $.L.str.1, 104(%rsp)
movq $-16384, %r14 # imm = 0xC000
movq target(%rip), %rbx
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
callq strlen
movq %rax, %rdi
callq malloc
movq %rax, population+16384(%r14)
addq $8, %r14
jne .LBB0_1
# %bb.2: # %.preheader
movq target(%rip), %rbx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB0_3: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
callq strlen
movq %rax, %rdi
callq malloc
movq %rax, 8464(%rsp,%r14,8)
incq %r14
cmpq $2048, %r14 # imm = 0x800
jne .LBB0_3
# %bb.4:
movq target(%rip), %rdi
callq strlen
leaq 216(%rsp), %rdi
movq %rax, %rsi
callq hipMalloc
leaq 8464(%rsp), %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB0_5: # =>This Inner Loop Header: Depth=1
leaq (%rsp,%r14), %rbx
addq $8464, %rbx # imm = 0x2110
movq target(%rip), %rdi
callq strlen
movq %rbx, %rdi
movq %rax, %rsi
callq hipMalloc
addq $8, %r14
cmpq $16384, %r14 # imm = 0x4000
jne .LBB0_5
# %bb.6:
movq charmap(%rip), %rdi
callq strlen
leaq 104(%rsp), %rdi
movq %rax, %rsi
callq hipMalloc
leaq 272(%rsp), %rdi
movl $8192, %esi # imm = 0x2000
callq hipMalloc
leaq 128(%rsp), %rdi
movl $4, %esi
callq hipMalloc
leaq 120(%rsp), %rdi
movl $4, %esi
callq hipMalloc
movq 216(%rsp), %rbx
movq target(%rip), %r14
movq %r14, %rdi
callq strlen
movq %rbx, %rdi
movq %r14, %rsi
movq %rax, %rdx
movl $1, %ecx
callq hipMemcpy
movq 104(%rsp), %rbx
movq charmap(%rip), %r14
movq %r14, %rdi
callq strlen
movq %rbx, %rdi
movq %r14, %rsi
movq %rax, %rdx
movl $1, %ecx
callq hipMemcpy
movq 128(%rsp), %rdi
movl $best, %esi
movl $4, %edx
movl $1, %ecx
callq hipMemcpy
movq 120(%rsp), %rdi
movl $fit, %esi
movl $4, %edx
movl $1, %ecx
callq hipMemcpy
movl $8192, %edi # imm = 0x2000
callq malloc
movq %rax, %rbx
xorl %r14d, %r14d
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
.p2align 4, 0x90
.LBB0_7: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $351843721, %rax, %rcx # imm = 0x14F8B589
movq %rcx, %rdx
shrq $63, %rdx
sarq $45, %rcx
addl %edx, %ecx
imull $100000, %ecx, %ecx # imm = 0x186A0
subl %ecx, %eax
movl %eax, (%rbx,%r14,4)
incq %r14
cmpq $2048, %r14 # imm = 0x800
jne .LBB0_7
# %bb.8:
movabsq $4294967297, %r14 # imm = 0x100000001
leaq 208(%rsp), %rdi
movl $98304, %esi # imm = 0x18000
callq hipMalloc
leaq 112(%rsp), %rdi
movl $8192, %esi # imm = 0x2000
callq hipMalloc
movq 112(%rsp), %rdi
movl $8192, %edx # imm = 0x2000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
callq clock
movq %rax, 264(%rsp) # 8-byte Spill
leaq 2047(%r14), %r12
movq %r14, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_10
# %bb.9:
movq target(%rip), %r14
movq %r14, %rdi
callq strlen
movq %rax, %r15
movq 104(%rsp), %r13
movq charmap(%rip), %rdi
callq strlen
movq 112(%rsp), %rcx
movq 208(%rsp), %rdx
movq $population, 96(%rsp)
movq %r14, 88(%rsp)
movl %r15d, 12(%rsp)
movq %r13, 80(%rsp)
movl %eax, 140(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 96(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rax
movq %rax, 152(%rsp)
leaq 12(%rsp), %rax
movq %rax, 160(%rsp)
leaq 80(%rsp), %rax
movq %rax, 168(%rsp)
leaq 140(%rsp), %rax
movq %rax, 176(%rsp)
leaq 72(%rsp), %rax
movq %rax, 184(%rsp)
leaq 64(%rsp), %rax
movq %rax, 192(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z14initializationPPcS_iS_iPjP12hiprandState, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_10:
callq clock
movq %rax, 256(%rsp) # 8-byte Spill
movq 208(%rsp), %rdi
callq hipFree
movq 112(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
leaq 8464(%rsp), %rsi
movl $population, %edi
movl $16384, %edx # imm = 0x4000
movl $2, %ecx
callq hipMemcpy
movq 216(%rsp), %rdi
callq hipFree
movq 104(%rsp), %rdi
callq hipFree
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB0_11: # =>This Inner Loop Header: Depth=1
movq 8464(%rsp,%rbx,8), %rdi
callq hipFree
incq %rbx
cmpq $2048, %rbx # imm = 0x800
jne .LBB0_11
# %bb.12:
leaq 8464(%rsp), %rdi
callq hipFree
callq clock
movq %rax, 248(%rsp) # 8-byte Spill
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_14
# %bb.13:
movq target(%rip), %rbx
movq %rbx, %rdi
callq strlen
movq 128(%rsp), %rcx
movq 120(%rsp), %rdx
leaq 272(%rsp), %rsi
movq %rsi, 96(%rsp)
movq $population, 88(%rsp)
movq %rbx, 80(%rsp)
movl %eax, 12(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 96(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rax
movq %rax, 152(%rsp)
leaq 80(%rsp), %rax
movq %rax, 160(%rsp)
leaq 12(%rsp), %rax
movq %rax, 168(%rsp)
leaq 72(%rsp), %rax
movq %rax, 176(%rsp)
leaq 64(%rsp), %rax
movq %rax, 184(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z18fitnessCalculationPiPPcS0_iS_S_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_14:
callq clock
movq %rax, 240(%rsp) # 8-byte Spill
callq clock
movq %rax, 232(%rsp) # 8-byte Spill
callq _Z9evolutionv
movq $-8192, %rbx # imm = 0xE000
callq clock
movq %rax, 224(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB0_15: # =>This Inner Loop Header: Depth=1
movq population+16384(%rbx,%rbx), %rsi
movl fitness+8192(%rbx), %edx
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
addq $4, %rbx
jne .LBB0_15
# %bb.16: # %_Z15printPopulationv.exit
movq target(%rip), %rsi
xorl %ebp, %ebp
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movslq fit(%rip), %rax
movq population(,%rax,8), %rsi
movl best(%rip), %edx
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
cmpl $0, best(%rip)
je .LBB0_23
# %bb.17: # %.lr.ph
leaq 24(%rsp), %rbx
leaq 16(%rsp), %r14
leaq 144(%rsp), %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_18: # =>This Loop Header: Depth=1
# Child Loop BB0_21 Depth 2
callq _Z9evolutionv
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_20
# %bb.19: # in Loop: Header=BB0_18 Depth=1
movq target(%rip), %r15
movq %r15, %rdi
callq strlen
movq 128(%rsp), %rcx
movq 120(%rsp), %rdx
leaq 272(%rsp), %rsi
movq %rsi, 96(%rsp)
movq $population, 88(%rsp)
movq %r15, 80(%rsp)
movl %eax, 12(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 96(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rax
movq %rax, 152(%rsp)
leaq 80(%rsp), %rax
movq %rax, 160(%rsp)
leaq 12(%rsp), %rax
movq %rax, 168(%rsp)
leaq 72(%rsp), %rax
movq %rax, 176(%rsp)
leaq 64(%rsp), %rax
movq %rax, 184(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
movq %rbx, %rdx
movq %r14, %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z18fitnessCalculationPiPPcS0_iS_S_, %edi
movq %r13, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_20: # %.preheader101
# in Loop: Header=BB0_18 Depth=1
movq $-8192, %r15 # imm = 0xE000
.p2align 4, 0x90
.LBB0_21: # Parent Loop BB0_18 Depth=1
# => This Inner Loop Header: Depth=2
movq population+16384(%r15,%r15), %rsi
movl fitness+8192(%r15), %edx
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
addq $4, %r15
jne .LBB0_21
# %bb.22: # %_Z15printPopulationv.exit61
# in Loop: Header=BB0_18 Depth=1
movq target(%rip), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movslq fit(%rip), %rax
movq population(,%rax,8), %rsi
movl best(%rip), %edx
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
incl %ebp
cmpl $0, best(%rip)
jne .LBB0_18
.LBB0_23: # %._crit_edge
movq 224(%rsp), %rax # 8-byte Reload
subq 232(%rsp), %rax # 8-byte Folded Reload
cvtsi2sd %rax, %xmm2
movsd .LCPI0_0(%rip), %xmm3 # xmm3 = mem[0],zero
divsd %xmm3, %xmm2
movq 240(%rsp), %rax # 8-byte Reload
subq 248(%rsp), %rax # 8-byte Folded Reload
cvtsi2sd %rax, %xmm1
divsd %xmm3, %xmm1
movq 256(%rsp), %rax # 8-byte Reload
subq 264(%rsp), %rax # 8-byte Folded Reload
cvtsi2sd %rax, %xmm0
divsd %xmm3, %xmm0
movl $.L.str.2, %edi
movl %ebp, %esi
movb $3, %al
callq printf
xorl %eax, %eax
addq $24856, %rsp # imm = 0x6118
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState # -- Begin function _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState
.p2align 4, 0x90
.type _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState,@function
_Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState: # @_Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movl %edx, 12(%rsp)
movq %rcx, 72(%rsp)
movl %r8d, 8(%rsp)
movq %r9, 64(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 72(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
leaq 64(%rsp), %rax
movq %rax, 136(%rsp)
leaq 160(%rsp), %rax
movq %rax, 144(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z14initializationPPcS_iS_iPjP12hiprandState, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end1:
.size _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState, .Lfunc_end1-_Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState
.cfi_endproc
# -- End function
.globl _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_ # -- Begin function _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_
.p2align 4, 0x90
.type _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_,@function
_Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_: # @_Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 4(%rsp)
movq %r8, 64(%rsp)
movq %r9, 56(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rax
movq %rax, 128(%rsp)
leaq 56(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z18fitnessCalculationPiPPcS0_iS_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end2:
.size _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_, .Lfunc_end2-_Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z9evolutionv
.LCPI3_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI3_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_2:
.quad 0x3fc999999999999a # double 0.20000000000000001
.LCPI3_3:
.quad 0x0000000000000000 # double 0
.text
.globl _Z9evolutionv
.p2align 4, 0x90
.type _Z9evolutionv,@function
_Z9evolutionv: # @_Z9evolutionv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movslq fit(%rip), %rax
movq population(,%rax,8), %r15
xorl %eax, %eax
xorl %r13d, %r13d
jmp .LBB3_1
.p2align 4, 0x90
.LBB3_15: # %_Z18fitnessCalculationv.exit
# in Loop: Header=BB3_1 Depth=1
incl %r13d
movl 4(%rsp), %eax # 4-byte Reload
incl %eax
cmpl $2048, %eax # imm = 0x800
je .LBB3_16
.LBB3_1: # %.preheader18
# =>This Loop Header: Depth=1
# Child Loop BB3_2 Depth 2
# Child Loop BB3_4 Depth 3
# Child Loop BB3_8 Depth 2
# Child Loop BB3_10 Depth 2
# Child Loop BB3_11 Depth 3
movl %eax, 4(%rsp) # 4-byte Spill
cmpl $2048, %r13d # imm = 0x800
movl $0, %eax
cmovgel %eax, %r13d
movslq %r13d, %r14
movl fitness(,%r14,4), %eax
cmpl best(%rip), %eax
jg .LBB3_2
.LBB3_6: # %._crit_edge24
# in Loop: Header=BB3_1 Depth=1
movq population(,%r14,8), %r15
callq rand
# kill: def $eax killed $eax def $rax
leal 2047(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-2048, %ecx # imm = 0xF800
subl %ecx, %eax
cmpl %r13d, %eax
je .LBB3_9
# %bb.7: # in Loop: Header=BB3_1 Depth=1
cltq
movq population(,%rax,8), %r12
callq rand
movslq %eax, %rbp
imulq $1431655766, %rbp, %rax # imm = 0x55555556
movq %rax, %rcx
shrq $63, %rcx
shrq $32, %rax
addl %ecx, %eax
leal (%rax,%rax,2), %eax
subl %eax, %ebp
testl %ebp, %ebp
jle .LBB3_9
.p2align 4, 0x90
.LBB3_8: # %.lr.ph.i
# Parent Loop BB3_1 Depth=1
# => This Inner Loop Header: Depth=2
movq charmap(%rip), %rbx
movq %rbx, %rdi
callq strlen
movq %rax, %r14
callq rand
cltd
idivl %r14d
movslq %edx, %rax
movzbl (%rbx,%rax), %r14d
movq target(%rip), %rdi
callq strlen
movq %rax, %rbx
callq rand
cltd
idivl %ebx
movslq %edx, %rax
movb %r14b, (%r12,%rax)
decl %ebp
jne .LBB3_8
.LBB3_9: # %_Z8mutationPci.exit
# in Loop: Header=BB3_1 Depth=1
movq target(%rip), %rax
movl $2047, %ecx # imm = 0x7FF
movl best(%rip), %edx
jmp .LBB3_10
.p2align 4, 0x90
.LBB3_14: # in Loop: Header=BB3_10 Depth=2
subq $1, %rcx
jb .LBB3_15
.LBB3_10: # Parent Loop BB3_1 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB3_11 Depth 3
movl $0, fitness(,%rcx,4)
movq population(,%rcx,8), %rdi
xorl %esi, %esi
movl $7, %r8d
.p2align 4, 0x90
.LBB3_11: # Parent Loop BB3_1 Depth=1
# Parent Loop BB3_10 Depth=2
# => This Inner Loop Header: Depth=3
movsbl (%rax,%r8), %r9d
movsbl (%rdi,%r8), %r10d
subl %r10d, %r9d
movl %r9d, %r10d
negl %r10d
cmovsl %r9d, %r10d
movzbl %r10b, %r9d
addl %r9d, %esi
movl %esi, fitness(,%rcx,4)
addq $-1, %r8
jb .LBB3_11
# %bb.12: # in Loop: Header=BB3_10 Depth=2
cmpl %edx, %esi
jge .LBB3_14
# %bb.13: # in Loop: Header=BB3_10 Depth=2
movl %esi, best(%rip)
movl %ecx, fit(%rip)
movl %esi, %edx
jmp .LBB3_14
.p2align 4, 0x90
.LBB3_5: # %._crit_edge
# in Loop: Header=BB3_2 Depth=2
movq 8(%rsp), %rax # 8-byte Reload
cmpl $2047, %eax # imm = 0x7FF
leal 1(%rax), %eax
movl $0, %ecx
cmovgel %ecx, %eax
movslq %eax, %r14
movl fitness(,%r14,4), %ecx
movl %eax, %r13d
cmpl best(%rip), %ecx
jle .LBB3_6
.LBB3_2: # %.preheader
# Parent Loop BB3_1 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB3_4 Depth 3
movq %r13, 8(%rsp) # 8-byte Spill
movq target(%rip), %rdi
callq strlen
movq %rax, %xmm0
movdqa .LCPI3_0(%rip), %xmm1 # xmm1 = [1127219200,1160773632,0,0]
punpckldq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
movapd .LCPI3_1(%rip), %xmm1 # xmm1 = [4.503599627370496E+15,1.9342813113834067E+25]
subpd %xmm1, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
movsd .LCPI3_2(%rip), %xmm0 # xmm0 = mem[0],zero
mulsd %xmm0, %xmm1
ucomisd .LCPI3_3(%rip), %xmm1
jbe .LBB3_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB3_2 Depth=2
movq %rax, %rbx
movl $1, %r12d
.p2align 4, 0x90
.LBB3_4: # Parent Loop BB3_1 Depth=1
# Parent Loop BB3_2 Depth=2
# => This Inner Loop Header: Depth=3
callq rand
cltd
idivl %ebx
movslq %edx, %rax
movzbl (%r15,%rax), %ebp
movq population(,%r14,8), %r13
movq target(%rip), %rdi
callq strlen
movq %rax, %rbx
callq rand
cltd
idivl %ebx
movslq %edx, %rax
movb %bpl, (%r13,%rax)
xorps %xmm0, %xmm0
cvtsi2sd %r12d, %xmm0
movsd %xmm0, 16(%rsp) # 8-byte Spill
movq target(%rip), %rdi
callq strlen
movapd .LCPI3_1(%rip), %xmm2 # xmm2 = [4.503599627370496E+15,1.9342813113834067E+25]
movdqa .LCPI3_0(%rip), %xmm1 # xmm1 = [1127219200,1160773632,0,0]
movq %rax, %rbx
movq %rax, %xmm0
punpckldq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
subpd %xmm2, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
movsd .LCPI3_2(%rip), %xmm0 # xmm0 = mem[0],zero
mulsd %xmm0, %xmm1
incl %r12d
ucomisd 16(%rsp), %xmm1 # 8-byte Folded Reload
ja .LBB3_4
jmp .LBB3_5
.LBB3_16:
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z9evolutionv, .Lfunc_end3-_Z9evolutionv
.cfi_endproc
# -- End function
.globl _Z15printPopulationv # -- Begin function _Z15printPopulationv
.p2align 4, 0x90
.type _Z15printPopulationv,@function
_Z15printPopulationv: # @_Z15printPopulationv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movq $-8192, %rbx # imm = 0xE000
.p2align 4, 0x90
.LBB4_1: # =>This Inner Loop Header: Depth=1
movq population+16384(%rbx,%rbx), %rsi
movl fitness+8192(%rbx), %edx
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
addq $4, %rbx
jne .LBB4_1
# %bb.2:
movq target(%rip), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movslq fit(%rip), %rax
movq population(,%rax,8), %rsi
movl best(%rip), %edx
movl $.L.str.5, %edi
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end4:
.size _Z15printPopulationv, .Lfunc_end4-_Z15printPopulationv
.cfi_endproc
# -- End function
.globl _Z18fitnessCalculationv # -- Begin function _Z18fitnessCalculationv
.p2align 4, 0x90
.type _Z18fitnessCalculationv,@function
_Z18fitnessCalculationv: # @_Z18fitnessCalculationv
.cfi_startproc
# %bb.0:
movq target(%rip), %rax
movl $2047, %ecx # imm = 0x7FF
movl best(%rip), %edx
jmp .LBB5_1
.p2align 4, 0x90
.LBB5_5: # in Loop: Header=BB5_1 Depth=1
subq $1, %rcx
jb .LBB5_6
.LBB5_1: # =>This Loop Header: Depth=1
# Child Loop BB5_2 Depth 2
movl $0, fitness(,%rcx,4)
movq population(,%rcx,8), %rsi
xorl %edi, %edi
movl $7, %r8d
.p2align 4, 0x90
.LBB5_2: # Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
movsbl (%rax,%r8), %r9d
movsbl (%rsi,%r8), %r10d
subl %r10d, %r9d
movl %r9d, %r10d
negl %r10d
cmovsl %r9d, %r10d
movzbl %r10b, %r9d
addl %r9d, %edi
movl %edi, fitness(,%rcx,4)
addq $-1, %r8
jb .LBB5_2
# %bb.3: # in Loop: Header=BB5_1 Depth=1
movl fitness(,%rcx,4), %esi
cmpl %edx, %esi
jge .LBB5_5
# %bb.4: # in Loop: Header=BB5_1 Depth=1
movl %esi, best(%rip)
movl %ecx, fit(%rip)
movl %esi, %edx
jmp .LBB5_5
.LBB5_6:
retq
.Lfunc_end5:
.size _Z18fitnessCalculationv, .Lfunc_end5-_Z18fitnessCalculationv
.cfi_endproc
# -- End function
.globl _Z8randNumbi # -- Begin function _Z8randNumbi
.p2align 4, 0x90
.type _Z8randNumbi,@function
_Z8randNumbi: # @_Z8randNumbi
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %edi, %ebx
callq rand
cltd
idivl %ebx
movl %edx, %eax
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _Z8randNumbi, .Lfunc_end6-_Z8randNumbi
.cfi_endproc
# -- End function
.globl _Z8mutationPci # -- Begin function _Z8mutationPci
.p2align 4, 0x90
.type _Z8mutationPci,@function
_Z8mutationPci: # @_Z8mutationPci
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB7_4
# %bb.1:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebx
movq %rdi, %r14
.p2align 4, 0x90
.LBB7_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq charmap(%rip), %r15
movq %r15, %rdi
callq strlen
movq %rax, %r12
callq rand
cltd
idivl %r12d
movslq %edx, %rax
movzbl (%r15,%rax), %ebp
movq target(%rip), %rdi
callq strlen
movq %rax, %r15
callq rand
cltd
idivl %r15d
movslq %edx, %rax
movb %bpl, (%r14,%rax)
decl %ebx
jne .LBB7_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r12
.cfi_restore %r14
.cfi_restore %r15
.cfi_restore %rbp
.LBB7_4: # %._crit_edge
retq
.Lfunc_end7:
.size _Z8mutationPci, .Lfunc_end7-_Z8mutationPci
.cfi_endproc
# -- End function
.globl _Z8randCharv # -- Begin function _Z8randCharv
.p2align 4, 0x90
.type _Z8randCharv,@function
_Z8randCharv: # @_Z8randCharv
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq charmap(%rip), %rbx
movq %rbx, %rdi
callq strlen
movq %rax, %r14
callq rand
cltd
idivl %r14d
movslq %edx, %rax
movzbl (%rbx,%rax), %eax
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end8:
.size _Z8randCharv, .Lfunc_end8-_Z8randCharv
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB9_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB9_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14initializationPPcS_iS_iPjP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z18fitnessCalculationPiPPcS0_iS_S_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end9:
.size __hip_module_ctor, .Lfunc_end9-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB10_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB10_2:
retq
.Lfunc_end10:
.size __hip_module_dtor, .Lfunc_end10-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Hello"
.size .L.str, 6
.type target,@object # @target
.data
.globl target
.p2align 3, 0x0
target:
.quad .L.str
.size target, 8
.type population,@object # @population
.bss
.globl population
.p2align 4, 0x0
population:
.zero 16384
.size population, 16384
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@#$%^&*(_-)+=[]{}<>|
.size .L.str.1, 94
.type charmap,@object # @charmap
.data
.globl charmap
.p2align 3, 0x0
charmap:
.quad .L.str.1
.size charmap, 8
.type fitness,@object # @fitness
.bss
.globl fitness
.p2align 4, 0x0
fitness:
.zero 8192
.size fitness, 8192
.type best,@object # @best
.data
.globl best
.p2align 2, 0x0
best:
.long 500 # 0x1f4
.size best, 4
.type fit,@object # @fit
.bss
.globl fit
.p2align 2, 0x0
fit:
.long 0 # 0x0
.size fit, 4
.type _Z14initializationPPcS_iS_iPjP12hiprandState,@object # @_Z14initializationPPcS_iS_iPjP12hiprandState
.section .rodata,"a",@progbits
.globl _Z14initializationPPcS_iS_iPjP12hiprandState
.p2align 3, 0x0
_Z14initializationPPcS_iS_iPjP12hiprandState:
.quad _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState
.size _Z14initializationPPcS_iS_iPjP12hiprandState, 8
.type _Z18fitnessCalculationPiPPcS0_iS_S_,@object # @_Z18fitnessCalculationPiPPcS0_iS_S_
.globl _Z18fitnessCalculationPiPPcS0_iS_S_
.p2align 3, 0x0
_Z18fitnessCalculationPiPPcS0_iS_S_:
.quad _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_
.size _Z18fitnessCalculationPiPPcS0_iS_S_, 8
.type .L.str.2,@object # @.str.2
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.2:
.asciz "InitTime: %f FitTime: %f Evol: %f nIterations: %d\n"
.size .L.str.2, 51
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "P: %s F: %d\n"
.size .L.str.3, 13
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Target: %s\n"
.size .L.str.4, 12
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Best: %s - %d\n"
.size .L.str.5, 15
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14initializationPPcS_iS_iPjP12hiprandState"
.size .L__unnamed_1, 45
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z18fitnessCalculationPiPPcS0_iS_S_"
.size .L__unnamed_2, 36
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__initializationPPcS_iS_iPjP12hiprandState
.addrsig_sym _Z33__device_stub__fitnessCalculationPiPPcS0_iS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym population
.addrsig_sym best
.addrsig_sym fit
.addrsig_sym _Z14initializationPPcS_iS_iPjP12hiprandState
.addrsig_sym _Z18fitnessCalculationPiPPcS0_iS_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} | .file "tmpxft_00136715_00000000-6_GetCuDNNVersion_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2042:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB2039:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $32, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rbx
movq %rbx, %rdi
call _ZN17DeepNeuralNetwork15GetCuDNNVersionC1Ev@PLT
movq %rbx, %rdi
call _ZN17DeepNeuralNetwork15GetCuDNNVersion12pretty_printEv@PLT
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L6
movl $0, %eax
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2039:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} | #include <hip/hip_runtime.h>
#include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "GetCuDNNVersion.h"
using DeepNeuralNetwork::GetCuDNNVersion;
int main()
{
GetCuDNNVersion version {};
version.pretty_print();
} | .text
.file "GetCuDNNVersion_main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
leaq 8(%rsp), %rbx
movq %rbx, %rdi
callq _ZN17DeepNeuralNetwork15GetCuDNNVersionC1Ev
movq %rbx, %rdi
callq _ZN17DeepNeuralNetwork15GetCuDNNVersion12pretty_printEv
xorl %eax, %eax
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00136715_00000000-6_GetCuDNNVersion_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2042:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl main
.type main, @function
main:
.LFB2039:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $32, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rbx
movq %rbx, %rdi
call _ZN17DeepNeuralNetwork15GetCuDNNVersionC1Ev@PLT
movq %rbx, %rdi
call _ZN17DeepNeuralNetwork15GetCuDNNVersion12pretty_printEv@PLT
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L6
movl $0, %eax
addq $32, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2039:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "GetCuDNNVersion_main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
leaq 8(%rsp), %rbx
movq %rbx, %rdi
callq _ZN17DeepNeuralNetwork15GetCuDNNVersionC1Ev
movq %rbx, %rdi
callq _ZN17DeepNeuralNetwork15GetCuDNNVersion12pretty_printEv
xorl %eax, %eax
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
cudaMalloc(&GPU_x , 1e4 * sizeof(int));
cudaMalloc(&GPU_b , 1e4 * sizeof(int));
cudaMalloc(&GPU_A , 1e8 * sizeof(int));
cudaMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
cudaMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), cudaMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
cudaFree(GPU_x);
cudaFree(GPU_b);
cudaFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} | code for sm_80
Function : _Z7kernelbPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R10, SR_CTAID.X ; /* 0x00000000000a7919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff007624 */
/* 0x000fc600078e00ff */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R10, R10, c[0x0][0x0], R3 ; /* 0x000000000a0a7a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R10, c[0x0][0x178], !P0 ; /* 0x00005e000a007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe20007ffe0ff */
/*0090*/ HFMA2.MMA R8, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff087435 */
/* 0x000fe200000001ff */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00b0*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*00c0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fcc0003f06070 */
/*00e0*/ IMAD.WIDE R2, R10, R8, c[0x0][0x170] ; /* 0x00005c000a027625 */
/* 0x000fce00078e0208 */
/*00f0*/ @!P0 BRA 0xb10 ; /* 0x00000a1000008947 */
/* 0x000fea0003800000 */
/*0100*/ IADD3 R11, -R0, c[0x0][0x178], RZ ; /* 0x00005e00000b7a10 */
/* 0x000fe20007ffe1ff */
/*0110*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x000162000c1e1900 */
/*0120*/ IMAD R7, R10, c[0x0][0x178], RZ ; /* 0x00005e000a077a24 */
/* 0x000fe200078e02ff */
/*0130*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe20000000f00 */
/*0140*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff047624 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.GT.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.WIDE R6, R7, R8, c[0x0][0x160] ; /* 0x0000580007067625 */
/* 0x000fe200078e0208 */
/*0170*/ MOV R5, c[0x0][0x16c] ; /* 0x00005b0000057a02 */
/* 0x000fd60000000f00 */
/*0180*/ @!P0 BRA 0x960 ; /* 0x000007d000008947 */
/* 0x001fea0003800000 */
/*0190*/ ISETP.GT.AND P1, PT, R11, 0xc, PT ; /* 0x0000000c0b00780c */
/* 0x000fe40003f24270 */
/*01a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01b0*/ @!P1 BRA 0x680 ; /* 0x000004c000009947 */
/* 0x000fea0003800000 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01d0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x004ea8000c1e1900 */
/*01e0*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ea4000c1e1900 */
/*01f0*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x024fca00078e020d */
/*0200*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0210*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*0220*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*0230*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*0240*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0250*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*0260*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea4000c1e1900 */
/*0270*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0280*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0290*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*02a0*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e24000c1e1900 */
/*02b0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*02c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*02d0*/ LDG.E R12, [R4.64+0x10] ; /* 0x00001004040c7981 */
/* 0x000e68000c1e1900 */
/*02e0*/ LDG.E R14, [R6.64+0x10] ; /* 0x00001004060e7981 */
/* 0x000e64000c1e1900 */
/*02f0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0300*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0310*/ LDG.E R12, [R4.64+0x14] ; /* 0x00001404040c7981 */
/* 0x000ea8000c1e1900 */
/*0320*/ LDG.E R14, [R6.64+0x14] ; /* 0x00001404060e7981 */
/* 0x000ea4000c1e1900 */
/*0330*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0340*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0350*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000e28000c1e1900 */
/*0360*/ LDG.E R14, [R6.64+0x18] ; /* 0x00001804060e7981 */
/* 0x000e24000c1e1900 */
/*0370*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0380*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0390*/ LDG.E R12, [R4.64+0x1c] ; /* 0x00001c04040c7981 */
/* 0x000e68000c1e1900 */
/*03a0*/ LDG.E R14, [R6.64+0x1c] ; /* 0x00001c04060e7981 */
/* 0x000e64000c1e1900 */
/*03b0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*03c0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*03d0*/ LDG.E R12, [R4.64+0x20] ; /* 0x00002004040c7981 */
/* 0x000ea8000c1e1900 */
/*03e0*/ LDG.E R14, [R6.64+0x20] ; /* 0x00002004060e7981 */
/* 0x000ea4000c1e1900 */
/*03f0*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0400*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0410*/ LDG.E R12, [R4.64+0x24] ; /* 0x00002404040c7981 */
/* 0x000e28000c1e1900 */
/*0420*/ LDG.E R14, [R6.64+0x24] ; /* 0x00002404060e7981 */
/* 0x000e24000c1e1900 */
/*0430*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0440*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0450*/ LDG.E R12, [R4.64+0x28] ; /* 0x00002804040c7981 */
/* 0x000e68000c1e1900 */
/*0460*/ LDG.E R14, [R6.64+0x28] ; /* 0x00002804060e7981 */
/* 0x000e64000c1e1900 */
/*0470*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0480*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0490*/ LDG.E R12, [R4.64+0x2c] ; /* 0x00002c04040c7981 */
/* 0x000ea8000c1e1900 */
/*04a0*/ LDG.E R14, [R6.64+0x2c] ; /* 0x00002c04060e7981 */
/* 0x000ea4000c1e1900 */
/*04b0*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*04c0*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*04d0*/ LDG.E R12, [R4.64+0x30] ; /* 0x00003004040c7981 */
/* 0x000e28000c1e1900 */
/*04e0*/ LDG.E R14, [R6.64+0x30] ; /* 0x00003004060e7981 */
/* 0x000e24000c1e1900 */
/*04f0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0500*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0510*/ LDG.E R12, [R4.64+0x34] ; /* 0x00003404040c7981 */
/* 0x000e68000c1e1900 */
/*0520*/ LDG.E R14, [R6.64+0x34] ; /* 0x00003404060e7981 */
/* 0x000e64000c1e1900 */
/*0530*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0540*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0550*/ LDG.E R12, [R4.64+0x38] ; /* 0x00003804040c7981 */
/* 0x000ea8000c1e1900 */
/*0560*/ LDG.E R14, [R6.64+0x38] ; /* 0x00003804060e7981 */
/* 0x000ea2000c1e1900 */
/*0570*/ IADD3 R11, R11, -0x10, RZ ; /* 0xfffffff00b0b7810 */
/* 0x000fe20007ffe0ff */
/*0580*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0590*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*05a0*/ LDG.E R12, [R4.64+0x3c] ; /* 0x00003c04040c7981 */
/* 0x000e28000c1e1900 */
/*05b0*/ LDG.E R14, [R6.64+0x3c] ; /* 0x00003c04060e7981 */
/* 0x000e22000c1e1900 */
/*05c0*/ ISETP.GT.AND P1, PT, R11, 0xc, PT ; /* 0x0000000c0b00780c */
/* 0x000fe40003f24270 */
/*05d0*/ IADD3 R9, R9, 0x10, RZ ; /* 0x0000001009097810 */
/* 0x000fe20007ffe0ff */
/*05e0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fe200078e0211 */
/*05f0*/ IADD3 R14, P2, R6, 0x40, RZ ; /* 0x00000040060e7810 */
/* 0x000fc40007f5e0ff */
/*0600*/ IADD3 R12, P3, R4, 0x40, RZ ; /* 0x00000040040c7810 */
/* 0x000fe40007f7e0ff */
/*0610*/ IADD3.X R15, RZ, R7, RZ, P2, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe200017fe4ff */
/*0620*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0630*/ MOV R6, R14 ; /* 0x0000000e00067202 */
/* 0x000fe20000000f00 */
/*0640*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */
/* 0x000fe400018e0605 */
/*0650*/ IMAD.MOV.U32 R4, RZ, RZ, R12 ; /* 0x000000ffff047224 */
/* 0x000fe400078e000c */
/*0660*/ IMAD.MOV.U32 R7, RZ, RZ, R15 ; /* 0x000000ffff077224 */
/* 0x000fe200078e000f */
/*0670*/ @P1 BRA 0x1d0 ; /* 0xfffffb5000001947 */
/* 0x000fea000383ffff */
/*0680*/ ISETP.GT.AND P1, PT, R11, 0x4, PT ; /* 0x000000040b00780c */
/* 0x000fda0003f24270 */
/*0690*/ @!P1 BRA 0x940 ; /* 0x000002a000009947 */
/* 0x000fea0003800000 */
/*06a0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ee8000c1e1900 */
/*06b0*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ee4000c1e1900 */
/*06c0*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x02cfca00078e020d */
/*06d0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*06e0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*06f0*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*0700*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*0710*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0720*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*0730*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea4000c1e1900 */
/*0740*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0750*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0760*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*0770*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e24000c1e1900 */
/*0780*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0790*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*07a0*/ LDG.E R12, [R4.64+0x10] ; /* 0x00001004040c7981 */
/* 0x000e68000c1e1900 */
/*07b0*/ LDG.E R14, [R6.64+0x10] ; /* 0x00001004060e7981 */
/* 0x000e64000c1e1900 */
/*07c0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*07d0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*07e0*/ LDG.E R12, [R4.64+0x14] ; /* 0x00001404040c7981 */
/* 0x000ea8000c1e1900 */
/*07f0*/ LDG.E R14, [R6.64+0x14] ; /* 0x00001404060e7981 */
/* 0x000ea4000c1e1900 */
/*0800*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0810*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0820*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000ee8000c1e1900 */
/*0830*/ LDG.E R14, [R6.64+0x18] ; /* 0x00001804060e7981 */
/* 0x000ee4000c1e1900 */
/*0840*/ IMAD R19, R12, R14, R17 ; /* 0x0000000e0c137224 */
/* 0x008fca00078e0211 */
/*0850*/ STG.E [R2.64], R19 ; /* 0x0000001302007986 */
/* 0x0005e8000c101904 */
/*0860*/ LDG.E R12, [R4.64+0x1c] ; /* 0x00001c04040c7981 */
/* 0x000ee8000c1e1900 */
/*0870*/ LDG.E R13, [R6.64+0x1c] ; /* 0x00001c04060d7981 */
/* 0x0010e2000c1e1900 */
/*0880*/ IADD3 R14, P1, R6, 0x20, RZ ; /* 0x00000020060e7810 */
/* 0x000fe40007f3e0ff */
/*0890*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*08a0*/ IADD3.X R15, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe40000ffe4ff */
/*08b0*/ IADD3 R9, R9, 0x8, RZ ; /* 0x0000000809097810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ IADD3 R11, R11, -0x8, RZ ; /* 0xfffffff80b0b7810 */
/* 0x000fe20007ffe0ff */
/*08d0*/ IMAD.MOV.U32 R6, RZ, RZ, R14 ; /* 0x000000ffff067224 */
/* 0x001fe200078e000e */
/*08e0*/ MOV R7, R15 ; /* 0x0000000f00077202 */
/* 0x000fe20000000f00 */
/*08f0*/ IMAD R13, R12, R13, R19 ; /* 0x0000000d0c0d7224 */
/* 0x008fe200078e0213 */
/*0900*/ IADD3 R12, P2, R4, 0x20, RZ ; /* 0x00000020040c7810 */
/* 0x000fc80007f5e0ff */
/*0910*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0920*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0930*/ MOV R4, R12 ; /* 0x0000000c00047202 */
/* 0x000fe40000000f00 */
/*0940*/ ISETP.NE.OR P0, PT, R11, RZ, P0 ; /* 0x000000ff0b00720c */
/* 0x000fda0000705670 */
/*0950*/ @!P0 BRA 0xb10 ; /* 0x000001b000008947 */
/* 0x000fea0003800000 */
/*0960*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ee8000c1e1900 */
/*0970*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ee4000c1e1900 */
/*0980*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x02cfca00078e020d */
/*0990*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*09a0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*09b0*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*09c0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*09d0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*09e0*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*09f0*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea2000c1e1900 */
/*0a00*/ IADD3 R11, R11, -0x4, RZ ; /* 0xfffffffc0b0b7810 */
/* 0x000fe20007ffe0ff */
/*0a10*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0a20*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0a30*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*0a40*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e22000c1e1900 */
/*0a50*/ ISETP.NE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */
/* 0x000fe40003f05270 */
/*0a60*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fe20007ffe0ff */
/*0a70*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fe200078e0211 */
/*0a80*/ IADD3 R14, P1, R6, 0x10, RZ ; /* 0x00000010060e7810 */
/* 0x000fc40007f3e0ff */
/*0a90*/ IADD3 R12, P2, R4, 0x10, RZ ; /* 0x00000010040c7810 */
/* 0x000fe40007f5e0ff */
/*0aa0*/ IADD3.X R15, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe20000ffe4ff */
/*0ab0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0ac0*/ MOV R6, R14 ; /* 0x0000000e00067202 */
/* 0x000fe20000000f00 */
/*0ad0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0ae0*/ MOV R7, R15 ; /* 0x0000000f00077202 */
/* 0x000fe20000000f00 */
/*0af0*/ IMAD.MOV.U32 R4, RZ, RZ, R12 ; /* 0x000000ffff047224 */
/* 0x000fe200078e000c */
/*0b00*/ @P0 BRA 0x960 ; /* 0xfffffe5000000947 */
/* 0x004fea000383ffff */
/*0b10*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0b20*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0b30*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000162000c1e1900 */
/*0b40*/ IMAD R7, R10, c[0x0][0x178], R9 ; /* 0x00005e000a077a24 */
/* 0x000fe400078e0209 */
/*0b50*/ IMAD.WIDE R4, R9, R8, c[0x0][0x168] ; /* 0x00005a0009047625 */
/* 0x000fc800078e0208 */
/*0b60*/ IMAD.WIDE R8, R7, R8, c[0x0][0x160] ; /* 0x0000580007087625 */
/* 0x000fc800078e0208 */
/*0b70*/ IMAD.MOV.U32 R10, RZ, RZ, R4 ; /* 0x000000ffff0a7224 */
/* 0x001fca00078e0004 */
/*0b80*/ MOV R4, R10 ; /* 0x0000000a00047202 */
/* 0x000fe20000000f00 */
/*0b90*/ IMAD.MOV.U32 R7, RZ, RZ, R9 ; /* 0x000000ffff077224 */
/* 0x000fe200078e0009 */
/*0ba0*/ MOV R6, R8 ; /* 0x0000000800067202 */
/* 0x000fc80000000f00 */
/*0bb0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x0010e8000c1e1900 */
/*0bc0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee2000c1e1900 */
/*0bd0*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fe40007ffe0ff */
/*0be0*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fe40007f3e0ff */
/*0bf0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe40003f05270 */
/*0c00*/ IADD3 R8, P2, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fc40007f5e0ff */
/*0c10*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */
/* 0x001fe40000ffe4ff */
/*0c20*/ IADD3.X R9, RZ, R9, RZ, P2, !PT ; /* 0x00000009ff097210 */
/* 0x000fe200017fe4ff */
/*0c30*/ IMAD R11, R4, R6, R11 ; /* 0x00000006040b7224 */
/* 0x028fca00078e020b */
/*0c40*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0001e2000c101904 */
/*0c50*/ @P0 BRA 0xb80 ; /* 0xffffff2000000947 */
/* 0x000fea000383ffff */
/*0c60*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c70*/ BRA 0xc70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
cudaMalloc(&GPU_x , 1e4 * sizeof(int));
cudaMalloc(&GPU_b , 1e4 * sizeof(int));
cudaMalloc(&GPU_A , 1e8 * sizeof(int));
cudaMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
cudaMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), cudaMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
cudaFree(GPU_x);
cudaFree(GPU_b);
cudaFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} | .file "tmpxft_000c2ecd_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
.type _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z7kernelbPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
.globl _Z7kernelbPiS_S_i
.type _Z7kernelbPiS_S_i, @function
_Z7kernelbPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z7kernelbPiS_S_i, .-_Z7kernelbPiS_S_i
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $72, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $40000, %edi
call malloc@PLT
movq %rax, %rbp
movl $400000000, %edi
call malloc@PLT
movq %rax, %rbx
movl $0, %eax
.L15:
cmpl $9999, %eax
jle .L19
movl $1, (%rbx,%rax,4)
addq $1, %rax
cmpq $100000000, %rax
jne .L15
leaq 16(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $400000000, %edx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $40000, %edx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $40000, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $40, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L20
.L16:
movl $2, %ecx
movl $40000, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L21
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movl $1, 0(%rbp,%rax,4)
movl $1, (%rbx,%rax,4)
addq $1, %rax
jmp .L15
.L20:
movl $10000, %ecx
movq 8(%rsp), %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7kernelbPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7kernelbPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
cudaMalloc(&GPU_x , 1e4 * sizeof(int));
cudaMalloc(&GPU_b , 1e4 * sizeof(int));
cudaMalloc(&GPU_A , 1e8 * sizeof(int));
cudaMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), cudaMemcpyHostToDevice);
cudaMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
cudaMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), cudaMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
cudaFree(GPU_x);
cudaFree(GPU_b);
cudaFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
hipMalloc(&GPU_x , 1e4 * sizeof(int));
hipMalloc(&GPU_b , 1e4 * sizeof(int));
hipMalloc(&GPU_A , 1e8 * sizeof(int));
hipMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), hipMemcpyHostToDevice);
hipMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), hipMemcpyHostToDevice);
hipMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
hipMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), hipMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
hipFree(GPU_x);
hipFree(GPU_b);
hipFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
hipMalloc(&GPU_x , 1e4 * sizeof(int));
hipMalloc(&GPU_b , 1e4 * sizeof(int));
hipMalloc(&GPU_A , 1e8 * sizeof(int));
hipMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), hipMemcpyHostToDevice);
hipMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), hipMemcpyHostToDevice);
hipMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
hipMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), hipMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
hipFree(GPU_x);
hipFree(GPU_b);
hipFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernelbPiS_S_i
.globl _Z7kernelbPiS_S_i
.p2align 8
.type _Z7kernelbPiS_S_i,@function
_Z7kernelbPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_max_i32_e32 v0, 0, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB0_3
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v3, 31, v2
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_mul_lo_u32 v2, v2, s4
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b32 v4, v[0:1], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
.p2align 6
.LBB0_2:
global_load_b32 v8, v[2:3], off
global_load_b32 v9, v5, s[2:3]
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_i32 s4, s4, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s4, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v4, v6
global_store_b32 v[0:1], v6, off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernelbPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7kernelbPiS_S_i, .Lfunc_end0-_Z7kernelbPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7kernelbPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7kernelbPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
__global__ void kernelb(int *A, int *x, int *b, int N){
int tId = threadIdx.x + blockIdx.x * blockDim.x;
if(tId< N){
for(int k=0; k < N; k++){
b[tId] += A[(int)(tId*N+k)]*x[k];
}
}
}
int main(int argc, char const *argv[])
{
int n = 1e4;
int block_size = 256;
int grid_size = (int) ceil((float) n/ block_size);
int *GPU_b;
int *GPU_x;
int *GPU_A;
int *CPU_x = (int *) malloc(1e4 * sizeof (int));
int *CPU_A = (int *) malloc(1e8 * sizeof (int));
for(int k = 0; k < 1e8; k++){
if(k < 1e4){
CPU_x[k] = 1;
}
CPU_A[k] = 1;
}
hipMalloc(&GPU_x , 1e4 * sizeof(int));
hipMalloc(&GPU_b , 1e4 * sizeof(int));
hipMalloc(&GPU_A , 1e8 * sizeof(int));
hipMemcpy(GPU_A, CPU_A, 1e8 * sizeof(int), hipMemcpyHostToDevice);
hipMemcpy(GPU_x, CPU_x, 1e4 * sizeof(int), hipMemcpyHostToDevice);
hipMemset(GPU_b, 0, 1e4 * sizeof(int));
kernelb<<<grid_size, block_size>>>(GPU_A, GPU_x, GPU_b, n);
hipMemcpy(CPU_x, GPU_b, 1e4 * sizeof(int), hipMemcpyDeviceToHost);
//for(int k = 0; k< 1e4; k++){
// printf("%d\n", CPU_x[k]);
//}
hipFree(GPU_x);
hipFree(GPU_b);
hipFree(GPU_A);
free(CPU_x);
free(CPU_A);
return(0);
} | .text
.file "main.hip"
.globl _Z22__device_stub__kernelbPiS_S_i # -- Begin function _Z22__device_stub__kernelbPiS_S_i
.p2align 4, 0x90
.type _Z22__device_stub__kernelbPiS_S_i,@function
_Z22__device_stub__kernelbPiS_S_i: # @_Z22__device_stub__kernelbPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7kernelbPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z22__device_stub__kernelbPiS_S_i, .Lfunc_end0-_Z22__device_stub__kernelbPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $152, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %rbx
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
xorl %eax, %eax
jmp .LBB1_1
.p2align 4, 0x90
.LBB1_3: # in Loop: Header=BB1_1 Depth=1
movl $1, (%r14,%rax,4)
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
je .LBB1_4
.LBB1_1: # =>This Inner Loop Header: Depth=1
cmpq $9999, %rax # imm = 0x270F
ja .LBB1_3
# %bb.2: # in Loop: Header=BB1_1 Depth=1
movl $1, (%rbx,%rax,4)
jmp .LBB1_3
.LBB1_4:
leaq 24(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 16(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
movq 16(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
xorl %esi, %esi
callq hipMemset
movabsq $4294967336, %rdi # imm = 0x100000028
leaq 216(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $10000, 36(%rsp) # imm = 0x2710
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z7kernelbPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq 8(%rsp), %rsi
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7kernelbPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7kernelbPiS_S_i,@object # @_Z7kernelbPiS_S_i
.section .rodata,"a",@progbits
.globl _Z7kernelbPiS_S_i
.p2align 3, 0x0
_Z7kernelbPiS_S_i:
.quad _Z22__device_stub__kernelbPiS_S_i
.size _Z7kernelbPiS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7kernelbPiS_S_i"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__kernelbPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7kernelbPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7kernelbPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R10, SR_CTAID.X ; /* 0x00000000000a7919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff007624 */
/* 0x000fc600078e00ff */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0040*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fe20003f06270 */
/*0050*/ IMAD R10, R10, c[0x0][0x0], R3 ; /* 0x000000000a0a7a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.OR P0, PT, R10, c[0x0][0x178], !P0 ; /* 0x00005e000a007a0c */
/* 0x000fda0004706670 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe20007ffe0ff */
/*0090*/ HFMA2.MMA R8, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff087435 */
/* 0x000fe200000001ff */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00b0*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe200078ec0ff */
/*00c0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe200078e00ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fcc0003f06070 */
/*00e0*/ IMAD.WIDE R2, R10, R8, c[0x0][0x170] ; /* 0x00005c000a027625 */
/* 0x000fce00078e0208 */
/*00f0*/ @!P0 BRA 0xb10 ; /* 0x00000a1000008947 */
/* 0x000fea0003800000 */
/*0100*/ IADD3 R11, -R0, c[0x0][0x178], RZ ; /* 0x00005e00000b7a10 */
/* 0x000fe20007ffe1ff */
/*0110*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x000162000c1e1900 */
/*0120*/ IMAD R7, R10, c[0x0][0x178], RZ ; /* 0x00005e000a077a24 */
/* 0x000fe200078e02ff */
/*0130*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe20000000f00 */
/*0140*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff047624 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.GT.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.WIDE R6, R7, R8, c[0x0][0x160] ; /* 0x0000580007067625 */
/* 0x000fe200078e0208 */
/*0170*/ MOV R5, c[0x0][0x16c] ; /* 0x00005b0000057a02 */
/* 0x000fd60000000f00 */
/*0180*/ @!P0 BRA 0x960 ; /* 0x000007d000008947 */
/* 0x001fea0003800000 */
/*0190*/ ISETP.GT.AND P1, PT, R11, 0xc, PT ; /* 0x0000000c0b00780c */
/* 0x000fe40003f24270 */
/*01a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01b0*/ @!P1 BRA 0x680 ; /* 0x000004c000009947 */
/* 0x000fea0003800000 */
/*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01d0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x004ea8000c1e1900 */
/*01e0*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ea4000c1e1900 */
/*01f0*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x024fca00078e020d */
/*0200*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0210*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*0220*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*0230*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*0240*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0250*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*0260*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea4000c1e1900 */
/*0270*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0280*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0290*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*02a0*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e24000c1e1900 */
/*02b0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*02c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*02d0*/ LDG.E R12, [R4.64+0x10] ; /* 0x00001004040c7981 */
/* 0x000e68000c1e1900 */
/*02e0*/ LDG.E R14, [R6.64+0x10] ; /* 0x00001004060e7981 */
/* 0x000e64000c1e1900 */
/*02f0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0300*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0310*/ LDG.E R12, [R4.64+0x14] ; /* 0x00001404040c7981 */
/* 0x000ea8000c1e1900 */
/*0320*/ LDG.E R14, [R6.64+0x14] ; /* 0x00001404060e7981 */
/* 0x000ea4000c1e1900 */
/*0330*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0340*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0350*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000e28000c1e1900 */
/*0360*/ LDG.E R14, [R6.64+0x18] ; /* 0x00001804060e7981 */
/* 0x000e24000c1e1900 */
/*0370*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0380*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0390*/ LDG.E R12, [R4.64+0x1c] ; /* 0x00001c04040c7981 */
/* 0x000e68000c1e1900 */
/*03a0*/ LDG.E R14, [R6.64+0x1c] ; /* 0x00001c04060e7981 */
/* 0x000e64000c1e1900 */
/*03b0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*03c0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*03d0*/ LDG.E R12, [R4.64+0x20] ; /* 0x00002004040c7981 */
/* 0x000ea8000c1e1900 */
/*03e0*/ LDG.E R14, [R6.64+0x20] ; /* 0x00002004060e7981 */
/* 0x000ea4000c1e1900 */
/*03f0*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0400*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0410*/ LDG.E R12, [R4.64+0x24] ; /* 0x00002404040c7981 */
/* 0x000e28000c1e1900 */
/*0420*/ LDG.E R14, [R6.64+0x24] ; /* 0x00002404060e7981 */
/* 0x000e24000c1e1900 */
/*0430*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0440*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0450*/ LDG.E R12, [R4.64+0x28] ; /* 0x00002804040c7981 */
/* 0x000e68000c1e1900 */
/*0460*/ LDG.E R14, [R6.64+0x28] ; /* 0x00002804060e7981 */
/* 0x000e64000c1e1900 */
/*0470*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0480*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0490*/ LDG.E R12, [R4.64+0x2c] ; /* 0x00002c04040c7981 */
/* 0x000ea8000c1e1900 */
/*04a0*/ LDG.E R14, [R6.64+0x2c] ; /* 0x00002c04060e7981 */
/* 0x000ea4000c1e1900 */
/*04b0*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*04c0*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*04d0*/ LDG.E R12, [R4.64+0x30] ; /* 0x00003004040c7981 */
/* 0x000e28000c1e1900 */
/*04e0*/ LDG.E R14, [R6.64+0x30] ; /* 0x00003004060e7981 */
/* 0x000e24000c1e1900 */
/*04f0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0500*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*0510*/ LDG.E R12, [R4.64+0x34] ; /* 0x00003404040c7981 */
/* 0x000e68000c1e1900 */
/*0520*/ LDG.E R14, [R6.64+0x34] ; /* 0x00003404060e7981 */
/* 0x000e64000c1e1900 */
/*0530*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*0540*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0550*/ LDG.E R12, [R4.64+0x38] ; /* 0x00003804040c7981 */
/* 0x000ea8000c1e1900 */
/*0560*/ LDG.E R14, [R6.64+0x38] ; /* 0x00003804060e7981 */
/* 0x000ea2000c1e1900 */
/*0570*/ IADD3 R11, R11, -0x10, RZ ; /* 0xfffffff00b0b7810 */
/* 0x000fe20007ffe0ff */
/*0580*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0590*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*05a0*/ LDG.E R12, [R4.64+0x3c] ; /* 0x00003c04040c7981 */
/* 0x000e28000c1e1900 */
/*05b0*/ LDG.E R14, [R6.64+0x3c] ; /* 0x00003c04060e7981 */
/* 0x000e22000c1e1900 */
/*05c0*/ ISETP.GT.AND P1, PT, R11, 0xc, PT ; /* 0x0000000c0b00780c */
/* 0x000fe40003f24270 */
/*05d0*/ IADD3 R9, R9, 0x10, RZ ; /* 0x0000001009097810 */
/* 0x000fe20007ffe0ff */
/*05e0*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fe200078e0211 */
/*05f0*/ IADD3 R14, P2, R6, 0x40, RZ ; /* 0x00000040060e7810 */
/* 0x000fc40007f5e0ff */
/*0600*/ IADD3 R12, P3, R4, 0x40, RZ ; /* 0x00000040040c7810 */
/* 0x000fe40007f7e0ff */
/*0610*/ IADD3.X R15, RZ, R7, RZ, P2, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe200017fe4ff */
/*0620*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0630*/ MOV R6, R14 ; /* 0x0000000e00067202 */
/* 0x000fe20000000f00 */
/*0640*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */
/* 0x000fe400018e0605 */
/*0650*/ IMAD.MOV.U32 R4, RZ, RZ, R12 ; /* 0x000000ffff047224 */
/* 0x000fe400078e000c */
/*0660*/ IMAD.MOV.U32 R7, RZ, RZ, R15 ; /* 0x000000ffff077224 */
/* 0x000fe200078e000f */
/*0670*/ @P1 BRA 0x1d0 ; /* 0xfffffb5000001947 */
/* 0x000fea000383ffff */
/*0680*/ ISETP.GT.AND P1, PT, R11, 0x4, PT ; /* 0x000000040b00780c */
/* 0x000fda0003f24270 */
/*0690*/ @!P1 BRA 0x940 ; /* 0x000002a000009947 */
/* 0x000fea0003800000 */
/*06a0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ee8000c1e1900 */
/*06b0*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ee4000c1e1900 */
/*06c0*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x02cfca00078e020d */
/*06d0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*06e0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*06f0*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*0700*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*0710*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*0720*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*0730*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea4000c1e1900 */
/*0740*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0750*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0760*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*0770*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e24000c1e1900 */
/*0780*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fca00078e0211 */
/*0790*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*07a0*/ LDG.E R12, [R4.64+0x10] ; /* 0x00001004040c7981 */
/* 0x000e68000c1e1900 */
/*07b0*/ LDG.E R14, [R6.64+0x10] ; /* 0x00001004060e7981 */
/* 0x000e64000c1e1900 */
/*07c0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x002fca00078e020d */
/*07d0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*07e0*/ LDG.E R12, [R4.64+0x14] ; /* 0x00001404040c7981 */
/* 0x000ea8000c1e1900 */
/*07f0*/ LDG.E R14, [R6.64+0x14] ; /* 0x00001404060e7981 */
/* 0x000ea4000c1e1900 */
/*0800*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0810*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0820*/ LDG.E R12, [R4.64+0x18] ; /* 0x00001804040c7981 */
/* 0x000ee8000c1e1900 */
/*0830*/ LDG.E R14, [R6.64+0x18] ; /* 0x00001804060e7981 */
/* 0x000ee4000c1e1900 */
/*0840*/ IMAD R19, R12, R14, R17 ; /* 0x0000000e0c137224 */
/* 0x008fca00078e0211 */
/*0850*/ STG.E [R2.64], R19 ; /* 0x0000001302007986 */
/* 0x0005e8000c101904 */
/*0860*/ LDG.E R12, [R4.64+0x1c] ; /* 0x00001c04040c7981 */
/* 0x000ee8000c1e1900 */
/*0870*/ LDG.E R13, [R6.64+0x1c] ; /* 0x00001c04060d7981 */
/* 0x0010e2000c1e1900 */
/*0880*/ IADD3 R14, P1, R6, 0x20, RZ ; /* 0x00000020060e7810 */
/* 0x000fe40007f3e0ff */
/*0890*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*08a0*/ IADD3.X R15, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe40000ffe4ff */
/*08b0*/ IADD3 R9, R9, 0x8, RZ ; /* 0x0000000809097810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ IADD3 R11, R11, -0x8, RZ ; /* 0xfffffff80b0b7810 */
/* 0x000fe20007ffe0ff */
/*08d0*/ IMAD.MOV.U32 R6, RZ, RZ, R14 ; /* 0x000000ffff067224 */
/* 0x001fe200078e000e */
/*08e0*/ MOV R7, R15 ; /* 0x0000000f00077202 */
/* 0x000fe20000000f00 */
/*08f0*/ IMAD R13, R12, R13, R19 ; /* 0x0000000d0c0d7224 */
/* 0x008fe200078e0213 */
/*0900*/ IADD3 R12, P2, R4, 0x20, RZ ; /* 0x00000020040c7810 */
/* 0x000fc80007f5e0ff */
/*0910*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0920*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0930*/ MOV R4, R12 ; /* 0x0000000c00047202 */
/* 0x000fe40000000f00 */
/*0940*/ ISETP.NE.OR P0, PT, R11, RZ, P0 ; /* 0x000000ff0b00720c */
/* 0x000fda0000705670 */
/*0950*/ @!P0 BRA 0xb10 ; /* 0x000001b000008947 */
/* 0x000fea0003800000 */
/*0960*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */
/* 0x000ee8000c1e1900 */
/*0970*/ LDG.E R14, [R6.64] ; /* 0x00000004060e7981 */
/* 0x000ee4000c1e1900 */
/*0980*/ IMAD R13, R12, R14, R13 ; /* 0x0000000e0c0d7224 */
/* 0x02cfca00078e020d */
/*0990*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e8000c101904 */
/*09a0*/ LDG.E R12, [R4.64+0x4] ; /* 0x00000404040c7981 */
/* 0x000ea8000c1e1900 */
/*09b0*/ LDG.E R14, [R6.64+0x4] ; /* 0x00000404060e7981 */
/* 0x000ea4000c1e1900 */
/*09c0*/ IMAD R15, R12, R14, R13 ; /* 0x0000000e0c0f7224 */
/* 0x004fca00078e020d */
/*09d0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x0003e8000c101904 */
/*09e0*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000ea8000c1e1900 */
/*09f0*/ LDG.E R14, [R6.64+0x8] ; /* 0x00000804060e7981 */
/* 0x000ea2000c1e1900 */
/*0a00*/ IADD3 R11, R11, -0x4, RZ ; /* 0xfffffffc0b0b7810 */
/* 0x000fe20007ffe0ff */
/*0a10*/ IMAD R17, R12, R14, R15 ; /* 0x0000000e0c117224 */
/* 0x004fca00078e020f */
/*0a20*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */
/* 0x0005e8000c101904 */
/*0a30*/ LDG.E R12, [R4.64+0xc] ; /* 0x00000c04040c7981 */
/* 0x000e28000c1e1900 */
/*0a40*/ LDG.E R14, [R6.64+0xc] ; /* 0x00000c04060e7981 */
/* 0x000e22000c1e1900 */
/*0a50*/ ISETP.NE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */
/* 0x000fe40003f05270 */
/*0a60*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */
/* 0x000fe20007ffe0ff */
/*0a70*/ IMAD R13, R12, R14, R17 ; /* 0x0000000e0c0d7224 */
/* 0x001fe200078e0211 */
/*0a80*/ IADD3 R14, P1, R6, 0x10, RZ ; /* 0x00000010060e7810 */
/* 0x000fc40007f3e0ff */
/*0a90*/ IADD3 R12, P2, R4, 0x10, RZ ; /* 0x00000010040c7810 */
/* 0x000fe40007f5e0ff */
/*0aa0*/ IADD3.X R15, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff0f7210 */
/* 0x002fe20000ffe4ff */
/*0ab0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0005e2000c101904 */
/*0ac0*/ MOV R6, R14 ; /* 0x0000000e00067202 */
/* 0x000fe20000000f00 */
/*0ad0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */
/* 0x000fe200010e0605 */
/*0ae0*/ MOV R7, R15 ; /* 0x0000000f00077202 */
/* 0x000fe20000000f00 */
/*0af0*/ IMAD.MOV.U32 R4, RZ, RZ, R12 ; /* 0x000000ffff047224 */
/* 0x000fe200078e000c */
/*0b00*/ @P0 BRA 0x960 ; /* 0xfffffe5000000947 */
/* 0x004fea000383ffff */
/*0b10*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0b20*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0b30*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */
/* 0x000162000c1e1900 */
/*0b40*/ IMAD R7, R10, c[0x0][0x178], R9 ; /* 0x00005e000a077a24 */
/* 0x000fe400078e0209 */
/*0b50*/ IMAD.WIDE R4, R9, R8, c[0x0][0x168] ; /* 0x00005a0009047625 */
/* 0x000fc800078e0208 */
/*0b60*/ IMAD.WIDE R8, R7, R8, c[0x0][0x160] ; /* 0x0000580007087625 */
/* 0x000fc800078e0208 */
/*0b70*/ IMAD.MOV.U32 R10, RZ, RZ, R4 ; /* 0x000000ffff0a7224 */
/* 0x001fca00078e0004 */
/*0b80*/ MOV R4, R10 ; /* 0x0000000a00047202 */
/* 0x000fe20000000f00 */
/*0b90*/ IMAD.MOV.U32 R7, RZ, RZ, R9 ; /* 0x000000ffff077224 */
/* 0x000fe200078e0009 */
/*0ba0*/ MOV R6, R8 ; /* 0x0000000800067202 */
/* 0x000fc80000000f00 */
/*0bb0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x0010e8000c1e1900 */
/*0bc0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee2000c1e1900 */
/*0bd0*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fe40007ffe0ff */
/*0be0*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */
/* 0x000fe40007f3e0ff */
/*0bf0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fe40003f05270 */
/*0c00*/ IADD3 R8, P2, R8, 0x4, RZ ; /* 0x0000000408087810 */
/* 0x000fc40007f5e0ff */
/*0c10*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */
/* 0x001fe40000ffe4ff */
/*0c20*/ IADD3.X R9, RZ, R9, RZ, P2, !PT ; /* 0x00000009ff097210 */
/* 0x000fe200017fe4ff */
/*0c30*/ IMAD R11, R4, R6, R11 ; /* 0x00000006040b7224 */
/* 0x028fca00078e020b */
/*0c40*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */
/* 0x0001e2000c101904 */
/*0c50*/ @P0 BRA 0xb80 ; /* 0xffffff2000000947 */
/* 0x000fea000383ffff */
/*0c60*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c70*/ BRA 0xc70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernelbPiS_S_i
.globl _Z7kernelbPiS_S_i
.p2align 8
.type _Z7kernelbPiS_S_i,@function
_Z7kernelbPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_max_i32_e32 v0, 0, v2
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v0
s_cbranch_execz .LBB0_3
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v3, 31, v2
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_mul_lo_u32 v2, v2, s4
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b32 v4, v[0:1], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
.p2align 6
.LBB0_2:
global_load_b32 v8, v[2:3], off
global_load_b32 v9, v5, s[2:3]
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_i32 s4, s4, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s4, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[4:5]
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v4, v6
global_store_b32 v[0:1], v6, off
s_cbranch_scc1 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7kernelbPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7kernelbPiS_S_i, .Lfunc_end0-_Z7kernelbPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7kernelbPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7kernelbPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c2ecd_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
.type _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i, @function
_Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z7kernelbPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i, .-_Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
.globl _Z7kernelbPiS_S_i
.type _Z7kernelbPiS_S_i, @function
_Z7kernelbPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z7kernelbPiS_S_i, .-_Z7kernelbPiS_S_i
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $72, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $40000, %edi
call malloc@PLT
movq %rax, %rbp
movl $400000000, %edi
call malloc@PLT
movq %rax, %rbx
movl $0, %eax
.L15:
cmpl $9999, %eax
jle .L19
movl $1, (%rbx,%rax,4)
addq $1, %rax
cmpq $100000000, %rax
jne .L15
leaq 16(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 8(%rsp), %rdi
movl $40000, %esi
call cudaMalloc@PLT
leaq 24(%rsp), %rdi
movl $400000000, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $400000000, %edx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $40000, %edx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $40000, %edx
movl $0, %esi
movq 8(%rsp), %rdi
call cudaMemset@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $40, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L20
.L16:
movl $2, %ecx
movl $40000, %edx
movq 8(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L21
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
movl $1, 0(%rbp,%rax,4)
movl $1, (%rbx,%rax,4)
addq $1, %rax
jmp .L15
.L20:
movl $10000, %ecx
movq 8(%rsp), %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z31__device_stub__Z7kernelbPiS_S_iPiS_S_i
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z7kernelbPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z7kernelbPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "main.hip"
.globl _Z22__device_stub__kernelbPiS_S_i # -- Begin function _Z22__device_stub__kernelbPiS_S_i
.p2align 4, 0x90
.type _Z22__device_stub__kernelbPiS_S_i,@function
_Z22__device_stub__kernelbPiS_S_i: # @_Z22__device_stub__kernelbPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z7kernelbPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z22__device_stub__kernelbPiS_S_i, .Lfunc_end0-_Z22__device_stub__kernelbPiS_S_i
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $152, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %rbx
movl $400000000, %edi # imm = 0x17D78400
callq malloc
movq %rax, %r14
xorl %eax, %eax
jmp .LBB1_1
.p2align 4, 0x90
.LBB1_3: # in Loop: Header=BB1_1 Depth=1
movl $1, (%r14,%rax,4)
incq %rax
cmpq $100000000, %rax # imm = 0x5F5E100
je .LBB1_4
.LBB1_1: # =>This Inner Loop Header: Depth=1
cmpq $9999, %rax # imm = 0x270F
ja .LBB1_3
# %bb.2: # in Loop: Header=BB1_1 Depth=1
movl $1, (%rbx,%rax,4)
jmp .LBB1_3
.LBB1_4:
leaq 24(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 8(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
leaq 16(%rsp), %rdi
movl $400000000, %esi # imm = 0x17D78400
callq hipMalloc
movq 16(%rsp), %rdi
movl $400000000, %edx # imm = 0x17D78400
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $40000, %edx # imm = 0x9C40
xorl %esi, %esi
callq hipMemset
movabsq $4294967336, %rdi # imm = 0x100000028
leaq 216(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 24(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
movl $10000, 36(%rsp) # imm = 0x2710
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 96(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rax
movq %rax, 128(%rsp)
leaq 36(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z7kernelbPiS_S_i, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq 8(%rsp), %rsi
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7kernelbPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7kernelbPiS_S_i,@object # @_Z7kernelbPiS_S_i
.section .rodata,"a",@progbits
.globl _Z7kernelbPiS_S_i
.p2align 3, 0x0
_Z7kernelbPiS_S_i:
.quad _Z22__device_stub__kernelbPiS_S_i
.size _Z7kernelbPiS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z7kernelbPiS_S_i"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__kernelbPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7kernelbPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <complex.h>
#include <cuda_runtime.h>
#include <utility>
#include <sys/time.h>
#define K 3
#define BLCH 8
#define BLCW 32
__constant__ float filter[K*K];
int compute_tiled_naive(float *img, float *f, float * out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW) {
//compute tile num
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
for (int j = 0; j < bbh-1; j++){
for (int k = 0; k < bbw-1; k++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + k*bw;
int ind = convW * (j*bh + mi) + k*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
}
//compute right most tiles
for (int j = 0; j < bbh-1; j++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + (bbw-1)*bw;
int ind = convW * (j*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute bottom tiles
for (int j = 0; j < bbw-1; j++){
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (j-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (j-1)*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute the final tile
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
return 0;
}
__global__ void compute_gpu_naive(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int idX = blockDim.x * blockIdx.x + threadIdx.x;
int idY = blockDim.y * blockIdx.y + threadIdx.y;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
if (idX < convH && idY < convW){
int ind = idY * convW + idX + con;
int inm = idY * imgW + idX + imgg;
for (int fi = 0; fi < nF; fi++){
inm += fi * imgW;
int inf = fi*nF;
for (int fj = 0; fj < nF; fj++){
out[ind] += img[fj + inm] * filter[inf + fj];
}
}
}
}
}
__global__ void compute_gpu_tiled(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < (bh -nF + 1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
}
}
//remember the threads number to be larger than tile size
__global__ void compute_gpu_sm(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
__shared__ float sm[ (BLCH + K - 1) * (BLCW + K - 1) ];
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < (bh+nF-1) && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj ;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < (bh+nF-1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh -nF + 1) && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
}
}
int main(int argc, char **argv){
//create parameters
int imgH = 2048;
int imgW = 2048;
int imgN = 10;
int blcH = BLCH;
int blcW = BLCW;
int k = K;
int s = 1;
int nB = (imgH * imgW) / (blcH * blcW);
//int nT = (blcW+k) * (blcH+k);
int nT = blcW * blcH;
int imgDims = imgH * imgW * imgN;
int imgSize = imgDims * sizeof(float);
srand (time(NULL));
// create host array that can hold pixel intensity values
float *h_img = new float[imgDims];
for(int i=0; i<imgDims; i++){
h_img[i] = (float)(rand()%10485)/10485;
}
// create filter and copy to constant memory
int filterDims = k * k;
int filterSize = filterDims * sizeof(float);
float *f = new float[filterDims];
for(int i=0; i<filterDims; i++){
f[i] = (float)(rand()%10485)/10485;
}
// create host and device array that holds the convoluted matrix
int convH = ( (imgH - k) / s ) + 1;
int convW = ( (imgW - k) / s ) + 1;
int convDims = convH * convW;
int convSize = convDims * sizeof(float);
float *h_convolved = new float[convDims];
for(int i=0; i<convDims; i++){
h_convolved[i] = 0.0;
}
// create device array that can hold pixel intensity values in GPU GM
float *d_img;
float *d_convolved;
cudaMalloc((void **) &d_img, imgSize);
cudaMemcpy(d_img, h_img, imgSize, cudaMemcpyHostToDevice);
cudaMemcpyToSymbol(filter, f, filterSize);
cudaMalloc((void **) &d_convolved, convSize);
cudaMemcpy(d_convolved, h_convolved, convSize, cudaMemcpyHostToDevice);
struct timeval starttime, endtime;
double elapsed = 0.0;
for (int i = 0; i<10000; i++){
gettimeofday(&starttime,NULL);
// call the kernel
compute_gpu_tiled<<<nB, nT>>>(d_img, d_convolved, blcH, blcW, imgH, imgW, imgN, k, convH, convW);
gettimeofday(&endtime,NULL);
elapsed += ((endtime.tv_sec-starttime.tv_sec)*1000000 + endtime.tv_usec-starttime.tv_usec)/1000000.0;
}
cudaMemcpy(h_convolved, d_convolved, convSize, cudaMemcpyDeviceToHost);
cudaDeviceReset();
printf("Input imgH: %d imgW: %d imgN: %d\n", imgH, imgW, imgN);
printf("Tile width: %d height: %d\n", blcW, blcH);
printf("Block number: %d, block size: %d \n", nB, nT);
printf("time: %f \n", elapsed);
delete h_img;
delete h_convolved;
return 0;
} | .file "tmpxft_000f810a_00000000-6_con_den_shape1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3974:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3974:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z19compute_tiled_naivePfS_S_iiiiiiii
.type _Z19compute_tiled_naivePfS_S_iiiiiiii, @function
_Z19compute_tiled_naivePfS_S_iiiiiiii:
.LFB3970:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $24, %rsp
.cfi_def_cfa_offset 80
movq %rdx, -104(%rsp)
movl %r8d, -92(%rsp)
movl 80(%rsp), %r11d
movl 96(%rsp), %r12d
movl %r11d, %eax
cltd
idivl %r8d
movl %eax, -56(%rsp)
movl %r9d, %eax
cltd
idivl %ecx
cmpl $0, 88(%rsp)
jle .L4
movq %rdi, %r15
movq %rsi, %r14
movl %ecx, %ebx
movl %r8d, %r10d
movl %r8d, %edi
movl %eax, %esi
leal -1(%rax), %ecx
movl %ecx, -28(%rsp)
movl -56(%rsp), %eax
subl $1, %eax
movl %eax, -88(%rsp)
imull %eax, %edi
movl %edi, -24(%rsp)
movl %ecx, %eax
imull %ebx, %eax
imull %r11d, %r9d
movl %r9d, -12(%rsp)
movl 112(%rsp), %ecx
imull 104(%rsp), %ecx
movl %ecx, -8(%rsp)
movl %ebx, %ecx
imull %r11d, %ecx
movl %ecx, -68(%rsp)
movl %ebx, %ecx
imull 112(%rsp), %ecx
movl %ecx, -20(%rsp)
movl 112(%rsp), %ecx
subl %r11d, %ecx
movl %ebx, %edx
imull %ecx, %edx
movl %edx, -16(%rsp)
movl %eax, %edx
imull %r11d, %edx
movl %edx, %r9d
subl %r8d, %r9d
movl %r9d, -32(%rsp)
imull %eax, %ecx
movl %ecx, -36(%rsp)
leal (%rdi,%rdx), %ecx
movl %ecx, -44(%rsp)
imull 112(%rsp), %eax
addl %edi, %eax
movl %eax, -40(%rsp)
movl $0, -60(%rsp)
movl $0, -64(%rsp)
movl $0, %ebp
leal -1(%rsi), %edi
subl %r12d, %r10d
movl %r10d, -52(%rsp)
leal 1(%r10), %eax
movl %eax, -48(%rsp)
movl %ebx, %edx
movl %r11d, %ebx
movl %r12d, %r13d
movl 112(%rsp), %r12d
movl %edi, %r8d
movl %ebp, %edi
jmp .L42
.L43:
movl %eax, %r11d
.L10:
movl %r10d, %esi
addl %r9d, %ecx
movl $0, %eax
.L9:
addl %eax, %esi
addl %eax, %ecx
leal 0(%rbp,%rcx), %r8d
movslq %r8d, %r8
movslq %esi, %rdx
movss (%r15,%r8,4), %xmm0
mulss (%r14,%rdx,4), %xmm0
addss (%rdi), %xmm0
movss %xmm0, (%rdi)
movl %eax, %edx
addl $1, %eax
cmpl %eax, %r13d
jne .L9
leal 1(%r11), %eax
addl %ebx, %r9d
addl %r12d, %r10d
cmpl %edx, %r11d
jne .L43
movl -116(%rsp), %edx
movl -112(%rsp), %esi
.L8:
addl $1, %esi
cmpl %esi, -96(%rsp)
je .L71
.L11:
addl %esi, %ecx
addl %esi, %edx
testl %r13d, %r13d
jle .L8
movl -108(%rsp), %eax
addl %edx, %eax
cltq
movq -104(%rsp), %rdi
leaq (%rdi,%rax,4), %rdi
movl $0, %r10d
movl $0, %r9d
movl $0, %r11d
movl %edx, -116(%rsp)
movl %esi, -112(%rsp)
jmp .L10
.L71:
movl 16(%rsp), %r9d
movl -96(%rsp), %r8d
movl 20(%rsp), %edi
.L7:
addl $1, -84(%rsp)
movl -84(%rsp), %eax
addl %ebx, -76(%rsp)
addl %r12d, -72(%rsp)
cmpl %eax, %r9d
je .L72
.L12:
movl -76(%rsp), %ecx
movl -72(%rsp), %edx
testl %r8d, %r8d
jle .L7
movl $0, %esi
movl %r9d, 16(%rsp)
movl %r8d, -96(%rsp)
movl %edi, 20(%rsp)
jmp .L11
.L72:
movl 8(%rsp), %ecx
movl 12(%rsp), %r11d
movl %r8d, %edx
movl 4(%rsp), %r8d
.L15:
addl $1, %r8d
addl %edx, %ecx
movl -88(%rsp), %eax
cmpl %eax, %r8d
je .L64
.L17:
leal (%rcx,%r11), %eax
movl %eax, -72(%rsp)
movl %ecx, -76(%rsp)
movl $0, -84(%rsp)
testl %r9d, %r9d
jle .L15
movl %r8d, 4(%rsp)
movl %ecx, 8(%rsp)
movl %r11d, 12(%rsp)
movl %edx, %r8d
jmp .L12
.L64:
movl (%rsp), %esi
movl %ebx, %edx
movl %edi, %ebx
movl -4(%rsp), %edi
.L13:
movl -80(%rsp), %eax
addl $1, %eax
movl -68(%rsp), %ecx
addl %ecx, %esi
movl -16(%rsp), %ecx
addl %ecx, %r11d
cmpl %ebx, %eax
je .L44
movl %eax, -80(%rsp)
.L6:
cmpl $1, -56(%rsp)
jle .L13
movl %esi, %ecx
movl $0, %r8d
movl %edi, -4(%rsp)
movl %esi, (%rsp)
movl %ebx, %edi
movl %edx, %ebx
movl -92(%rsp), %edx
jmp .L17
.L45:
movl %eax, %r12d
.L21:
movl %r11d, %edi
addl %r10d, %esi
movl $0, %eax
.L20:
addl %eax, %edi
addl %eax, %esi
leal 0(%rbp,%rsi), %ecx
movslq %ecx, %rcx
movslq %edi, %rdx
movss (%r15,%rcx,4), %xmm0
mulss (%r14,%rdx,4), %xmm0
addss (%r8), %xmm0
movss %xmm0, (%r8)
movl %eax, %ecx
addl $1, %eax
cmpl %eax, %r13d
jne .L20
leal 1(%r12), %eax
addl %ebx, %r10d
addl %r13d, %r11d
cmpl %ecx, %r12d
jne .L45
movl 12(%rsp), %edi
.L19:
addl $1, %edi
movl -48(%rsp), %eax
cmpl %eax, %edi
je .L73
.L22:
addl %edi, %esi
addl %edi, %r9d
testl %r13d, %r13d
jle .L19
movl -108(%rsp), %eax
leal (%rax,%r9), %r8d
movslq %r8d, %r8
movq -104(%rsp), %rax
leaq (%rax,%r8,4), %r8
movl $0, %r11d
movl $0, %r10d
movl $0, %r12d
movl %edi, 12(%rsp)
jmp .L21
.L73:
movl -72(%rsp), %r11d
movl -4(%rsp), %r10d
movl (%rsp), %ecx
movl 4(%rsp), %edx
movl 8(%rsp), %r8d
.L18:
addl $1, -116(%rsp)
movl -116(%rsp), %eax
addl %ebx, -112(%rsp)
addl %edx, %r11d
cmpl %eax, %ecx
je .L74
.L23:
movl -112(%rsp), %esi
movl %r11d, %r9d
cmpl $0, -52(%rsp)
js .L18
movl $0, %edi
movl %r11d, -72(%rsp)
movl %r10d, -4(%rsp)
movl %ecx, (%rsp)
movl %edx, 4(%rsp)
movl %r8d, 8(%rsp)
jmp .L22
.L74:
movl -96(%rsp), %edi
movl -76(%rsp), %r9d
movl %edx, %r12d
movl %ecx, %edx
movl -84(%rsp), %ecx
.L24:
leal 1(%r10), %eax
movl -68(%rsp), %esi
addl %esi, %r9d
movl -20(%rsp), %esi
addl %esi, %ecx
cmpl %r10d, -80(%rsp)
je .L5
movl %eax, %r10d
.L16:
movl %ecx, %r11d
movl %r9d, -112(%rsp)
movl $0, %eax
testl %edx, %edx
jle .L24
movl %edi, -96(%rsp)
movl %eax, -116(%rsp)
movl %ecx, -84(%rsp)
movl %r9d, -76(%rsp)
movl %edx, %ecx
movl %r12d, %edx
jmp .L23
.L44:
movl %ebx, %r8d
movl %edx, %ebx
movl %r9d, %edx
movl -24(%rsp), %r9d
movl %r9d, %ecx
movl $0, %r10d
jmp .L16
.L5:
cmpl $0, -88(%rsp)
jle .L25
movl -32(%rsp), %ecx
movl $0, %r9d
movl %edx, %r10d
subl %r13d, %r10d
leal 1(%r10), %eax
movl %eax, -96(%rsp)
jmp .L26
.L47:
movl %eax, %r12d
.L30:
movl %r11d, %esi
addl %r10d, %ecx
movl $0, %eax
.L29:
addl %eax, %esi
addl %eax, %ecx
leal 0(%rbp,%rcx), %edi
movslq %edi, %rdi
movslq %esi, %rdx
movss (%r15,%rdi,4), %xmm0
mulss (%r14,%rdx,4), %xmm0
addss (%r8), %xmm0
movss %xmm0, (%r8)
movl %eax, %edx
addl $1, %eax
cmpl %eax, %r13d
jne .L29
leal 1(%r12), %eax
addl %ebx, %r10d
addl %r13d, %r11d
cmpl %edx, %r12d
jne .L47
movl %r9d, %esi
movl 12(%rsp), %edx
.L28:
addl $1, %esi
cmpl %esi, -92(%rsp)
je .L75
.L31:
addl %esi, %ecx
addl %esi, -116(%rsp)
movl -116(%rsp), %eax
testl %r13d, %r13d
jle .L28
movl -108(%rsp), %edi
leal (%rdi,%rax), %r8d
movslq %r8d, %r8
movq -104(%rsp), %rax
leaq (%rax,%r8,4), %r8
movl $0, %r11d
movl $0, %r10d
movl $0, %r12d
movl %esi, %r9d
movl %edx, 12(%rsp)
jmp .L30
.L75:
movl -72(%rsp), %eax
movl -4(%rsp), %r9d
movl (%rsp), %r11d
movl 4(%rsp), %r10d
movl 8(%rsp), %r8d
.L27:
addl $1, %r11d
addl %ebx, -112(%rsp)
addl %edx, %eax
cmpl %r11d, -96(%rsp)
je .L76
.L32:
movl -112(%rsp), %ecx
movl %eax, -116(%rsp)
cmpl $0, -92(%rsp)
jle .L27
movl $0, %esi
movl %eax, -72(%rsp)
movl %r9d, -4(%rsp)
movl %r11d, (%rsp)
movl %r10d, 4(%rsp)
movl %r8d, 8(%rsp)
jmp .L31
.L76:
movl -84(%rsp), %ecx
movl -80(%rsp), %edi
movl %edx, %r12d
movl -76(%rsp), %edx
.L34:
addl $1, %r9d
movl -92(%rsp), %eax
addl %eax, %ecx
cmpl %r9d, -88(%rsp)
je .L25
.L26:
movl -36(%rsp), %eax
addl %ecx, %eax
movl %ecx, -112(%rsp)
movl $0, %r11d
testl %r10d, %r10d
js .L34
movl %ecx, -84(%rsp)
movl %edi, -80(%rsp)
movl %edx, -76(%rsp)
movl %r12d, %edx
jmp .L32
.L25:
movl %edx, %eax
subl %r13d, %eax
js .L35
addl $1, %eax
movl %eax, -96(%rsp)
movl -40(%rsp), %r10d
movl -44(%rsp), %r11d
movl $0, %eax
movl %edx, %esi
movl %r10d, %edx
movl %eax, %r10d
movl %ebx, %r9d
movl %edi, %ebx
movl %esi, %eax
jmp .L41
.L48:
movl %eax, -112(%rsp)
.L39:
movl -116(%rsp), %edi
addl %r8d, %esi
movl $0, %eax
.L38:
addl %eax, %edi
addl %eax, %esi
leal 0(%rbp,%rsi), %edx
movslq %edx, %rdx
movslq %edi, %rbx
movss (%r15,%rdx,4), %xmm0
mulss (%r14,%rbx,4), %xmm0
addss (%r11), %xmm0
movss %xmm0, (%r11)
movl %eax, %ebx
addl $1, %eax
cmpl %eax, %r13d
jne .L38
movl -112(%rsp), %edi
leal 1(%rdi), %eax
addl %r9d, %r8d
addl %r13d, -116(%rsp)
cmpl %ebx, %edi
jne .L48
movl -4(%rsp), %ebx
movl (%rsp), %edi
.L37:
addl $1, %ecx
cmpl %ecx, -48(%rsp)
je .L77
.L40:
addl %ecx, %esi
addl %ecx, %edi
testl %r13d, %r13d
jle .L37
movl -108(%rsp), %eax
leal (%rax,%rdi), %r11d
movslq %r11d, %r11
movq -104(%rsp), %rax
leaq (%rax,%r11,4), %r11
movl $0, -116(%rsp)
movl $0, %r8d
movl $0, -112(%rsp)
movl %ebx, -4(%rsp)
movl %edi, (%rsp)
jmp .L39
.L77:
movl -84(%rsp), %edx
movl -80(%rsp), %r11d
movl %r10d, %eax
movl -76(%rsp), %r10d
movl -72(%rsp), %r8d
.L36:
addl $1, %r10d
addl %r9d, %r11d
addl %r12d, %edx
cmpl %r10d, -96(%rsp)
je .L78
.L41:
movl %r11d, %esi
movl %edx, %edi
cmpl $0, -52(%rsp)
js .L36
movl $0, %ecx
movl %edx, -84(%rsp)
movl %r11d, -80(%rsp)
movl %r10d, -76(%rsp)
movl %eax, %r10d
movl %r8d, -72(%rsp)
jmp .L40
.L78:
movl %ebx, %edi
movl %eax, %edx
movl %r9d, %ebx
.L35:
addl $1, %edi
movl -12(%rsp), %esi
addl %esi, -64(%rsp)
movl -8(%rsp), %esi
addl %esi, -60(%rsp)
cmpl %edi, 88(%rsp)
je .L4
.L42:
movl -60(%rsp), %eax
movl %eax, -108(%rsp)
movl -64(%rsp), %ebp
cmpl $0, -28(%rsp)
jle .L5
movl $0, %r11d
movl $0, %esi
movl $0, -80(%rsp)
movl %edx, %r9d
movl %ebx, %edx
movl %r8d, %ebx
jmp .L6
.L4:
movl $0, %eax
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3970:
.size _Z19compute_tiled_naivePfS_S_iiiiiiii, .-_Z19compute_tiled_naivePfS_S_iiiiiiii
.globl _Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii
.type _Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii, @function
_Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii:
.LFB3996:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
leaq 208(%rsp), %rax
movq %rax, 144(%rsp)
leaq 216(%rsp), %rax
movq %rax, 152(%rsp)
leaq 224(%rsp), %rax
movq %rax, 160(%rsp)
leaq 232(%rsp), %rax
movq %rax, 168(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L83
.L79:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L84
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L83:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 216
pushq 40(%rsp)
.cfi_def_cfa_offset 224
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17compute_gpu_naivePfS_iiiiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L79
.L84:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3996:
.size _Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii, .-_Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii
.globl _Z17compute_gpu_naivePfS_iiiiiiii
.type _Z17compute_gpu_naivePfS_iiiiiiii, @function
_Z17compute_gpu_naivePfS_iiiiiiii:
.LFB3997:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z47__device_stub__Z17compute_gpu_naivePfS_iiiiiiiiPfS_iiiiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3997:
.size _Z17compute_gpu_naivePfS_iiiiiiii, .-_Z17compute_gpu_naivePfS_iiiiiiii
.globl _Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii
.type _Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii, @function
_Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii:
.LFB3998:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
leaq 208(%rsp), %rax
movq %rax, 144(%rsp)
leaq 216(%rsp), %rax
movq %rax, 152(%rsp)
leaq 224(%rsp), %rax
movq %rax, 160(%rsp)
leaq 232(%rsp), %rax
movq %rax, 168(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L91
.L87:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L92
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L91:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 216
pushq 40(%rsp)
.cfi_def_cfa_offset 224
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17compute_gpu_tiledPfS_iiiiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L87
.L92:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3998:
.size _Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii, .-_Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii
.globl _Z17compute_gpu_tiledPfS_iiiiiiii
.type _Z17compute_gpu_tiledPfS_iiiiiiii, @function
_Z17compute_gpu_tiledPfS_iiiiiiii:
.LFB3999:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3999:
.size _Z17compute_gpu_tiledPfS_iiiiiiii, .-_Z17compute_gpu_tiledPfS_iiiiiiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "Input imgH: %d imgW: %d imgN: %d\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "Tile width: %d height: %d\n"
.section .rodata.str1.8
.align 8
.LC6:
.string "Block number: %d, block size: %d \n"
.section .rodata.str1.1
.LC7:
.string "time: %f \n"
.text
.globl main
.type main, @function
main:
.LFB3971:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $120, %rsp
.cfi_def_cfa_offset 160
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
movl $167772160, %edi
call _Znam@PLT
movq %rax, %r12
movq %rax, %rbx
leaq 167772160(%rax), %rbp
.L96:
call rand@PLT
movslq %eax, %rdx
imulq $1677843209, %rdx, %rdx
sarq $44, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $10485, %edx, %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC1(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L96
movl $36, %edi
call _Znam@PLT
movq %rax, %rbx
movq %rax, %rbp
leaq 36(%rax), %r13
.L97:
call rand@PLT
movslq %eax, %rdx
imulq $1677843209, %rdx, %rdx
sarq $44, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
imull $10485, %edx, %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
divss .LC1(%rip), %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %rbp, %r13
jne .L97
movl $16744464, %edi
call _Znam@PLT
movq %rax, %rbp
leaq 16744464(%rax), %rdx
.L98:
movl $0x00000000, (%rax)
addq $4, %rax
cmpq %rax, %rdx
jne .L98
leaq 24(%rsp), %rdi
movl $167772160, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $167772160, %edx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %r8d
movl $0, %ecx
movl $36, %edx
movq %rbx, %rsi
leaq _ZL6filter(%rip), %rdi
call cudaMemcpyToSymbol@PLT
leaq 32(%rsp), %rdi
movl $16744464, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $16744464, %edx
movq %rbp, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $10000, %ebx
movq $0x000000000, 8(%rsp)
jmp .L100
.L99:
leaq 80(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 80(%rsp), %rax
subq 64(%rsp), %rax
imulq $1000000, %rax, %rax
addq 88(%rsp), %rax
subq 72(%rsp), %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC3(%rip), %xmm0
addsd 8(%rsp), %xmm0
movsd %xmm0, 8(%rsp)
subl $1, %ebx
je .L107
.L100:
leaq 64(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movl $256, 52(%rsp)
movl $1, 56(%rsp)
movl $16384, 40(%rsp)
movl $1, 44(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L99
pushq $2046
.cfi_def_cfa_offset 168
pushq $2046
.cfi_def_cfa_offset 176
pushq $3
.cfi_def_cfa_offset 184
pushq $10
.cfi_def_cfa_offset 192
movl $2048, %r9d
movl $2048, %r8d
movl $32, %ecx
movl $8, %edx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z47__device_stub__Z17compute_gpu_tiledPfS_iiiiiiiiPfS_iiiiiiii
addq $32, %rsp
.cfi_def_cfa_offset 160
jmp .L99
.L107:
movl $2, %ecx
movl $16744464, %edx
movq 32(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
call cudaDeviceReset@PLT
movl $10, %r8d
movl $2048, %ecx
movl $2048, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $8, %ecx
movl $32, %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $256, %ecx
movl $16384, %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movsd 8(%rsp), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $4, %esi
movq %r12, %rdi
call _ZdlPvm@PLT
movl $4, %esi
movq %rbp, %rdi
call _ZdlPvm@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L108
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L108:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3971:
.size main, .-main
.globl _Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii
.type _Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii, @function
_Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii:
.LFB4000:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
leaq 208(%rsp), %rax
movq %rax, 144(%rsp)
leaq 216(%rsp), %rax
movq %rax, 152(%rsp)
leaq 224(%rsp), %rax
movq %rax, 160(%rsp)
leaq 232(%rsp), %rax
movq %rax, 168(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L113
.L109:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L114
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L113:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 216
pushq 40(%rsp)
.cfi_def_cfa_offset 224
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14compute_gpu_smPfS_iiiiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L109
.L114:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4000:
.size _Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii, .-_Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii
.globl _Z14compute_gpu_smPfS_iiiiiiii
.type _Z14compute_gpu_smPfS_iiiiiiii, @function
_Z14compute_gpu_smPfS_iiiiiiii:
.LFB4001:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z44__device_stub__Z14compute_gpu_smPfS_iiiiiiiiPfS_iiiiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4001:
.size _Z14compute_gpu_smPfS_iiiiiiii, .-_Z14compute_gpu_smPfS_iiiiiiii
.section .rodata.str1.8
.align 8
.LC8:
.string "_Z14compute_gpu_smPfS_iiiiiiii"
.align 8
.LC9:
.string "_Z17compute_gpu_tiledPfS_iiiiiiii"
.align 8
.LC10:
.string "_Z17compute_gpu_naivePfS_iiiiiiii"
.section .rodata.str1.1
.LC11:
.string "filter"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4003:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z14compute_gpu_smPfS_iiiiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z17compute_gpu_tiledPfS_iiiiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z17compute_gpu_naivePfS_iiiiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $36, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL6filter(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4003:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL6filter
.comm _ZL6filter,36,32
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 1176753152
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <complex.h>
#include <cuda_runtime.h>
#include <utility>
#include <sys/time.h>
#define K 3
#define BLCH 8
#define BLCW 32
__constant__ float filter[K*K];
int compute_tiled_naive(float *img, float *f, float * out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW) {
//compute tile num
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
for (int j = 0; j < bbh-1; j++){
for (int k = 0; k < bbw-1; k++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + k*bw;
int ind = convW * (j*bh + mi) + k*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
}
//compute right most tiles
for (int j = 0; j < bbh-1; j++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + (bbw-1)*bw;
int ind = convW * (j*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute bottom tiles
for (int j = 0; j < bbw-1; j++){
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (j-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (j-1)*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute the final tile
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
return 0;
}
__global__ void compute_gpu_naive(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int idX = blockDim.x * blockIdx.x + threadIdx.x;
int idY = blockDim.y * blockIdx.y + threadIdx.y;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
if (idX < convH && idY < convW){
int ind = idY * convW + idX + con;
int inm = idY * imgW + idX + imgg;
for (int fi = 0; fi < nF; fi++){
inm += fi * imgW;
int inf = fi*nF;
for (int fj = 0; fj < nF; fj++){
out[ind] += img[fj + inm] * filter[inf + fj];
}
}
}
}
}
__global__ void compute_gpu_tiled(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < (bh -nF + 1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
}
}
//remember the threads number to be larger than tile size
__global__ void compute_gpu_sm(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
__shared__ float sm[ (BLCH + K - 1) * (BLCW + K - 1) ];
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < (bh+nF-1) && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj ;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < (bh+nF-1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh -nF + 1) && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
}
}
int main(int argc, char **argv){
//create parameters
int imgH = 2048;
int imgW = 2048;
int imgN = 10;
int blcH = BLCH;
int blcW = BLCW;
int k = K;
int s = 1;
int nB = (imgH * imgW) / (blcH * blcW);
//int nT = (blcW+k) * (blcH+k);
int nT = blcW * blcH;
int imgDims = imgH * imgW * imgN;
int imgSize = imgDims * sizeof(float);
srand (time(NULL));
// create host array that can hold pixel intensity values
float *h_img = new float[imgDims];
for(int i=0; i<imgDims; i++){
h_img[i] = (float)(rand()%10485)/10485;
}
// create filter and copy to constant memory
int filterDims = k * k;
int filterSize = filterDims * sizeof(float);
float *f = new float[filterDims];
for(int i=0; i<filterDims; i++){
f[i] = (float)(rand()%10485)/10485;
}
// create host and device array that holds the convoluted matrix
int convH = ( (imgH - k) / s ) + 1;
int convW = ( (imgW - k) / s ) + 1;
int convDims = convH * convW;
int convSize = convDims * sizeof(float);
float *h_convolved = new float[convDims];
for(int i=0; i<convDims; i++){
h_convolved[i] = 0.0;
}
// create device array that can hold pixel intensity values in GPU GM
float *d_img;
float *d_convolved;
cudaMalloc((void **) &d_img, imgSize);
cudaMemcpy(d_img, h_img, imgSize, cudaMemcpyHostToDevice);
cudaMemcpyToSymbol(filter, f, filterSize);
cudaMalloc((void **) &d_convolved, convSize);
cudaMemcpy(d_convolved, h_convolved, convSize, cudaMemcpyHostToDevice);
struct timeval starttime, endtime;
double elapsed = 0.0;
for (int i = 0; i<10000; i++){
gettimeofday(&starttime,NULL);
// call the kernel
compute_gpu_tiled<<<nB, nT>>>(d_img, d_convolved, blcH, blcW, imgH, imgW, imgN, k, convH, convW);
gettimeofday(&endtime,NULL);
elapsed += ((endtime.tv_sec-starttime.tv_sec)*1000000 + endtime.tv_usec-starttime.tv_usec)/1000000.0;
}
cudaMemcpy(h_convolved, d_convolved, convSize, cudaMemcpyDeviceToHost);
cudaDeviceReset();
printf("Input imgH: %d imgW: %d imgN: %d\n", imgH, imgW, imgN);
printf("Tile width: %d height: %d\n", blcW, blcH);
printf("Block number: %d, block size: %d \n", nB, nT);
printf("time: %f \n", elapsed);
delete h_img;
delete h_convolved;
return 0;
} | #include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <complex.h>
#include <hip/hip_runtime.h>
#include <utility>
#include <sys/time.h>
#define K 3
#define BLCH 8
#define BLCW 32
__constant__ float filter[K*K];
int compute_tiled_naive(float *img, float *f, float * out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW) {
//compute tile num
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
for (int j = 0; j < bbh-1; j++){
for (int k = 0; k < bbw-1; k++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + k*bw;
int ind = convW * (j*bh + mi) + k*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
}
//compute right most tiles
for (int j = 0; j < bbh-1; j++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + (bbw-1)*bw;
int ind = convW * (j*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute bottom tiles
for (int j = 0; j < bbw-1; j++){
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (j-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (j-1)*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute the final tile
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
return 0;
}
__global__ void compute_gpu_naive(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int idX = blockDim.x * blockIdx.x + threadIdx.x;
int idY = blockDim.y * blockIdx.y + threadIdx.y;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
if (idX < convH && idY < convW){
int ind = idY * convW + idX + con;
int inm = idY * imgW + idX + imgg;
for (int fi = 0; fi < nF; fi++){
inm += fi * imgW;
int inf = fi*nF;
for (int fj = 0; fj < nF; fj++){
out[ind] += img[fj + inm] * filter[inf + fj];
}
}
}
}
}
__global__ void compute_gpu_tiled(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < (bh -nF + 1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
}
}
//remember the threads number to be larger than tile size
__global__ void compute_gpu_sm(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
__shared__ float sm[ (BLCH + K - 1) * (BLCW + K - 1) ];
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < (bh+nF-1) && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj ;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < (bh+nF-1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh -nF + 1) && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
}
}
int main(int argc, char **argv){
//create parameters
int imgH = 2048;
int imgW = 2048;
int imgN = 10;
int blcH = BLCH;
int blcW = BLCW;
int k = K;
int s = 1;
int nB = (imgH * imgW) / (blcH * blcW);
//int nT = (blcW+k) * (blcH+k);
int nT = blcW * blcH;
int imgDims = imgH * imgW * imgN;
int imgSize = imgDims * sizeof(float);
srand (time(NULL));
// create host array that can hold pixel intensity values
float *h_img = new float[imgDims];
for(int i=0; i<imgDims; i++){
h_img[i] = (float)(rand()%10485)/10485;
}
// create filter and copy to constant memory
int filterDims = k * k;
int filterSize = filterDims * sizeof(float);
float *f = new float[filterDims];
for(int i=0; i<filterDims; i++){
f[i] = (float)(rand()%10485)/10485;
}
// create host and device array that holds the convoluted matrix
int convH = ( (imgH - k) / s ) + 1;
int convW = ( (imgW - k) / s ) + 1;
int convDims = convH * convW;
int convSize = convDims * sizeof(float);
float *h_convolved = new float[convDims];
for(int i=0; i<convDims; i++){
h_convolved[i] = 0.0;
}
// create device array that can hold pixel intensity values in GPU GM
float *d_img;
float *d_convolved;
hipMalloc((void **) &d_img, imgSize);
hipMemcpy(d_img, h_img, imgSize, hipMemcpyHostToDevice);
hipMemcpyToSymbol(HIP_SYMBOL(filter), f, filterSize);
hipMalloc((void **) &d_convolved, convSize);
hipMemcpy(d_convolved, h_convolved, convSize, hipMemcpyHostToDevice);
struct timeval starttime, endtime;
double elapsed = 0.0;
for (int i = 0; i<10000; i++){
gettimeofday(&starttime,NULL);
// call the kernel
compute_gpu_tiled<<<nB, nT>>>(d_img, d_convolved, blcH, blcW, imgH, imgW, imgN, k, convH, convW);
gettimeofday(&endtime,NULL);
elapsed += ((endtime.tv_sec-starttime.tv_sec)*1000000 + endtime.tv_usec-starttime.tv_usec)/1000000.0;
}
hipMemcpy(h_convolved, d_convolved, convSize, hipMemcpyDeviceToHost);
hipDeviceReset();
printf("Input imgH: %d imgW: %d imgN: %d\n", imgH, imgW, imgN);
printf("Tile width: %d height: %d\n", blcW, blcH);
printf("Block number: %d, block size: %d \n", nB, nT);
printf("time: %f \n", elapsed);
delete h_img;
delete h_convolved;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <math.h>
#include <complex.h>
#include <hip/hip_runtime.h>
#include <utility>
#include <sys/time.h>
#define K 3
#define BLCH 8
#define BLCW 32
__constant__ float filter[K*K];
int compute_tiled_naive(float *img, float *f, float * out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW) {
//compute tile num
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
for (int j = 0; j < bbh-1; j++){
for (int k = 0; k < bbw-1; k++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + k*bw;
int ind = convW * (j*bh + mi) + k*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
}
//compute right most tiles
for (int j = 0; j < bbh-1; j++){
for (int mi = 0; mi < bh; mi++){
int inm = imgW * (j*bh + mi) + (bbw-1)*bw;
int ind = convW * (j*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute bottom tiles
for (int j = 0; j < bbw-1; j++){
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (j-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (j-1)*bw;
for (int mj = 0; mj < bw; mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
//compute the final tile
for (int mi = 0; mi < (bh -nF + 1); mi++){
int inm = imgW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
int ind = convW * ((bbh-1)*bh + mi) + (bbw-1)*bw;
for (int mj = 0; mj < (bw - nF + 1); mj++){
inm += mj;
ind += mj;
for (int fi = 0; fi < nF; fi++){
int inf = fi * nF;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * f[inf];
}
}
}
}
}
return 0;
}
__global__ void compute_gpu_naive(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int idX = blockDim.x * blockIdx.x + threadIdx.x;
int idY = blockDim.y * blockIdx.y + threadIdx.y;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
if (idX < convH && idY < convW){
int ind = idY * convW + idX + con;
int inm = idY * imgW + idX + imgg;
for (int fi = 0; fi < nF; fi++){
inm += fi * imgW;
int inf = fi*nF;
for (int fj = 0; fj < nF; fj++){
out[ind] += img[fj + inm] * filter[inf + fj];
}
}
}
}
}
__global__ void compute_gpu_tiled(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < (bh -nF + 1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
inm += fi * imgW;
for (int fj = 0; fj < nF; fj++){
inf += fj;
inm += fj;
out[ind + con] += img[inm + imgg] * filter[inf];
}
}
}
__syncthreads();
}
}
}
//remember the threads number to be larger than tile size
__global__ void compute_gpu_sm(float *img, float *out, int bh, int bw, int imgH, int imgW, int imgN, int nF, int convH, int convW){
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
int nT = blockDim.x;
int nB = gridDim.x;
int bbw = imgW / bw;
int bbh = imgH / bh;
__shared__ float sm[ (BLCH + K - 1) * (BLCW + K - 1) ];
for (int i = 0; i < imgN; i++){
int con = i * convW * convH;
int imgg = i * imgW * imgH;
//compute center tiles
if(bx < (bbh-1) && by < (bbw-1)){
if(tx < (bh+nF-1) && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj ;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute right most tiles
if(bx < (bbh-1) && by == (bbw-1)){
if(tx < (bh+nF-1) && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < bh && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the bottom tiles
if(bx == (bbh-1) && by < (bbw-1)){
if(tx < bh && ty < (bw+nF-1)){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh -nF + 1) && ty < bw){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
//compute the final tile
if(bx == (bbh-1) && by == (bbw-1)){
if(tx < bh && ty < bw){
int inm = imgW * (bx*bh + tx) + by*bw + ty;
//set shared memory
sm[tx*bw+ty] = img[inm];
}
__syncthreads();
if(tx < (bh - nF + 1) && ty < (bw - nF + 1)){
int ind = convW * (bx*bh + ty) + by*bw + ty;
for (int fi = 0; fi < nF; fi++){
int inf = fi * convW;
int ins = (tx + fi)*bw + ty;
for (int fj = 0; fj < nF; fj++){
inf += fj;
ins += fj;
out[ind + con] += sm[ins] * filter[inf];
}
}
}
__syncthreads();
}
}
}
int main(int argc, char **argv){
//create parameters
int imgH = 2048;
int imgW = 2048;
int imgN = 10;
int blcH = BLCH;
int blcW = BLCW;
int k = K;
int s = 1;
int nB = (imgH * imgW) / (blcH * blcW);
//int nT = (blcW+k) * (blcH+k);
int nT = blcW * blcH;
int imgDims = imgH * imgW * imgN;
int imgSize = imgDims * sizeof(float);
srand (time(NULL));
// create host array that can hold pixel intensity values
float *h_img = new float[imgDims];
for(int i=0; i<imgDims; i++){
h_img[i] = (float)(rand()%10485)/10485;
}
// create filter and copy to constant memory
int filterDims = k * k;
int filterSize = filterDims * sizeof(float);
float *f = new float[filterDims];
for(int i=0; i<filterDims; i++){
f[i] = (float)(rand()%10485)/10485;
}
// create host and device array that holds the convoluted matrix
int convH = ( (imgH - k) / s ) + 1;
int convW = ( (imgW - k) / s ) + 1;
int convDims = convH * convW;
int convSize = convDims * sizeof(float);
float *h_convolved = new float[convDims];
for(int i=0; i<convDims; i++){
h_convolved[i] = 0.0;
}
// create device array that can hold pixel intensity values in GPU GM
float *d_img;
float *d_convolved;
hipMalloc((void **) &d_img, imgSize);
hipMemcpy(d_img, h_img, imgSize, hipMemcpyHostToDevice);
hipMemcpyToSymbol(HIP_SYMBOL(filter), f, filterSize);
hipMalloc((void **) &d_convolved, convSize);
hipMemcpy(d_convolved, h_convolved, convSize, hipMemcpyHostToDevice);
struct timeval starttime, endtime;
double elapsed = 0.0;
for (int i = 0; i<10000; i++){
gettimeofday(&starttime,NULL);
// call the kernel
compute_gpu_tiled<<<nB, nT>>>(d_img, d_convolved, blcH, blcW, imgH, imgW, imgN, k, convH, convW);
gettimeofday(&endtime,NULL);
elapsed += ((endtime.tv_sec-starttime.tv_sec)*1000000 + endtime.tv_usec-starttime.tv_usec)/1000000.0;
}
hipMemcpy(h_convolved, d_convolved, convSize, hipMemcpyDeviceToHost);
hipDeviceReset();
printf("Input imgH: %d imgW: %d imgN: %d\n", imgH, imgW, imgN);
printf("Tile width: %d height: %d\n", blcW, blcH);
printf("Block number: %d, block size: %d \n", nB, nT);
printf("time: %f \n", elapsed);
delete h_img;
delete h_convolved;
return 0;
} | .text
.file "con_den_shape1.hip"
.globl _Z19compute_tiled_naivePfS_S_iiiiiiii # -- Begin function _Z19compute_tiled_naivePfS_S_iiiiiiii
.p2align 4, 0x90
.type _Z19compute_tiled_naivePfS_S_iiiiiiii,@function
_Z19compute_tiled_naivePfS_S_iiiiiiii: # @_Z19compute_tiled_naivePfS_S_iiiiiiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r8d, -108(%rsp) # 4-byte Spill
movl %ecx, -124(%rsp) # 4-byte Spill
cmpl $0, 64(%rsp)
jle .LBB0_59
# %bb.1: # %.lr.ph363
movq %rdx, %r10
movl 80(%rsp), %ebx
movl 72(%rsp), %r12d
movl 56(%rsp), %r11d
movl %r9d, %eax
cltd
movl -124(%rsp), %r8d # 4-byte Reload
idivl %r8d
movl %eax, %r14d
movl %r11d, %eax
cltd
movl -108(%rsp), %ecx # 4-byte Reload
idivl %ecx
movl %eax, %edx
imull 88(%rsp), %ebx
movl %ebx, -56(%rsp) # 4-byte Spill
imull %r11d, %r9d
movl %r9d, -52(%rsp) # 4-byte Spill
movq %r14, %rax
movq %r14, -48(%rsp) # 8-byte Spill
leal -1(%r14), %r9d
movq %rdx, %rax
movq %rdx, -40(%rsp) # 8-byte Spill
leal -1(%rdx), %eax
movl %eax, -68(%rsp) # 4-byte Spill
imull %ecx, %eax
movl %eax, -76(%rsp) # 4-byte Spill
movl %r9d, -80(%rsp) # 4-byte Spill
movl %r9d, %eax
imull %r8d, %eax
movq %rax, -32(%rsp) # 8-byte Spill
movl %ecx, %eax
subl %r12d, %eax
incl %eax
movq %rax, -24(%rsp) # 8-byte Spill
subl %r12d, %r8d
incl %r8d
movl %r8d, -72(%rsp) # 4-byte Spill
movl %ecx, %eax
movq %rax, -16(%rsp) # 8-byte Spill
movl %r12d, %eax
xorl %edx, %edx
jmp .LBB0_2
.p2align 4, 0x90
.LBB0_58: # %._crit_edge360
# in Loop: Header=BB0_2 Depth=1
movq -8(%rsp), %rdx # 8-byte Reload
incl %edx
cmpl 64(%rsp), %edx
je .LBB0_59
.LBB0_2: # =>This Loop Header: Depth=1
# Child Loop BB0_4 Depth 2
# Child Loop BB0_6 Depth 3
# Child Loop BB0_8 Depth 4
# Child Loop BB0_10 Depth 5
# Child Loop BB0_12 Depth 6
# Child Loop BB0_13 Depth 7
# Child Loop BB0_21 Depth 2
# Child Loop BB0_23 Depth 3
# Child Loop BB0_25 Depth 4
# Child Loop BB0_27 Depth 5
# Child Loop BB0_28 Depth 6
# Child Loop BB0_35 Depth 2
# Child Loop BB0_37 Depth 3
# Child Loop BB0_39 Depth 4
# Child Loop BB0_41 Depth 5
# Child Loop BB0_42 Depth 6
# Child Loop BB0_49 Depth 2
# Child Loop BB0_51 Depth 3
# Child Loop BB0_53 Depth 4
# Child Loop BB0_54 Depth 5
movl -56(%rsp), %ecx # 4-byte Reload
# kill: def $ecx killed $ecx def $rcx
imull %edx, %ecx
movq %rcx, -64(%rsp) # 8-byte Spill
movl -52(%rsp), %ecx # 4-byte Reload
movl %ecx, %ebp
movq %rdx, -8(%rsp) # 8-byte Spill
imull %edx, %ebp
cmpl $2, -48(%rsp) # 4-byte Folded Reload
jl .LBB0_19
# %bb.3: # %.preheader258.preheader
# in Loop: Header=BB0_2 Depth=1
movl $0, -96(%rsp) # 4-byte Folded Spill
jmp .LBB0_4
.p2align 4, 0x90
.LBB0_18: # %._crit_edge282
# in Loop: Header=BB0_4 Depth=2
movl -96(%rsp), %ecx # 4-byte Reload
incl %ecx
movl %ecx, -96(%rsp) # 4-byte Spill
cmpl -80(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_19
.LBB0_4: # %.preheader258
# Parent Loop BB0_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_6 Depth 3
# Child Loop BB0_8 Depth 4
# Child Loop BB0_10 Depth 5
# Child Loop BB0_12 Depth 6
# Child Loop BB0_13 Depth 7
cmpl $2, -40(%rsp) # 4-byte Folded Reload
jl .LBB0_18
# %bb.5: # %.preheader.lr.ph
# in Loop: Header=BB0_4 Depth=2
movl -96(%rsp), %ecx # 4-byte Reload
# kill: def $ecx killed $ecx def $rcx
imull -124(%rsp), %ecx # 4-byte Folded Reload
movq %rcx, -104(%rsp) # 8-byte Spill
movl $0, -92(%rsp) # 4-byte Folded Spill
jmp .LBB0_6
.p2align 4, 0x90
.LBB0_17: # %._crit_edge280
# in Loop: Header=BB0_6 Depth=3
movl -92(%rsp), %ecx # 4-byte Reload
incl %ecx
movl %ecx, -92(%rsp) # 4-byte Spill
cmpl -68(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_18
.LBB0_6: # %.preheader
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_4 Depth=2
# => This Loop Header: Depth=3
# Child Loop BB0_8 Depth 4
# Child Loop BB0_10 Depth 5
# Child Loop BB0_12 Depth 6
# Child Loop BB0_13 Depth 7
cmpl $0, -124(%rsp) # 4-byte Folded Reload
jle .LBB0_17
# %bb.7: # %.lr.ph279
# in Loop: Header=BB0_6 Depth=3
movl -92(%rsp), %ecx # 4-byte Reload
imull -108(%rsp), %ecx # 4-byte Folded Reload
movl %ecx, -88(%rsp) # 4-byte Spill
xorl %ecx, %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
jmp .LBB0_8
.p2align 4, 0x90
.LBB0_16: # %._crit_edge277
# in Loop: Header=BB0_8 Depth=4
movq -120(%rsp), %rcx # 8-byte Reload
incl %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
cmpl -124(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_17
.LBB0_8: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_4 Depth=2
# Parent Loop BB0_6 Depth=3
# => This Loop Header: Depth=4
# Child Loop BB0_10 Depth 5
# Child Loop BB0_12 Depth 6
# Child Loop BB0_13 Depth 7
cmpl $0, -108(%rsp) # 4-byte Folded Reload
jle .LBB0_16
# %bb.9: # %.lr.ph276.preheader
# in Loop: Header=BB0_8 Depth=4
movq -104(%rsp), %rcx # 8-byte Reload
movq -120(%rsp), %rdx # 8-byte Reload
addl %edx, %ecx
movl %ecx, %r8d
imull 88(%rsp), %r8d
movl -88(%rsp), %edx # 4-byte Reload
addl %edx, %r8d
imull %r11d, %ecx
addl %edx, %ecx
xorl %r13d, %r13d
jmp .LBB0_10
.p2align 4, 0x90
.LBB0_15: # %._crit_edge270
# in Loop: Header=BB0_10 Depth=5
incq %r13
cmpq -16(%rsp), %r13 # 8-byte Folded Reload
je .LBB0_16
.LBB0_10: # %.lr.ph276
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_4 Depth=2
# Parent Loop BB0_6 Depth=3
# Parent Loop BB0_8 Depth=4
# => This Loop Header: Depth=5
# Child Loop BB0_12 Depth 6
# Child Loop BB0_13 Depth 7
addl %r13d, %ecx
addl %r13d, %r8d
testl %r12d, %r12d
jle .LBB0_15
# %bb.11: # %.lr.ph269
# in Loop: Header=BB0_10 Depth=5
movq -64(%rsp), %rdx # 8-byte Reload
addl %r8d, %edx
movslq %edx, %r9
movss (%r10,%r9,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB0_12: # %.lr.ph
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_4 Depth=2
# Parent Loop BB0_6 Depth=3
# Parent Loop BB0_8 Depth=4
# Parent Loop BB0_10 Depth=5
# => This Loop Header: Depth=6
# Child Loop BB0_13 Depth 7
movl %r14d, %r15d
imull 88(%rsp), %r15d
movl %r14d, %edx
imull %r11d, %edx
addl %ecx, %edx
xorl %ebx, %ebx
movl %edx, %ecx
.p2align 4, 0x90
.LBB0_13: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_4 Depth=2
# Parent Loop BB0_6 Depth=3
# Parent Loop BB0_8 Depth=4
# Parent Loop BB0_10 Depth=5
# Parent Loop BB0_12 Depth=6
# => This Inner Loop Header: Depth=7
addl %ebx, %r15d
addl %ebx, %ecx
leal (%rcx,%rbp), %edx
movslq %edx, %rdx
movss (%rdi,%rdx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
movslq %r15d, %rdx
mulss (%rsi,%rdx,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%r10,%r9,4)
incq %rbx
cmpq %rbx, %rax
jne .LBB0_13
# %bb.14: # %._crit_edge
# in Loop: Header=BB0_12 Depth=6
incl %r14d
cmpl %r12d, %r14d
jne .LBB0_12
jmp .LBB0_15
.p2align 4, 0x90
.LBB0_19: # %.preheader261
# in Loop: Header=BB0_2 Depth=1
cmpl $2, -48(%rsp) # 4-byte Folded Reload
jl .LBB0_33
# %bb.20: # %.preheader257.preheader
# in Loop: Header=BB0_2 Depth=1
movl $0, -104(%rsp) # 4-byte Folded Spill
jmp .LBB0_21
.p2align 4, 0x90
.LBB0_32: # %._crit_edge308
# in Loop: Header=BB0_21 Depth=2
movl -104(%rsp), %ecx # 4-byte Reload
incl %ecx
movl %ecx, -104(%rsp) # 4-byte Spill
cmpl -80(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_33
.LBB0_21: # %.preheader257
# Parent Loop BB0_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_23 Depth 3
# Child Loop BB0_25 Depth 4
# Child Loop BB0_27 Depth 5
# Child Loop BB0_28 Depth 6
cmpl $0, -124(%rsp) # 4-byte Folded Reload
jle .LBB0_32
# %bb.22: # %.lr.ph307
# in Loop: Header=BB0_21 Depth=2
movl -104(%rsp), %ecx # 4-byte Reload
# kill: def $ecx killed $ecx def $rcx
imull -124(%rsp), %ecx # 4-byte Folded Reload
movq %rcx, -88(%rsp) # 8-byte Spill
xorl %ecx, %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
jmp .LBB0_23
.p2align 4, 0x90
.LBB0_31: # %._crit_edge305
# in Loop: Header=BB0_23 Depth=3
movq -120(%rsp), %rcx # 8-byte Reload
incl %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
cmpl -124(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_32
.LBB0_23: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_21 Depth=2
# => This Loop Header: Depth=3
# Child Loop BB0_25 Depth 4
# Child Loop BB0_27 Depth 5
# Child Loop BB0_28 Depth 6
cmpl %r12d, -108(%rsp) # 4-byte Folded Reload
jl .LBB0_31
# %bb.24: # %.lr.ph304.preheader
# in Loop: Header=BB0_23 Depth=3
movq -88(%rsp), %rcx # 8-byte Reload
movq -120(%rsp), %rdx # 8-byte Reload
leal (%rdx,%rcx), %r13d
movl %r13d, %r8d
imull 88(%rsp), %r8d
movl -76(%rsp), %ecx # 4-byte Reload
addl %ecx, %r8d
imull %r11d, %r13d
addl %ecx, %r13d
xorl %r9d, %r9d
jmp .LBB0_25
.p2align 4, 0x90
.LBB0_30: # %._crit_edge297
# in Loop: Header=BB0_25 Depth=4
incq %r9
cmpq -24(%rsp), %r9 # 8-byte Folded Reload
je .LBB0_31
.LBB0_25: # %.lr.ph304
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_21 Depth=2
# Parent Loop BB0_23 Depth=3
# => This Loop Header: Depth=4
# Child Loop BB0_27 Depth 5
# Child Loop BB0_28 Depth 6
addl %r9d, %r13d
addl %r9d, %r8d
testl %r12d, %r12d
jle .LBB0_30
# %bb.26: # %.lr.ph296
# in Loop: Header=BB0_25 Depth=4
movq -64(%rsp), %rcx # 8-byte Reload
addl %r8d, %ecx
movslq %ecx, %rbx
movss (%r10,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_27: # %.lr.ph289
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_21 Depth=2
# Parent Loop BB0_23 Depth=3
# Parent Loop BB0_25 Depth=4
# => This Loop Header: Depth=5
# Child Loop BB0_28 Depth 6
movl %r15d, %ecx
imull %r12d, %ecx
movl %r15d, %r14d
imull %r11d, %r14d
addl %r13d, %r14d
xorl %edx, %edx
movl %r14d, %r13d
.p2align 4, 0x90
.LBB0_28: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_21 Depth=2
# Parent Loop BB0_23 Depth=3
# Parent Loop BB0_25 Depth=4
# Parent Loop BB0_27 Depth=5
# => This Inner Loop Header: Depth=6
addl %edx, %ecx
addl %edx, %r13d
leal (%r13,%rbp), %r14d
movslq %r14d, %r14
movss (%rdi,%r14,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rsi,%rcx,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%r10,%rbx,4)
incq %rdx
cmpq %rdx, %rax
jne .LBB0_28
# %bb.29: # %._crit_edge290
# in Loop: Header=BB0_27 Depth=5
incl %r15d
cmpl %r12d, %r15d
jne .LBB0_27
jmp .LBB0_30
.p2align 4, 0x90
.LBB0_33: # %.preheader260
# in Loop: Header=BB0_2 Depth=1
cmpl $2, -40(%rsp) # 4-byte Folded Reload
jl .LBB0_47
# %bb.34: # %.preheader256.preheader
# in Loop: Header=BB0_2 Depth=1
xorl %ecx, %ecx
movq %rcx, -104(%rsp) # 8-byte Spill
jmp .LBB0_35
.p2align 4, 0x90
.LBB0_46: # %._crit_edge333
# in Loop: Header=BB0_35 Depth=2
movq -104(%rsp), %rcx # 8-byte Reload
incl %ecx
movq %rcx, -104(%rsp) # 8-byte Spill
cmpl -68(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_47
.LBB0_35: # %.preheader256
# Parent Loop BB0_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_37 Depth 3
# Child Loop BB0_39 Depth 4
# Child Loop BB0_41 Depth 5
# Child Loop BB0_42 Depth 6
cmpl %r12d, -124(%rsp) # 4-byte Folded Reload
jl .LBB0_46
# %bb.36: # %.lr.ph332
# in Loop: Header=BB0_35 Depth=2
movq -104(%rsp), %rcx # 8-byte Reload
decl %ecx
imull -108(%rsp), %ecx # 4-byte Folded Reload
movl %ecx, -88(%rsp) # 4-byte Spill
xorl %ecx, %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
jmp .LBB0_37
.p2align 4, 0x90
.LBB0_45: # %._crit_edge329
# in Loop: Header=BB0_37 Depth=3
movq -120(%rsp), %rcx # 8-byte Reload
incl %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
cmpl -72(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_46
.LBB0_37: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_35 Depth=2
# => This Loop Header: Depth=3
# Child Loop BB0_39 Depth 4
# Child Loop BB0_41 Depth 5
# Child Loop BB0_42 Depth 6
cmpl $0, -108(%rsp) # 4-byte Folded Reload
jle .LBB0_45
# %bb.38: # %.lr.ph328.preheader
# in Loop: Header=BB0_37 Depth=3
movq -32(%rsp), %rcx # 8-byte Reload
movq -120(%rsp), %rdx # 8-byte Reload
leal (%rdx,%rcx), %ebx
movl %ebx, %r8d
imull 88(%rsp), %r8d
movl -88(%rsp), %ecx # 4-byte Reload
addl %ecx, %r8d
imull %r11d, %ebx
addl %ecx, %ebx
xorl %r9d, %r9d
jmp .LBB0_39
.p2align 4, 0x90
.LBB0_44: # %._crit_edge322
# in Loop: Header=BB0_39 Depth=4
incq %r9
cmpq -16(%rsp), %r9 # 8-byte Folded Reload
je .LBB0_45
.LBB0_39: # %.lr.ph328
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_35 Depth=2
# Parent Loop BB0_37 Depth=3
# => This Loop Header: Depth=4
# Child Loop BB0_41 Depth 5
# Child Loop BB0_42 Depth 6
addl %r9d, %ebx
addl %r9d, %r8d
testl %r12d, %r12d
jle .LBB0_44
# %bb.40: # %.lr.ph321
# in Loop: Header=BB0_39 Depth=4
movq -64(%rsp), %rcx # 8-byte Reload
addl %r8d, %ecx
movslq %ecx, %r13
movss (%r10,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_41: # %.lr.ph314
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_35 Depth=2
# Parent Loop BB0_37 Depth=3
# Parent Loop BB0_39 Depth=4
# => This Loop Header: Depth=5
# Child Loop BB0_42 Depth 6
movl %r15d, %ecx
imull %r12d, %ecx
movl %r15d, %r14d
imull %r11d, %r14d
addl %ebx, %r14d
xorl %edx, %edx
movl %r14d, %ebx
.p2align 4, 0x90
.LBB0_42: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_35 Depth=2
# Parent Loop BB0_37 Depth=3
# Parent Loop BB0_39 Depth=4
# Parent Loop BB0_41 Depth=5
# => This Inner Loop Header: Depth=6
addl %edx, %ecx
addl %edx, %ebx
leal (%rbx,%rbp), %r14d
movslq %r14d, %r14
movss (%rdi,%r14,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rsi,%rcx,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%r10,%r13,4)
incq %rdx
cmpq %rdx, %rax
jne .LBB0_42
# %bb.43: # %._crit_edge315
# in Loop: Header=BB0_41 Depth=5
incl %r15d
cmpl %r12d, %r15d
jne .LBB0_41
jmp .LBB0_44
.p2align 4, 0x90
.LBB0_47: # %.preheader259
# in Loop: Header=BB0_2 Depth=1
cmpl %r12d, -124(%rsp) # 4-byte Folded Reload
jl .LBB0_58
# %bb.48: # %.lr.ph359.preheader
# in Loop: Header=BB0_2 Depth=1
xorl %ecx, %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
jmp .LBB0_49
.p2align 4, 0x90
.LBB0_57: # %._crit_edge356
# in Loop: Header=BB0_49 Depth=2
movq -120(%rsp), %rcx # 8-byte Reload
incl %ecx
movq %rcx, -120(%rsp) # 8-byte Spill
cmpl -72(%rsp), %ecx # 4-byte Folded Reload
je .LBB0_58
.LBB0_49: # %.lr.ph359
# Parent Loop BB0_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_51 Depth 3
# Child Loop BB0_53 Depth 4
# Child Loop BB0_54 Depth 5
cmpl %r12d, -108(%rsp) # 4-byte Folded Reload
jl .LBB0_57
# %bb.50: # %.lr.ph355.preheader
# in Loop: Header=BB0_49 Depth=2
movq -32(%rsp), %rcx # 8-byte Reload
movq -120(%rsp), %rdx # 8-byte Reload
leal (%rdx,%rcx), %r8d
movl %r8d, %ecx
imull 88(%rsp), %ecx
movl -76(%rsp), %edx # 4-byte Reload
addl %edx, %ecx
imull %r11d, %r8d
addl %edx, %r8d
xorl %ebx, %ebx
jmp .LBB0_51
.p2align 4, 0x90
.LBB0_56: # %._crit_edge348
# in Loop: Header=BB0_51 Depth=3
incq %rbx
cmpq -24(%rsp), %rbx # 8-byte Folded Reload
je .LBB0_57
.LBB0_51: # %.lr.ph355
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_49 Depth=2
# => This Loop Header: Depth=3
# Child Loop BB0_53 Depth 4
# Child Loop BB0_54 Depth 5
addl %ebx, %r8d
addl %ebx, %ecx
testl %r12d, %r12d
jle .LBB0_56
# %bb.52: # %.lr.ph347
# in Loop: Header=BB0_51 Depth=3
movq -64(%rsp), %rdx # 8-byte Reload
addl %ecx, %edx
movslq %edx, %r13
movss (%r10,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB0_53: # %.lr.ph340
# Parent Loop BB0_2 Depth=1
# Parent Loop BB0_49 Depth=2
# Parent Loop BB0_51 Depth=3
# => This Loop Header: Depth=4
# Child Loop BB0_54 Depth 5
movl %r9d, %r15d
imull %r12d, %r15d
movl %r9d, %r14d
imull %r11d, %r14d
addl %r8d, %r14d
xorl %edx, %edx
movl %r14d, %r8d
.p2align 4, 0x90
.LBB0_54: # Parent Loop BB0_2 Depth=1
# Parent Loop BB0_49 Depth=2
# Parent Loop BB0_51 Depth=3
# Parent Loop BB0_53 Depth=4
# => This Inner Loop Header: Depth=5
addl %edx, %r15d
addl %edx, %r8d
leal (%r8,%rbp), %r14d
movslq %r14d, %r14
movss (%rdi,%r14,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rsi,%r15,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%r10,%r13,4)
incq %rdx
cmpq %rdx, %rax
jne .LBB0_54
# %bb.55: # %._crit_edge341
# in Loop: Header=BB0_53 Depth=4
incl %r9d
cmpl %r12d, %r9d
jne .LBB0_53
jmp .LBB0_56
.LBB0_59: # %._crit_edge364
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z19compute_tiled_naivePfS_S_iiiiiiii, .Lfunc_end0-_Z19compute_tiled_naivePfS_S_iiiiiiii
.cfi_endproc
# -- End function
.globl _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii # -- Begin function _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii
.p2align 4, 0x90
.type _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii,@function
_Z32__device_stub__compute_gpu_naivePfS_iiiiiiii: # @_Z32__device_stub__compute_gpu_naivePfS_iiiiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 176(%rsp), %rax
movq %rax, 128(%rsp)
leaq 184(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17compute_gpu_naivePfS_iiiiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end1:
.size _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii, .Lfunc_end1-_Z32__device_stub__compute_gpu_naivePfS_iiiiiiii
.cfi_endproc
# -- End function
.globl _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii # -- Begin function _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii
.p2align 4, 0x90
.type _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii,@function
_Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii: # @_Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 176(%rsp), %rax
movq %rax, 128(%rsp)
leaq 184(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17compute_gpu_tiledPfS_iiiiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end2:
.size _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii, .Lfunc_end2-_Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii
.cfi_endproc
# -- End function
.globl _Z29__device_stub__compute_gpu_smPfS_iiiiiiii # -- Begin function _Z29__device_stub__compute_gpu_smPfS_iiiiiiii
.p2align 4, 0x90
.type _Z29__device_stub__compute_gpu_smPfS_iiiiiiii,@function
_Z29__device_stub__compute_gpu_smPfS_iiiiiiii: # @_Z29__device_stub__compute_gpu_smPfS_iiiiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 176(%rsp), %rax
movq %rax, 128(%rsp)
leaq 184(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14compute_gpu_smPfS_iiiiiiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end3:
.size _Z29__device_stub__compute_gpu_smPfS_iiiiiiii, .Lfunc_end3-_Z29__device_stub__compute_gpu_smPfS_iiiiiiii
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI4_0:
.long 0x4623d400 # float 10485
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI4_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $248, %rsp
.cfi_def_cfa_offset 304
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
xorl %r14d, %r14d
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
movl $167772160, %edi # imm = 0xA000000
callq _Znam
movq %rax, %rbx
.p2align 4, 0x90
.LBB4_1: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1677843209, %rax, %rcx # imm = 0x6401DB09
movq %rcx, %rdx
shrq $63, %rdx
sarq $44, %rcx
addl %edx, %ecx
imull $10485, %ecx, %ecx # imm = 0x28F5
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI4_0(%rip), %xmm0
movss %xmm0, (%rbx,%r14,4)
incq %r14
cmpq $41943040, %r14 # imm = 0x2800000
jne .LBB4_1
# %bb.2:
movl $36, %edi
callq _Znam
movq %rax, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB4_3: # =>This Inner Loop Header: Depth=1
callq rand
cltq
imulq $1677843209, %rax, %rcx # imm = 0x6401DB09
movq %rcx, %rdx
shrq $63, %rdx
sarq $44, %rcx
addl %edx, %ecx
imull $10485, %ecx, %ecx # imm = 0x28F5
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
divss .LCPI4_0(%rip), %xmm0
movss %xmm0, (%r14,%r15,4)
incq %r15
cmpq $9, %r15
jne .LBB4_3
# %bb.4:
movabsq $4294967552, %r15 # imm = 0x100000100
movl $16744464, %edi # imm = 0xFF8010
callq _Znam
movq %rax, %r12
movl $16744464, %edx # imm = 0xFF8010
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
leaq 48(%rsp), %rdi
movl $167772160, %esi # imm = 0xA000000
callq hipMalloc
movq 48(%rsp), %rdi
movl $167772160, %edx # imm = 0xA000000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $filter, %edi
movl $36, %edx
movq %r14, %rsi
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
leaq 8(%rsp), %rdi
movl $16744464, %esi # imm = 0xFF8010
callq hipMalloc
movq 8(%rsp), %rdi
movl $16744464, %edx # imm = 0xFF8010
movq %r12, 56(%rsp) # 8-byte Spill
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
movsd %xmm0, (%rsp) # 8-byte Spill
movl $10000, %ebp # imm = 0x2710
leaq 144(%rsp), %r12
leaq 16128(%r15), %r13
leaq 128(%rsp), %r14
jmp .LBB4_5
.p2align 4, 0x90
.LBB4_7: # in Loop: Header=BB4_5 Depth=1
movq %r14, %rdi
xorl %esi, %esi
callq gettimeofday
movq 128(%rsp), %rax
subq 144(%rsp), %rax
imulq $1000000, %rax, %rax # imm = 0xF4240
addq 136(%rsp), %rax
subq 152(%rsp), %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI4_1(%rip), %xmm0
movsd (%rsp), %xmm1 # 8-byte Reload
# xmm1 = mem[0],zero
addsd %xmm0, %xmm1
movsd %xmm1, (%rsp) # 8-byte Spill
decl %ebp
je .LBB4_8
.LBB4_5: # =>This Inner Loop Header: Depth=1
movq %r12, %rdi
xorl %esi, %esi
callq gettimeofday
movq %r13, %rdi
movl $1, %esi
movq %r15, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_7
# %bb.6: # in Loop: Header=BB4_5 Depth=1
movq 48(%rsp), %rax
movq 8(%rsp), %rcx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movl $8, 44(%rsp)
movl $32, 40(%rsp)
movl $2048, 36(%rsp) # imm = 0x800
movl $2048, 32(%rsp) # imm = 0x800
movl $10, 28(%rsp)
movl $3, 24(%rsp)
movl $2046, 20(%rsp) # imm = 0x7FE
movl $2046, 16(%rsp) # imm = 0x7FE
leaq 120(%rsp), %rax
movq %rax, 160(%rsp)
leaq 112(%rsp), %rax
movq %rax, 168(%rsp)
leaq 44(%rsp), %rax
movq %rax, 176(%rsp)
leaq 40(%rsp), %rax
movq %rax, 184(%rsp)
leaq 36(%rsp), %rax
movq %rax, 192(%rsp)
leaq 32(%rsp), %rax
movq %rax, 200(%rsp)
leaq 28(%rsp), %rax
movq %rax, 208(%rsp)
leaq 24(%rsp), %rax
movq %rax, 216(%rsp)
leaq 20(%rsp), %rax
movq %rax, 224(%rsp)
leaq 16(%rsp), %rax
movq %rax, 232(%rsp)
leaq 96(%rsp), %rdi
leaq 80(%rsp), %rsi
leaq 72(%rsp), %rdx
leaq 64(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 80(%rsp), %rcx
movl 88(%rsp), %r8d
movl $_Z17compute_gpu_tiledPfS_iiiiiiii, %edi
leaq 160(%rsp), %r9
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB4_7
.LBB4_8:
movq 8(%rsp), %rsi
movl $16744464, %edx # imm = 0xFF8010
movq 56(%rsp), %r14 # 8-byte Reload
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
callq hipDeviceReset
movl $.L.str, %edi
movl $2048, %esi # imm = 0x800
movl $2048, %edx # imm = 0x800
movl $10, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movl $32, %esi
movl $8, %edx
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movl $16384, %esi # imm = 0x4000
movl $256, %edx # imm = 0x100
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
movq %rbx, %rdi
callq _ZdlPv
movq %r14, %rdi
callq _ZdlPv
xorl %eax, %eax
addq $248, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17compute_gpu_naivePfS_iiiiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17compute_gpu_tiledPfS_iiiiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14compute_gpu_smPfS_iiiiiiii, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $filter, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movl $36, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type filter,@object # @filter
.local filter
.comm filter,36,16
.type _Z17compute_gpu_naivePfS_iiiiiiii,@object # @_Z17compute_gpu_naivePfS_iiiiiiii
.section .rodata,"a",@progbits
.globl _Z17compute_gpu_naivePfS_iiiiiiii
.p2align 3, 0x0
_Z17compute_gpu_naivePfS_iiiiiiii:
.quad _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii
.size _Z17compute_gpu_naivePfS_iiiiiiii, 8
.type _Z17compute_gpu_tiledPfS_iiiiiiii,@object # @_Z17compute_gpu_tiledPfS_iiiiiiii
.globl _Z17compute_gpu_tiledPfS_iiiiiiii
.p2align 3, 0x0
_Z17compute_gpu_tiledPfS_iiiiiiii:
.quad _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii
.size _Z17compute_gpu_tiledPfS_iiiiiiii, 8
.type _Z14compute_gpu_smPfS_iiiiiiii,@object # @_Z14compute_gpu_smPfS_iiiiiiii
.globl _Z14compute_gpu_smPfS_iiiiiiii
.p2align 3, 0x0
_Z14compute_gpu_smPfS_iiiiiiii:
.quad _Z29__device_stub__compute_gpu_smPfS_iiiiiiii
.size _Z14compute_gpu_smPfS_iiiiiiii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Input imgH: %d imgW: %d imgN: %d\n"
.size .L.str, 34
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Tile width: %d height: %d\n"
.size .L.str.1, 27
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Block number: %d, block size: %d \n"
.size .L.str.2, 35
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "time: %f \n"
.size .L.str.3, 11
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z17compute_gpu_naivePfS_iiiiiiii"
.size .L__unnamed_1, 34
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z17compute_gpu_tiledPfS_iiiiiiii"
.size .L__unnamed_2, 34
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z14compute_gpu_smPfS_iiiiiiii"
.size .L__unnamed_3, 31
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "filter"
.size .L__unnamed_4, 7
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__compute_gpu_naivePfS_iiiiiiii
.addrsig_sym _Z32__device_stub__compute_gpu_tiledPfS_iiiiiiii
.addrsig_sym _Z29__device_stub__compute_gpu_smPfS_iiiiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym filter
.addrsig_sym _Z17compute_gpu_naivePfS_iiiiiiii
.addrsig_sym _Z17compute_gpu_tiledPfS_iiiiiiii
.addrsig_sym _Z14compute_gpu_smPfS_iiiiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //======================================
// Utility function
//======================================
__device__ double u(const double c, const double h, const double l,
const double ssigma, const double ppsi, const int uti,
const double kkappa, const double tthetalab, const double eetalab){
double utility = 0.0;
if(uti == 1){
// CES
utility = (powf(powf(ppsi*powf(c, kkappa) + (1-ppsi)*powf(h, kkappa), (1/kkappa)), 1-ssigma) / (1-ssigma)) - (tthetalab*pow(l, 1 + eetalab)/(1 + eetalab)) ;
} else if(uti == 2){
// Utility function 2
utility = powf(powf(c, ppsi)*powf(h, 1-ppsi), 1-ssigma) / (1-ssigma);
}
if(c <= 0 || h <= 0){
utility = powf(-10, 15);
}
return(utility);
}
__device__ double mortg_function(const double m, const double Pm, const double oomega, const double h, const double Ph, const double repay_coeff){
double mortgage = 0.0;
if(m*(1+repay_coeff) <= (1-oomega)*Ph*h){
// if(m*Pm <= (1-oomega)*Ph*h){
mortgage = m*Pm;
} else{
mortgage = -10000.0;
}
return(mortgage);
}
__device__ double maximumab(const double a, const double b){
double ans = a;
if(b >= a){
ans = b;
}
return(ans);
}
//======================================
// Pricing function
//======================================
__global__ void Pmort(const int T, const int na, const int nm, const int nh, const int nd, const int ny,
const double rrho, const double r, const double Ph, const double ddeltabar, const double sunk, const double interm, const double rec_probab,
const double *P,
const double *dgrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *survival,
const double *repay_coeff,
const int it,
const int* Def,
const int* Renew,
const int* Policya,
double* pricing,
double* pricing_guess){
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
const int im = blockIdx.x;
const int ia = blockIdx.y;
// If mortgage is equal to zero, the price is not relevant.
if(im > 0){
int ind;
int ind2;
int ind3;
int iap = 0;
// For every state variable, I compute the pricing function
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if(it == T-1){
pricing[ind] = 0.0;
} else{
// Expected value is sum over tomorrow's possible shocks times probabilities: P[iy][iyp]*(1/nd)
for(int iyp=0; iyp<ny; iyp++){
for(int idp=0; idp<nd; idp++){
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + ia;
iap = Policya[ind2];
ind3 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
// pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) + // If he defaults
pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*(Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) - Ph*dgrid[idp]*hgrid[ih]) + // If he defaults
(1-Def[ind2])*((1-Renew[ind2])*(mgrid[im] + pricing_guess[ind3]*mgrid[im]) + // If he pays and continues with mortgage
(1-Def[ind2])*Renew[ind2]*(mgrid[im] + repay_coeff[it+1]*mgrid[im]))));
}
}
}
}
}
//======================================
// Value Function Computation
//======================================
__global__ void vfi(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti, const double rrho,
const double bbeta, const double Ph, const double q,
const double Pa, const double ddeltabar, const double ssigma,
const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid, const double *mgrid, const double *hgrid, const double *rgrid, const double *lgrid,
const double *dgrid, const double *ygrid, const double *P,
const double *eprocess, const double *survival, const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
// Value normal
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
// Value de consumption equivalent
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph*(ddelta + ddeltabar)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph*(1-ddelta - ddeltabar)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + (1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph, repay_coeff[it]);
cons = aa + Ph*(1-ddelta - ddeltabar)*hh + q*hhprime + yy*(1-incshock[it]) + mort_received - refinance_cost*(1+repay_coeff[it])*mmprime + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd > VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
}
//==================================================================
// Value Function Computation with different continuation
//==================================================================
__global__ void vfi_continuation(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti,
const double rrho, const double bbeta, const double Ph_today, const double q, const double Pa, const double ddeltabar_today,
const double ssigma, const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *lgrid,
const double *dgrid,
const double *ygrid,
const double *P,
const double *eprocess,
const double *survival,
const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
const double* Value_future,
const double* Value_equiv_future,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph_today*(ddelta + ddeltabar_today)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph_today*(1-ddelta - ddeltabar_today)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv_future[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + (1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv_future[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph_today, repay_coeff[it]);
cons = aa + Ph_today*(1-ddelta - ddeltabar_today)*hh + q*hhprime + yy*(1-incshock[it]) - refinance_cost*(1+repay_coeff[it])*mmprime + mort_received + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph_today*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd >= VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
} | #include <hip/hip_runtime.h>
//======================================
// Utility function
//======================================
__device__ double u(const double c, const double h, const double l,
const double ssigma, const double ppsi, const int uti,
const double kkappa, const double tthetalab, const double eetalab){
double utility = 0.0;
if(uti == 1){
// CES
utility = (powf(powf(ppsi*powf(c, kkappa) + (1-ppsi)*powf(h, kkappa), (1/kkappa)), 1-ssigma) / (1-ssigma)) - (tthetalab*pow(l, 1 + eetalab)/(1 + eetalab)) ;
} else if(uti == 2){
// Utility function 2
utility = powf(powf(c, ppsi)*powf(h, 1-ppsi), 1-ssigma) / (1-ssigma);
}
if(c <= 0 || h <= 0){
utility = powf(-10, 15);
}
return(utility);
}
__device__ double mortg_function(const double m, const double Pm, const double oomega, const double h, const double Ph, const double repay_coeff){
double mortgage = 0.0;
if(m*(1+repay_coeff) <= (1-oomega)*Ph*h){
// if(m*Pm <= (1-oomega)*Ph*h){
mortgage = m*Pm;
} else{
mortgage = -10000.0;
}
return(mortgage);
}
__device__ double maximumab(const double a, const double b){
double ans = a;
if(b >= a){
ans = b;
}
return(ans);
}
//======================================
// Pricing function
//======================================
__global__ void Pmort(const int T, const int na, const int nm, const int nh, const int nd, const int ny,
const double rrho, const double r, const double Ph, const double ddeltabar, const double sunk, const double interm, const double rec_probab,
const double *P,
const double *dgrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *survival,
const double *repay_coeff,
const int it,
const int* Def,
const int* Renew,
const int* Policya,
double* pricing,
double* pricing_guess){
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
const int im = blockIdx.x;
const int ia = blockIdx.y;
// If mortgage is equal to zero, the price is not relevant.
if(im > 0){
int ind;
int ind2;
int ind3;
int iap = 0;
// For every state variable, I compute the pricing function
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if(it == T-1){
pricing[ind] = 0.0;
} else{
// Expected value is sum over tomorrow's possible shocks times probabilities: P[iy][iyp]*(1/nd)
for(int iyp=0; iyp<ny; iyp++){
for(int idp=0; idp<nd; idp++){
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + ia;
iap = Policya[ind2];
ind3 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
// pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) + // If he defaults
pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*(Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) - Ph*dgrid[idp]*hgrid[ih]) + // If he defaults
(1-Def[ind2])*((1-Renew[ind2])*(mgrid[im] + pricing_guess[ind3]*mgrid[im]) + // If he pays and continues with mortgage
(1-Def[ind2])*Renew[ind2]*(mgrid[im] + repay_coeff[it+1]*mgrid[im]))));
}
}
}
}
}
//======================================
// Value Function Computation
//======================================
__global__ void vfi(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti, const double rrho,
const double bbeta, const double Ph, const double q,
const double Pa, const double ddeltabar, const double ssigma,
const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid, const double *mgrid, const double *hgrid, const double *rgrid, const double *lgrid,
const double *dgrid, const double *ygrid, const double *P,
const double *eprocess, const double *survival, const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
// Value normal
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
// Value de consumption equivalent
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph*(ddelta + ddeltabar)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph*(1-ddelta - ddeltabar)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + (1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph, repay_coeff[it]);
cons = aa + Ph*(1-ddelta - ddeltabar)*hh + q*hhprime + yy*(1-incshock[it]) + mort_received - refinance_cost*(1+repay_coeff[it])*mmprime + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd > VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
}
//==================================================================
// Value Function Computation with different continuation
//==================================================================
__global__ void vfi_continuation(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti,
const double rrho, const double bbeta, const double Ph_today, const double q, const double Pa, const double ddeltabar_today,
const double ssigma, const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *lgrid,
const double *dgrid,
const double *ygrid,
const double *P,
const double *eprocess,
const double *survival,
const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
const double* Value_future,
const double* Value_equiv_future,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph_today*(ddelta + ddeltabar_today)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph_today*(1-ddelta - ddeltabar_today)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv_future[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + (1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv_future[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph_today, repay_coeff[it]);
cons = aa + Ph_today*(1-ddelta - ddeltabar_today)*hh + q*hhprime + yy*(1-incshock[it]) - refinance_cost*(1+repay_coeff[it])*mmprime + mort_received + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph_today*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd >= VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
//======================================
// Utility function
//======================================
__device__ double u(const double c, const double h, const double l,
const double ssigma, const double ppsi, const int uti,
const double kkappa, const double tthetalab, const double eetalab){
double utility = 0.0;
if(uti == 1){
// CES
utility = (powf(powf(ppsi*powf(c, kkappa) + (1-ppsi)*powf(h, kkappa), (1/kkappa)), 1-ssigma) / (1-ssigma)) - (tthetalab*pow(l, 1 + eetalab)/(1 + eetalab)) ;
} else if(uti == 2){
// Utility function 2
utility = powf(powf(c, ppsi)*powf(h, 1-ppsi), 1-ssigma) / (1-ssigma);
}
if(c <= 0 || h <= 0){
utility = powf(-10, 15);
}
return(utility);
}
__device__ double mortg_function(const double m, const double Pm, const double oomega, const double h, const double Ph, const double repay_coeff){
double mortgage = 0.0;
if(m*(1+repay_coeff) <= (1-oomega)*Ph*h){
// if(m*Pm <= (1-oomega)*Ph*h){
mortgage = m*Pm;
} else{
mortgage = -10000.0;
}
return(mortgage);
}
__device__ double maximumab(const double a, const double b){
double ans = a;
if(b >= a){
ans = b;
}
return(ans);
}
//======================================
// Pricing function
//======================================
__global__ void Pmort(const int T, const int na, const int nm, const int nh, const int nd, const int ny,
const double rrho, const double r, const double Ph, const double ddeltabar, const double sunk, const double interm, const double rec_probab,
const double *P,
const double *dgrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *survival,
const double *repay_coeff,
const int it,
const int* Def,
const int* Renew,
const int* Policya,
double* pricing,
double* pricing_guess){
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
const int im = blockIdx.x;
const int ia = blockIdx.y;
// If mortgage is equal to zero, the price is not relevant.
if(im > 0){
int ind;
int ind2;
int ind3;
int iap = 0;
// For every state variable, I compute the pricing function
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if(it == T-1){
pricing[ind] = 0.0;
} else{
// Expected value is sum over tomorrow's possible shocks times probabilities: P[iy][iyp]*(1/nd)
for(int iyp=0; iyp<ny; iyp++){
for(int idp=0; idp<nd; idp++){
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + ia;
iap = Policya[ind2];
ind3 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
// pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) + // If he defaults
pricing[ind] = pricing[ind] + ((survival[it]*rrho/(mgrid[im]*(1+r+interm)))*P[iy*ny+iyp]*(1/(double)nd)*(Def[ind2]*(1-Renew[ind2])*(Ph*(1-dgrid[idp] - ddeltabar)*hgrid[ih]*(1-sunk) - Ph*dgrid[idp]*hgrid[ih]) + // If he defaults
(1-Def[ind2])*((1-Renew[ind2])*(mgrid[im] + pricing_guess[ind3]*mgrid[im]) + // If he pays and continues with mortgage
(1-Def[ind2])*Renew[ind2]*(mgrid[im] + repay_coeff[it+1]*mgrid[im]))));
}
}
}
}
}
//======================================
// Value Function Computation
//======================================
__global__ void vfi(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti, const double rrho,
const double bbeta, const double Ph, const double q,
const double Pa, const double ddeltabar, const double ssigma,
const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid, const double *mgrid, const double *hgrid, const double *rgrid, const double *lgrid,
const double *dgrid, const double *ygrid, const double *P,
const double *eprocess, const double *survival, const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
// Value normal
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
// Value de consumption equivalent
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph*(ddelta + ddeltabar)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value[ind1] + // Keeps mortg
(1-rrho)*Value[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv[ind1] + // Keeps mortg
(1-rrho)*Value_equiv[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph*(1-ddelta - ddeltabar)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + 0*nm*na + 0*na + iap;
Vexd = Vexd + (1/(double)nd)*Value[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph, repay_coeff[it]);
cons = aa + Ph*(1-ddelta - ddeltabar)*hh + q*hhprime + yy*(1-incshock[it]) + mort_received - refinance_cost*(1+repay_coeff[it])*mmprime + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value[ind1]) +
((1-rrho) * Value[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv[ind1]) +
((1-rrho) * Value_equiv[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd > VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
}
//==================================================================
// Value Function Computation with different continuation
//==================================================================
__global__ void vfi_continuation(const int T, const int Tretirement, const int na, const int nm, const int nh, const int nr, const int nl,
const int nd, const int ny, const int uti,
const double rrho, const double bbeta, const double Ph_today, const double q, const double Pa, const double ddeltabar_today,
const double ssigma, const double ppsi, const double kkappa, const double tthetalab, const double eetalab,
const double fcost, const double refcost, const double pension, const double sstax, const double ltax,
const double lumpsum, const double oomega, const double rec_probab, const double sunk,
const double *incshock, const double *mortsubsidy,
const double *agrid,
const double *mgrid,
const double *hgrid,
const double *rgrid,
const double *lgrid,
const double *dgrid,
const double *ygrid,
const double *P,
const double *eprocess,
const double *survival,
const double *repay_coeff,
const int it,
const int equivalent,
const double multiplier,
const double* Value_future,
const double* Value_equiv_future,
double* Value,
double* Value_equiv,
int* Default,
int* Renew,
int* Policya,
int* Policym,
int* Policyh,
int* Policyr,
int* Policyl,
double* Policyc,
double* Pricing_guess){
int ind;
int ind1;
int ind2;
int indsubs;
double VV = 0.0;
double VV_eq = 0.0;
double VVk = powf(-10,11); double VVn = powf(-10,11); double VVd = powf(-10,11);
double Vexk = 0.0; double Vexn = 0.0; double Vexd = 0.0;
double VVk_eq = powf(-10,11); double VVn_eq = powf(-10,11); double VVd_eq = powf(-10,11);
double Vexk_eq = 0.0; double Vexn_eq = 0.0; double Vexd_eq = 0.0;
double cck = 0; double ccn = 0; double ccd = 0; // Consumption
int hhk = 0; int hhn = 0; int hhd = 0; // Home ownership
int hrk = 0; int hrn = 0; int hrd = 0; // Home renting
int mmk = 0; int mmn = 0; int mmd = 0; // Mortgage
int aak = 0; int aan = 0; int aad = 0; // Savings
int llk = 0; int lln = 0; int lld = 0; // Labor
double yy;
double aa;
double ll;
double aaprime;
double mm;
double mmprime;
double hh;
double hhprime;
double hhrent;
double ddelta;
double cons;
double pprice;
double mort_received;
double mortgage_subsidy;
double refinance_cost;
// State variables that are parallelized
// const int im = blockIdx.x * blockDim.x + threadIdx.x;
const int im = blockIdx.x;
const int ia = blockIdx.y;
const int id = threadIdx.x;
const int ih = threadIdx.y;
const int iy = threadIdx.z;
aa = agrid[ia];
mm = mgrid[im];
hh = hgrid[ih];
ddelta = dgrid[id];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
indsubs = it*ny*nh*nm*na + iy*nh*nm*na + ih*nm*na + im*na + ia;
mortgage_subsidy = mortsubsidy[indsubs];
// Control variables
for(int il=0; il<nl; il++){
for(int iap=0; iap<na; iap++){
for(int ihre=0; ihre<nr; ihre++){
ll = lgrid[il];
aaprime = agrid[iap];
hhrent = rgrid[ihre];
if(it < Tretirement){
yy = ygrid[iy]*eprocess[it]*ll*(1-sstax-ltax);
} else{
yy = ygrid[iy]*pension;
}
// Keeping the same mortgage
cons = aa + q*hh + yy*(1-incshock[it]) - mm - q*hhrent - Pa*aaprime - Ph_today*(ddelta + ddeltabar_today)*hh - lumpsum;
Vexk = 0.0;
Vexk_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + P[iy*ny+iyp]*(1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + im*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ih*nm*na + 0*na + iap;
Vexk = Vexk + (1/(double)nd)*(rrho*Value_future[ind1] + // Keeps mortg
(1-rrho)*Value_future[ind2]); // Mortg disappears
Vexk_eq = Vexk_eq + (1/(double)nd)*(rrho*Value_equiv_future[ind1] + // Keeps mortg
(1-rrho)*Value_equiv_future[ind2]); // Mortg disappears
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexk_eq;
}
if(VV > VVk){
VVk = VV;
VVk_eq = VV_eq;
hhk = ih;
hrk = ihre;
mmk = im;
aak = iap;
cck = cons;
llk = il;
}
// Defaulting => Household loses savings
cons = maximumab(aa - rec_probab*((1+repay_coeff[it])*mm - Ph_today*(1-ddelta - ddeltabar_today)*hh*(1-sunk)), 0) + yy*(1-incshock[it]) - q*hhrent - Pa*aaprime - lumpsum;
Vexd = 0.0;
Vexd_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + P[iy*ny+iyp]*(1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + P[iy*ny+iyp]*(1/(double)nd)*Value_equiv_future[ind1];
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + iap;
Vexd = Vexd + (1/(double)nd)*Value_future[ind1];
Vexd_eq = Vexd_eq + (1/(double)nd)*Value_equiv_future[ind1];
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexd_eq;
}
if(VV > VVd){
VVd = VV;
VVd_eq = VV_eq;
hhd = 0;
hrd = ihre;
mmd = 0;
aad = iap;
ccd = cons;
lld = il;
}
// New mortgage
for(int imp=0; imp<nm; imp++){
for(int ihp=0; ihp<nh; ihp++){
if(im == 0){
if(imp > 0){
refinance_cost = fcost; // Issuing new mortgage
} else{
refinance_cost = 0.0;
}
} else{
if(imp > 0){
refinance_cost = refcost; // Refinancing mortgage
} else{
refinance_cost = 0.0; // Paying total debt
}
}
mmprime = mgrid[imp];
hhprime = hgrid[ihp];
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ihp*nm*na + imp*na + iap;
pprice = Pricing_guess[ind];
mort_received = mortg_function(mmprime, pprice, oomega, hhprime, Ph_today, repay_coeff[it]);
cons = aa + Ph_today*(1-ddelta - ddeltabar_today)*hh + q*hhprime + yy*(1-incshock[it]) - refinance_cost*(1+repay_coeff[it])*mmprime + mort_received + mortgage_subsidy - (1+repay_coeff[it])*mm - q*hhrent - Ph_today*hhprime - Pa*aaprime - lumpsum;
Vexn = 0.0;
Vexn_eq = 0.0;
if(it < T-1){
for(int idp=0; idp<nd; idp++){
if(it < Tretirement){ // Income uncertainty before retirement
for(int iyp=0; iyp<ny; iyp++){
ind1 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iyp*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + P[iy*ny+iyp]*(1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
} else{ // Certainty after retirement
ind1 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + imp*na + iap;
ind2 = (it+1)*ny*nd*nh*nm*na + iy*nd*nh*nm*na + idp*nh*nm*na + ihp*nm*na + 0*na + iap;
Vexn = Vexn + (1/(double)nd)*((rrho * Value_future[ind1]) +
((1-rrho) * Value_future[ind2]));
Vexn_eq = Vexn_eq + (1/(double)nd)*((rrho * Value_equiv_future[ind1]) +
((1-rrho) * Value_equiv_future[ind2]));
}
}
}
VV = u(cons, hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn;
if(equivalent == 1){
VV_eq = u(cons*(1+multiplier), hhrent, ll, ssigma, ppsi, uti, kkappa, tthetalab, eetalab) + bbeta*survival[it]*Vexn_eq;
}
if(VV > VVn){
VVn = VV;
VVn_eq = VV_eq;
hhn = ihp;
hrn = ihre;
mmn = imp;
aan = iap;
ccn = cons;
lln = il;
}
}
}
}
}
}
ind = it*ny*nd*nh*nm*na + iy*nd*nh*nm*na + id*nh*nm*na + ih*nm*na + im*na + ia;
if((VVk >= VVd) & (VVk >= VVn)){
Value[ind] = VVk;
Value_equiv[ind]= VVk_eq;
Policya[ind] = aak;
Policyh[ind] = hhk;
Policyr[ind] = hrk;
Policyl[ind] = llk;
Policym[ind] = mmk;
Policyc[ind] = cck;
Default[ind] = 0;
Renew[ind] = 0;
} else if((VVd > VVk) & (VVd >= VVn)){
Value[ind] = VVd;
Value_equiv[ind]= VVd_eq;
Policya[ind] = aad;
Policyh[ind] = hhd;
Policyr[ind] = hrd;
Policyl[ind] = lld;
Policym[ind] = mmd;
Policyc[ind] = ccd;
Default[ind] = 1;
Renew[ind] = 0;
} else{
Value[ind] = VVn;
Value_equiv[ind]= VVn_eq;
Policya[ind] = aan;
Policyh[ind] = hhn;
Policyr[ind] = hrn;
Policyl[ind] = lln;
Policym[ind] = mmn;
Policyc[ind] = ccn;
Default[ind] = 0;
Renew[ind] = 1;
}
} | .text
.file "CUDA_functions.hip"
.globl _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_ # -- Begin function _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.p2align 4, 0x90
.type _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_,@function
_Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_: # @_Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.cfi_startproc
# %bb.0:
subq $344, %rsp # imm = 0x158
.cfi_def_cfa_offset 352
movl %edi, 20(%rsp)
movl %esi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movsd %xmm0, 120(%rsp)
movsd %xmm1, 112(%rsp)
movsd %xmm2, 104(%rsp)
movsd %xmm3, 96(%rsp)
movsd %xmm4, 88(%rsp)
movsd %xmm5, 80(%rsp)
movsd %xmm6, 72(%rsp)
leaq 20(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 12(%rsp), %rax
movq %rax, 144(%rsp)
leaq 8(%rsp), %rax
movq %rax, 152(%rsp)
leaq 4(%rsp), %rax
movq %rax, 160(%rsp)
movq %rsp, %rax
movq %rax, 168(%rsp)
leaq 120(%rsp), %rax
movq %rax, 176(%rsp)
leaq 112(%rsp), %rax
movq %rax, 184(%rsp)
leaq 104(%rsp), %rax
movq %rax, 192(%rsp)
leaq 96(%rsp), %rax
movq %rax, 200(%rsp)
leaq 88(%rsp), %rax
movq %rax, 208(%rsp)
leaq 80(%rsp), %rax
movq %rax, 216(%rsp)
leaq 72(%rsp), %rax
movq %rax, 224(%rsp)
leaq 352(%rsp), %rax
movq %rax, 232(%rsp)
leaq 360(%rsp), %rax
movq %rax, 240(%rsp)
leaq 368(%rsp), %rax
movq %rax, 248(%rsp)
leaq 376(%rsp), %rax
movq %rax, 256(%rsp)
leaq 384(%rsp), %rax
movq %rax, 264(%rsp)
leaq 392(%rsp), %rax
movq %rax, 272(%rsp)
leaq 400(%rsp), %rax
movq %rax, 280(%rsp)
leaq 408(%rsp), %rax
movq %rax, 288(%rsp)
leaq 416(%rsp), %rax
movq %rax, 296(%rsp)
leaq 424(%rsp), %rax
movq %rax, 304(%rsp)
leaq 432(%rsp), %rax
movq %rax, 312(%rsp)
leaq 440(%rsp), %rax
movq %rax, 320(%rsp)
leaq 448(%rsp), %rax
movq %rax, 328(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $360, %rsp # imm = 0x168
.cfi_adjust_cfa_offset -360
retq
.Lfunc_end0:
.size _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_, .Lfunc_end0-_Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.cfi_endproc
# -- End function
.globl _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_ # -- Begin function _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.p2align 4, 0x90
.type _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_,@function
_Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_: # @_Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.cfi_startproc
# %bb.0:
subq $600, %rsp # imm = 0x258
.cfi_def_cfa_offset 608
movl %edi, 28(%rsp)
movl %esi, 24(%rsp)
movl %edx, 20(%rsp)
movl %ecx, 16(%rsp)
movl %r8d, 12(%rsp)
movl %r9d, 8(%rsp)
movsd %xmm0, 136(%rsp)
movsd %xmm1, 128(%rsp)
movsd %xmm2, 120(%rsp)
movsd %xmm3, 112(%rsp)
movsd %xmm4, 104(%rsp)
movsd %xmm5, 96(%rsp)
movsd %xmm6, 88(%rsp)
movsd %xmm7, 80(%rsp)
leaq 28(%rsp), %rax
movq %rax, 144(%rsp)
leaq 24(%rsp), %rax
movq %rax, 152(%rsp)
leaq 20(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
leaq 608(%rsp), %rax
movq %rax, 192(%rsp)
leaq 616(%rsp), %rax
movq %rax, 200(%rsp)
leaq 624(%rsp), %rax
movq %rax, 208(%rsp)
leaq 632(%rsp), %rax
movq %rax, 216(%rsp)
leaq 136(%rsp), %rax
movq %rax, 224(%rsp)
leaq 128(%rsp), %rax
movq %rax, 232(%rsp)
leaq 120(%rsp), %rax
movq %rax, 240(%rsp)
leaq 112(%rsp), %rax
movq %rax, 248(%rsp)
leaq 104(%rsp), %rax
movq %rax, 256(%rsp)
leaq 96(%rsp), %rax
movq %rax, 264(%rsp)
leaq 88(%rsp), %rax
movq %rax, 272(%rsp)
leaq 80(%rsp), %rax
movq %rax, 280(%rsp)
leaq 640(%rsp), %rax
movq %rax, 288(%rsp)
leaq 648(%rsp), %rax
movq %rax, 296(%rsp)
leaq 656(%rsp), %rax
movq %rax, 304(%rsp)
leaq 664(%rsp), %rax
movq %rax, 312(%rsp)
leaq 672(%rsp), %rax
movq %rax, 320(%rsp)
leaq 680(%rsp), %rax
movq %rax, 328(%rsp)
leaq 688(%rsp), %rax
movq %rax, 336(%rsp)
leaq 696(%rsp), %rax
movq %rax, 344(%rsp)
leaq 704(%rsp), %rax
movq %rax, 352(%rsp)
leaq 712(%rsp), %rax
movq %rax, 360(%rsp)
leaq 720(%rsp), %rax
movq %rax, 368(%rsp)
leaq 728(%rsp), %rax
movq %rax, 376(%rsp)
leaq 736(%rsp), %rax
movq %rax, 384(%rsp)
leaq 744(%rsp), %rax
movq %rax, 392(%rsp)
leaq 752(%rsp), %rax
movq %rax, 400(%rsp)
leaq 760(%rsp), %rax
movq %rax, 408(%rsp)
leaq 768(%rsp), %rax
movq %rax, 416(%rsp)
leaq 776(%rsp), %rax
movq %rax, 424(%rsp)
leaq 784(%rsp), %rax
movq %rax, 432(%rsp)
leaq 792(%rsp), %rax
movq %rax, 440(%rsp)
leaq 800(%rsp), %rax
movq %rax, 448(%rsp)
leaq 808(%rsp), %rax
movq %rax, 456(%rsp)
leaq 816(%rsp), %rax
movq %rax, 464(%rsp)
leaq 824(%rsp), %rax
movq %rax, 472(%rsp)
leaq 832(%rsp), %rax
movq %rax, 480(%rsp)
leaq 840(%rsp), %rax
movq %rax, 488(%rsp)
leaq 848(%rsp), %rax
movq %rax, 496(%rsp)
leaq 856(%rsp), %rax
movq %rax, 504(%rsp)
leaq 864(%rsp), %rax
movq %rax, 512(%rsp)
leaq 872(%rsp), %rax
movq %rax, 520(%rsp)
leaq 880(%rsp), %rax
movq %rax, 528(%rsp)
leaq 888(%rsp), %rax
movq %rax, 536(%rsp)
leaq 896(%rsp), %rax
movq %rax, 544(%rsp)
leaq 904(%rsp), %rax
movq %rax, 552(%rsp)
leaq 912(%rsp), %rax
movq %rax, 560(%rsp)
leaq 920(%rsp), %rax
movq %rax, 568(%rsp)
leaq 928(%rsp), %rax
movq %rax, 576(%rsp)
leaq 936(%rsp), %rax
movq %rax, 584(%rsp)
leaq 944(%rsp), %rax
movq %rax, 592(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $616, %rsp # imm = 0x268
.cfi_adjust_cfa_offset -616
retq
.Lfunc_end1:
.size _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, .Lfunc_end1-_Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.cfi_endproc
# -- End function
.globl _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_ # -- Begin function _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.p2align 4, 0x90
.type _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_,@function
_Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_: # @_Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.cfi_startproc
# %bb.0:
subq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 624
movl %edi, 28(%rsp)
movl %esi, 24(%rsp)
movl %edx, 20(%rsp)
movl %ecx, 16(%rsp)
movl %r8d, 12(%rsp)
movl %r9d, 8(%rsp)
movsd %xmm0, 136(%rsp)
movsd %xmm1, 128(%rsp)
movsd %xmm2, 120(%rsp)
movsd %xmm3, 112(%rsp)
movsd %xmm4, 104(%rsp)
movsd %xmm5, 96(%rsp)
movsd %xmm6, 88(%rsp)
movsd %xmm7, 80(%rsp)
leaq 28(%rsp), %rax
movq %rax, 144(%rsp)
leaq 24(%rsp), %rax
movq %rax, 152(%rsp)
leaq 20(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 12(%rsp), %rax
movq %rax, 176(%rsp)
leaq 8(%rsp), %rax
movq %rax, 184(%rsp)
leaq 624(%rsp), %rax
movq %rax, 192(%rsp)
leaq 632(%rsp), %rax
movq %rax, 200(%rsp)
leaq 640(%rsp), %rax
movq %rax, 208(%rsp)
leaq 648(%rsp), %rax
movq %rax, 216(%rsp)
leaq 136(%rsp), %rax
movq %rax, 224(%rsp)
leaq 128(%rsp), %rax
movq %rax, 232(%rsp)
leaq 120(%rsp), %rax
movq %rax, 240(%rsp)
leaq 112(%rsp), %rax
movq %rax, 248(%rsp)
leaq 104(%rsp), %rax
movq %rax, 256(%rsp)
leaq 96(%rsp), %rax
movq %rax, 264(%rsp)
leaq 88(%rsp), %rax
movq %rax, 272(%rsp)
leaq 80(%rsp), %rax
movq %rax, 280(%rsp)
leaq 656(%rsp), %rax
movq %rax, 288(%rsp)
leaq 664(%rsp), %rax
movq %rax, 296(%rsp)
leaq 672(%rsp), %rax
movq %rax, 304(%rsp)
leaq 680(%rsp), %rax
movq %rax, 312(%rsp)
leaq 688(%rsp), %rax
movq %rax, 320(%rsp)
leaq 696(%rsp), %rax
movq %rax, 328(%rsp)
leaq 704(%rsp), %rax
movq %rax, 336(%rsp)
leaq 712(%rsp), %rax
movq %rax, 344(%rsp)
leaq 720(%rsp), %rax
movq %rax, 352(%rsp)
leaq 728(%rsp), %rax
movq %rax, 360(%rsp)
leaq 736(%rsp), %rax
movq %rax, 368(%rsp)
leaq 744(%rsp), %rax
movq %rax, 376(%rsp)
leaq 752(%rsp), %rax
movq %rax, 384(%rsp)
leaq 760(%rsp), %rax
movq %rax, 392(%rsp)
leaq 768(%rsp), %rax
movq %rax, 400(%rsp)
leaq 776(%rsp), %rax
movq %rax, 408(%rsp)
leaq 784(%rsp), %rax
movq %rax, 416(%rsp)
leaq 792(%rsp), %rax
movq %rax, 424(%rsp)
leaq 800(%rsp), %rax
movq %rax, 432(%rsp)
leaq 808(%rsp), %rax
movq %rax, 440(%rsp)
leaq 816(%rsp), %rax
movq %rax, 448(%rsp)
leaq 824(%rsp), %rax
movq %rax, 456(%rsp)
leaq 832(%rsp), %rax
movq %rax, 464(%rsp)
leaq 840(%rsp), %rax
movq %rax, 472(%rsp)
leaq 848(%rsp), %rax
movq %rax, 480(%rsp)
leaq 856(%rsp), %rax
movq %rax, 488(%rsp)
leaq 864(%rsp), %rax
movq %rax, 496(%rsp)
leaq 872(%rsp), %rax
movq %rax, 504(%rsp)
leaq 880(%rsp), %rax
movq %rax, 512(%rsp)
leaq 888(%rsp), %rax
movq %rax, 520(%rsp)
leaq 896(%rsp), %rax
movq %rax, 528(%rsp)
leaq 904(%rsp), %rax
movq %rax, 536(%rsp)
leaq 912(%rsp), %rax
movq %rax, 544(%rsp)
leaq 920(%rsp), %rax
movq %rax, 552(%rsp)
leaq 928(%rsp), %rax
movq %rax, 560(%rsp)
leaq 936(%rsp), %rax
movq %rax, 568(%rsp)
leaq 944(%rsp), %rax
movq %rax, 576(%rsp)
leaq 952(%rsp), %rax
movq %rax, 584(%rsp)
leaq 960(%rsp), %rax
movq %rax, 592(%rsp)
leaq 968(%rsp), %rax
movq %rax, 600(%rsp)
leaq 976(%rsp), %rax
movq %rax, 608(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $632, %rsp # imm = 0x278
.cfi_adjust_cfa_offset -632
retq
.Lfunc_end2:
.size _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, .Lfunc_end2-_Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_,@object # @_Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.section .rodata,"a",@progbits
.globl _Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.p2align 3, 0x0
_Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_:
.quad _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.size _Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_, 8
.type _Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_,@object # @_Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.globl _Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.p2align 3, 0x0
_Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_:
.quad _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.size _Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, 8
.type _Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_,@object # @_Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.globl _Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.p2align 3, 0x0
_Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_:
.quad _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.size _Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_"
.size .L__unnamed_1, 58
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_"
.size .L__unnamed_2, 110
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_"
.size .L__unnamed_3, 130
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.addrsig_sym _Z18__device_stub__vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.addrsig_sym _Z31__device_stub__vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5PmortiiiiiidddddddPKdS0_S0_S0_S0_S0_S0_iPKiS2_S2_PdS3_
.addrsig_sym _Z3vfiiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidPdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.addrsig_sym _Z16vfi_continuationiiiiiiiiiiddddddddddddddddddddPKdS0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_S0_iidS0_S0_PdS1_PiS2_S2_S2_S2_S2_S2_S1_S1_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} | .file "tmpxft_000155dc_00000000-6_TestEncoder.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4252:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4252:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n"
.align 8
.LC1:
.string "./G_and_H_Matrices/H_%d%d_%d.alist"
.align 8
.LC2:
.string "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "r"
.LC4:
.string "Value of errno: %d\n"
.LC5:
.string "Error printed by perror"
.LC6:
.string "Error opening file %s\n"
.LC7:
.string "%d"
.LC8:
.string "parameters have been read.\n"
.LC9:
.string "numBits = %i, numChecks = %i\n"
.section .rodata.str1.8
.align 8
.LC10:
.string "Max checks for bit: %i Max bits for check %i\n"
.align 8
.LC11:
.string "Time for encoder: %i microsec\n"
.section .rodata.str1.1
.LC12:
.string "./evenodd%d.encoded"
.LC13:
.string "w"
.LC14:
.string "%d\n"
.text
.globl main
.type main, @function
main:
.LFB4240:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $840, %rsp
.cfi_def_cfa_offset 896
movq %rsi, %r12
movq %fs:40, %rax
movq %rax, 824(%rsp)
xorl %eax, %eax
movl $623, %ebx
.L4:
subq $1, %rbx
jne .L4
cmpl $3, %edi
jle .L20
movq 8(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movl %eax, 12(%rsp)
movq 16(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r13
movq 24(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r12
leaq 48(%rsp), %r14
subq $8, %rsp
.cfi_def_cfa_offset 904
pushq %rbp
.cfi_def_cfa_offset 912
movl %eax, %r9d
movl %r13d, %r8d
leaq .LC1(%rip), %rcx
movl $256, %edx
movl $2, %esi
movq %r14, %rdi
movl $0, %eax
call __sprintf_chk@PLT
leaq 320(%rsp), %rdi
movl %ebp, (%rsp)
movl %r12d, %r9d
movl %r13d, %r8d
leaq .LC2(%rip), %rcx
movl $256, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
addq $16, %rsp
.cfi_def_cfa_offset 896
leaq .LC3(%rip), %rsi
movq %r14, %rdi
call fopen@PLT
movq %rax, %r12
testq %rax, %rax
je .L21
leaq 24(%rsp), %rdx
leaq .LC7(%rip), %r13
movq %r13, %rsi
movq %rax, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 20(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 32(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 28(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
movq %r12, %rdi
call fclose@PLT
leaq 304(%rsp), %rdi
leaq .LC3(%rip), %rsi
call fopen@PLT
movq %rax, %r12
testq %rax, %rax
je .L22
leaq 36(%rsp), %rdi
movq %rax, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 40(%rsp), %rdi
movq %r12, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 44(%rsp), %rdi
movq %r12, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
movl 36(%rsp), %r14d
imull 40(%rsp), %r14d
leaq 0(,%r14,4), %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %r13
movq %r12, %r8
movq %r14, %rcx
movl $4, %edx
movq %r15, %rsi
movq %rax, %rdi
call __fread_chk@PLT
movq %r12, %rdi
call fclose@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %ecx
movl 24(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 28(%rsp), %ecx
movl 32(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
salq $2, %rdi
call malloc@PLT
movq %rax, %r14
movl 24(%rsp), %edi
salq $2, %rdi
call malloc@PLT
movq %rax, %r12
testl %ebp, %ebp
je .L9
movl %ebp, %ebp
movq %rbx, %rax
.L10:
movl %eax, %edx
andl $1, %edx
movl %edx, (%r14,%rax,4)
addq $1, %rax
cmpq %rax, %rbp
jne .L10
.L9:
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbp
subq $8, %rsp
.cfi_def_cfa_offset 904
pushq %r12
.cfi_def_cfa_offset 912
movl 60(%rsp), %r9d
movl 56(%rsp), %r8d
movl 52(%rsp), %ecx
movl 28(%rsp), %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11ldpcEncoderPjS_jjjjS_@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
addq $16, %rsp
.cfi_def_cfa_offset 896
subq %rbp, %rax
movq %rax, %rcx
movabsq $2361183241434822607, %rdx
imulq %rdx
sarq $7, %rdx
sarq $63, %rcx
subq %rcx, %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 560(%rsp), %rbp
movl 24(%rsp), %r8d
leaq .LC12(%rip), %rcx
movl $256, %edx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __sprintf_chk@PLT
leaq .LC13(%rip), %rsi
movq %rbp, %rdi
call fopen@PLT
movq %rax, %rbp
testq %rax, %rax
je .L11
leaq .LC14(%rip), %r13
cmpl $0, 24(%rsp)
je .L13
.L12:
movl (%r12,%rbx,4), %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $1, %rbx
cmpl 24(%rsp), %ebx
jb .L12
.L13:
movq %rbp, %rdi
call fclose@PLT
movl $0, %eax
.L3:
movq 824(%rsp), %rdx
subq %fs:40, %rdx
jne .L23
addq $840, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L21:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
movq %r14, %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L22:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
leaq 304(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L11:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
leaq 560(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4240:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4275:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4275:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} | #include <hip/hip_runtime.h>
#include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <random>
#include <math.h>
#include <string.h>
#include <stdio.h>
#include <errno.h>
#include <chrono>
void ldpcEncoder (unsigned int *infoWord, unsigned int* W_ROW_ROM,
unsigned int numMsgBits, unsigned int numRowsinRom, unsigned int numParBits,
unsigned int shiftRegLength,
unsigned int *codeWord);
int main (int argc, char **argv) {
unsigned int numChecks, numBits, maxBitsForCheck, maxChecksForBit;
unsigned int numRowsW, numColsW, shiftRegLength;
unsigned int *W_ROW_ROM;
char alistFile[256];
char wROM_File[256];
FILE *src;
int errnum;
unsigned int infoLeng, rnum, rdenom;
using clock = std::chrono::steady_clock;
clock::time_point startTime;
clock::time_point endTime;
clock::duration encoderTime;
unsigned int seed = 163331;
/* or use this to get a fresh sequence each time the program is run.
std::random_device rd; //Will be used to obtain a seed for the random number engine
std::mt19937 generator(rd()); //Standard mersenne_twister_engine seeded with rd()
*/
std::mt19937 generator(seed); //Standard mersenne_twister_engine
std::uniform_real_distribution<> rDist(0, 1);
if (argc < 4) {
printf("usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n" );
exit(-1);
}
infoLeng = atoi(argv[1]);
rnum = atoi(argv[2]);
rdenom = atoi(argv[3]);
sprintf(alistFile, "./G_and_H_Matrices/H_%d%d_%d.alist", rnum, rdenom, infoLeng);
sprintf(wROM_File, "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary", rnum, rdenom, infoLeng);
src = fopen(alistFile, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", alistFile);
return(EXIT_FAILURE);
}
fscanf(src,"%d", &numBits);
fscanf(src ,"%d", &numChecks);
fscanf(src,"%d", &maxChecksForBit);
fscanf(src,"%d", &maxBitsForCheck);
fclose(src);
src = fopen(wROM_File, "r");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", wROM_File);
return(EXIT_FAILURE);
}
fread(& numRowsW, sizeof(unsigned int), 1, src);
fread(& numColsW, sizeof(unsigned int), 1, src);
fread(& shiftRegLength, sizeof(unsigned int), 1, src);
W_ROW_ROM = (unsigned int*) malloc(numRowsW * numColsW * sizeof( unsigned int));
fread(W_ROW_ROM, sizeof(unsigned int), numRowsW * numColsW, src);
fclose(src);
printf("parameters have been read.\n");
printf("numBits = %i, numChecks = %i\n", numBits, numChecks);
printf("Max checks for bit: %i Max bits for check %i\n", maxChecksForBit, maxBitsForCheck);
// ///////////////////////////////////////////
unsigned int* infoWord;
unsigned int* codeWord;
infoWord = (unsigned int *)malloc(infoLeng * sizeof(unsigned int));
codeWord = (unsigned int *)malloc(numBits * sizeof(unsigned int));
for (unsigned int j=0; j < infoLeng; j++) {
// infoWord[j] = (0.5 >= rDist(generator))? 1:0;
infoWord[j] = j % 2;
}
startTime = clock::now();
ldpcEncoder(infoWord, W_ROW_ROM, infoLeng, numRowsW, numColsW, shiftRegLength, codeWord);
endTime = clock::now();
encoderTime = endTime - startTime;
printf("Time for encoder: %i microsec\n",
std::chrono::duration_cast<std::chrono::microseconds>(encoderTime).count());
char encodedFile[256];
sprintf(encodedFile, "./evenodd%d.encoded", numBits);
src = fopen(encodedFile, "w");
if (src == NULL) {
errnum = errno;
printf("Value of errno: %d\n", errnum);
perror("Error printed by perror");
printf("Error opening file %s\n", encodedFile);
return(EXIT_FAILURE);
}
for(unsigned int j=0; j<numBits; j++) fprintf(src,"%d\n", codeWord[j]);
fclose(src);
// Debug.
// unsigned int numParityBits = numColsW;
// for (unsigned int j=0; j< numParityBits; j++) {
// printf(" %i", codeWord[infoLeng+j]);
// if ( (j % 40) == 39) { printf("\n"); }
// }
// printf("\n");
} | .text
.file "TestEncoder.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $824, %rsp # imm = 0x338
.cfi_def_cfa_offset 880
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl $1, %eax
movl $163331, %ecx # imm = 0x27E03
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
movq %rcx, %rdx
shrq $30, %rdx
xorl %ecx, %edx
imull $1812433253, %edx, %ecx # imm = 0x6C078965
addl %eax, %ecx
incq %rax
cmpq $624, %rax # imm = 0x270
jne .LBB0_1
# %bb.2: # %_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em.exit
cmpl $3, %edi
jle .LBB0_18
# %bb.3:
movq 8(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
leaq 560(%rsp), %r12
movl $.L.str.1, %esi
movq %r12, %rdi
movl %r15d, %edx
movl %r14d, %ecx
movl %ebx, %r8d
xorl %eax, %eax
callq sprintf
leaq 48(%rsp), %rdi
movl $.L.str.2, %esi
movl %r15d, %edx
movl %r14d, %ecx
movl %ebx, %r8d
xorl %eax, %eax
callq sprintf
movl $.L.str.3, %esi
movq %r12, %rdi
callq fopen
testq %rax, %rax
je .LBB0_4
# %bb.5:
movq %rax, %r14
leaq 16(%rsp), %rdx
movl $.L.str.7, %esi
movq %rax, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 44(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 36(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 40(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
movq %r14, %rdi
callq fclose
leaq 48(%rsp), %rdi
movl $.L.str.3, %esi
callq fopen
testq %rax, %rax
je .LBB0_6
# %bb.7:
movq %rax, %r14
leaq 32(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fread
leaq 28(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r14, %rcx
callq fread
leaq 24(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r14, %rcx
callq fread
movl 32(%rsp), %ebp
movl 28(%rsp), %eax
movl %eax, 20(%rsp) # 4-byte Spill
movl %eax, %r13d
imull %ebp, %r13d
leaq (,%r13,4), %rdi
callq malloc
movq %rax, %r12
movl $4, %esi
movq %rax, %rdi
movq %r13, %rdx
movq %r14, %rcx
callq fread
movq %r14, %rdi
callq fclose
movl $.Lstr, %edi
callq puts@PLT
movl 16(%rsp), %esi
movl 44(%rsp), %edx
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 36(%rsp), %esi
movl 40(%rsp), %edx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl %ebx, %edi
shlq $2, %rdi
callq malloc
movq %rax, %r13
movl 16(%rsp), %edi
shlq $2, %rdi
callq malloc
movq %rax, %r14
testl %ebx, %ebx
je .LBB0_10
# %bb.8: # %.lr.ph.preheader
movl %ebx, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB0_9: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, %edx
andl $1, %edx
movl %edx, (%r13,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB0_9
.LBB0_10: # %._crit_edge
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movl 24(%rsp), %r9d
movq %r14, (%rsp)
movq %r13, %rdi
movq %r12, %rsi
movl %ebx, %edx
movl %ebp, %ecx
movl 20(%rsp), %r8d # 4-byte Reload
callq _Z11ldpcEncoderPjS_jjjjS_
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
movabsq $2361183241434822607, %rcx # imm = 0x20C49BA5E353F7CF
imulq %rcx
movq %rdx, %rsi
shrq $63, %rsi
sarq $7, %rdx
addq %rdx, %rsi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 16(%rsp), %edx
leaq 304(%rsp), %rbx
movl $.L.str.12, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq sprintf
movl $.L.str.13, %esi
movq %rbx, %rdi
callq fopen
testq %rax, %rax
je .LBB0_15
# %bb.11: # %.preheader
movq %rax, %rbx
cmpl $0, 16(%rsp)
je .LBB0_14
# %bb.12: # %.lr.ph60.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_13: # %.lr.ph60
# =>This Inner Loop Header: Depth=1
movl (%r14,%r15,4), %edx
movl $.L.str.14, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq fprintf
incq %r15
movl 16(%rsp), %eax
cmpq %rax, %r15
jb .LBB0_13
.LBB0_14: # %._crit_edge61
movq %rbx, %rdi
callq fclose
xorl %eax, %eax
.LBB0_17:
addq $824, %rsp # imm = 0x338
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_4:
.cfi_def_cfa_offset 880
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 560(%rsp), %rsi
jmp .LBB0_16
.LBB0_6:
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 48(%rsp), %rsi
jmp .LBB0_16
.LBB0_15:
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 304(%rsp), %rsi
.LBB0_16:
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl $1, %eax
jmp .LBB0_17
.LBB0_18:
movl $.Lstr.1, %edi
callq puts@PLT
movl $-1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "./G_and_H_Matrices/H_%d%d_%d.alist"
.size .L.str.1, 35
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary"
.size .L.str.2, 44
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "r"
.size .L.str.3, 2
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Value of errno: %d\n"
.size .L.str.4, 20
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Error printed by perror"
.size .L.str.5, 24
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Error opening file %s\n"
.size .L.str.6, 23
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "%d"
.size .L.str.7, 3
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "numBits = %i, numChecks = %i\n"
.size .L.str.9, 30
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Max checks for bit: %i Max bits for check %i\n"
.size .L.str.10, 47
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Time for encoder: %i microsec\n"
.size .L.str.11, 31
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "./evenodd%d.encoded"
.size .L.str.12, 20
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "w"
.size .L.str.13, 2
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "%d\n"
.size .L.str.14, 4
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "parameters have been read."
.size .Lstr, 27
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "usage: TestEncoder <infoLength> <r-numerator> <r-denominator>"
.size .Lstr.1, 63
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000155dc_00000000-6_TestEncoder.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4252:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4252:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "usage: TestEncoder <infoLength> <r-numerator> <r-denominator>\n"
.align 8
.LC1:
.string "./G_and_H_Matrices/H_%d%d_%d.alist"
.align 8
.LC2:
.string "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "r"
.LC4:
.string "Value of errno: %d\n"
.LC5:
.string "Error printed by perror"
.LC6:
.string "Error opening file %s\n"
.LC7:
.string "%d"
.LC8:
.string "parameters have been read.\n"
.LC9:
.string "numBits = %i, numChecks = %i\n"
.section .rodata.str1.8
.align 8
.LC10:
.string "Max checks for bit: %i Max bits for check %i\n"
.align 8
.LC11:
.string "Time for encoder: %i microsec\n"
.section .rodata.str1.1
.LC12:
.string "./evenodd%d.encoded"
.LC13:
.string "w"
.LC14:
.string "%d\n"
.text
.globl main
.type main, @function
main:
.LFB4240:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $840, %rsp
.cfi_def_cfa_offset 896
movq %rsi, %r12
movq %fs:40, %rax
movq %rax, 824(%rsp)
xorl %eax, %eax
movl $623, %ebx
.L4:
subq $1, %rbx
jne .L4
cmpl $3, %edi
jle .L20
movq 8(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movl %eax, 12(%rsp)
movq 16(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r13
movq 24(%r12), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r12
leaq 48(%rsp), %r14
subq $8, %rsp
.cfi_def_cfa_offset 904
pushq %rbp
.cfi_def_cfa_offset 912
movl %eax, %r9d
movl %r13d, %r8d
leaq .LC1(%rip), %rcx
movl $256, %edx
movl $2, %esi
movq %r14, %rdi
movl $0, %eax
call __sprintf_chk@PLT
leaq 320(%rsp), %rdi
movl %ebp, (%rsp)
movl %r12d, %r9d
movl %r13d, %r8d
leaq .LC2(%rip), %rcx
movl $256, %edx
movl $2, %esi
movl $0, %eax
call __sprintf_chk@PLT
addq $16, %rsp
.cfi_def_cfa_offset 896
leaq .LC3(%rip), %rsi
movq %r14, %rdi
call fopen@PLT
movq %rax, %r12
testq %rax, %rax
je .L21
leaq 24(%rsp), %rdx
leaq .LC7(%rip), %r13
movq %r13, %rsi
movq %rax, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 20(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 32(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
leaq 28(%rsp), %rdx
movq %r13, %rsi
movq %r12, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
movq %r12, %rdi
call fclose@PLT
leaq 304(%rsp), %rdi
leaq .LC3(%rip), %rsi
call fopen@PLT
movq %rax, %r12
testq %rax, %rax
je .L22
leaq 36(%rsp), %rdi
movq %rax, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 40(%rsp), %rdi
movq %r12, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 44(%rsp), %rdi
movq %r12, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
movl 36(%rsp), %r14d
imull 40(%rsp), %r14d
leaq 0(,%r14,4), %r15
movq %r15, %rdi
call malloc@PLT
movq %rax, %r13
movq %r12, %r8
movq %r14, %rcx
movl $4, %edx
movq %r15, %rsi
movq %rax, %rdi
call __fread_chk@PLT
movq %r12, %rdi
call fclose@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 20(%rsp), %ecx
movl 24(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 28(%rsp), %ecx
movl 32(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edi
salq $2, %rdi
call malloc@PLT
movq %rax, %r14
movl 24(%rsp), %edi
salq $2, %rdi
call malloc@PLT
movq %rax, %r12
testl %ebp, %ebp
je .L9
movl %ebp, %ebp
movq %rbx, %rax
.L10:
movl %eax, %edx
andl $1, %edx
movl %edx, (%r14,%rax,4)
addq $1, %rax
cmpq %rax, %rbp
jne .L10
.L9:
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
movq %rax, %rbp
subq $8, %rsp
.cfi_def_cfa_offset 904
pushq %r12
.cfi_def_cfa_offset 912
movl 60(%rsp), %r9d
movl 56(%rsp), %r8d
movl 52(%rsp), %ecx
movl 28(%rsp), %edx
movq %r13, %rsi
movq %r14, %rdi
call _Z11ldpcEncoderPjS_jjjjS_@PLT
call _ZNSt6chrono3_V212steady_clock3nowEv@PLT
addq $16, %rsp
.cfi_def_cfa_offset 896
subq %rbp, %rax
movq %rax, %rcx
movabsq $2361183241434822607, %rdx
imulq %rdx
sarq $7, %rdx
sarq $63, %rcx
subq %rcx, %rdx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 560(%rsp), %rbp
movl 24(%rsp), %r8d
leaq .LC12(%rip), %rcx
movl $256, %edx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __sprintf_chk@PLT
leaq .LC13(%rip), %rsi
movq %rbp, %rdi
call fopen@PLT
movq %rax, %rbp
testq %rax, %rax
je .L11
leaq .LC14(%rip), %r13
cmpl $0, 24(%rsp)
je .L13
.L12:
movl (%r12,%rbx,4), %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $1, %rbx
cmpl 24(%rsp), %ebx
jb .L12
.L13:
movq %rbp, %rdi
call fclose@PLT
movl $0, %eax
.L3:
movq 824(%rsp), %rdx
subq %fs:40, %rdx
jne .L23
addq $840, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L21:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
movq %r14, %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L22:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
leaq 304(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L11:
call __errno_location@PLT
movl (%rax), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rdi
call perror@PLT
leaq 560(%rsp), %rdx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L23:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4240:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4275:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4275:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "TestEncoder.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $824, %rsp # imm = 0x338
.cfi_def_cfa_offset 880
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r14
movl $1, %eax
movl $163331, %ecx # imm = 0x27E03
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
movq %rcx, %rdx
shrq $30, %rdx
xorl %ecx, %edx
imull $1812433253, %edx, %ecx # imm = 0x6C078965
addl %eax, %ecx
incq %rax
cmpq $624, %rax # imm = 0x270
jne .LBB0_1
# %bb.2: # %_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em.exit
cmpl $3, %edi
jle .LBB0_18
# %bb.3:
movq 8(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
leaq 560(%rsp), %r12
movl $.L.str.1, %esi
movq %r12, %rdi
movl %r15d, %edx
movl %r14d, %ecx
movl %ebx, %r8d
xorl %eax, %eax
callq sprintf
leaq 48(%rsp), %rdi
movl $.L.str.2, %esi
movl %r15d, %edx
movl %r14d, %ecx
movl %ebx, %r8d
xorl %eax, %eax
callq sprintf
movl $.L.str.3, %esi
movq %r12, %rdi
callq fopen
testq %rax, %rax
je .LBB0_4
# %bb.5:
movq %rax, %r14
leaq 16(%rsp), %rdx
movl $.L.str.7, %esi
movq %rax, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 44(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 36(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
leaq 40(%rsp), %rdx
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq __isoc23_fscanf
movq %r14, %rdi
callq fclose
leaq 48(%rsp), %rdi
movl $.L.str.3, %esi
callq fopen
testq %rax, %rax
je .LBB0_6
# %bb.7:
movq %rax, %r14
leaq 32(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fread
leaq 28(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r14, %rcx
callq fread
leaq 24(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r14, %rcx
callq fread
movl 32(%rsp), %ebp
movl 28(%rsp), %eax
movl %eax, 20(%rsp) # 4-byte Spill
movl %eax, %r13d
imull %ebp, %r13d
leaq (,%r13,4), %rdi
callq malloc
movq %rax, %r12
movl $4, %esi
movq %rax, %rdi
movq %r13, %rdx
movq %r14, %rcx
callq fread
movq %r14, %rdi
callq fclose
movl $.Lstr, %edi
callq puts@PLT
movl 16(%rsp), %esi
movl 44(%rsp), %edx
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 36(%rsp), %esi
movl 40(%rsp), %edx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl %ebx, %edi
shlq $2, %rdi
callq malloc
movq %rax, %r13
movl 16(%rsp), %edi
shlq $2, %rdi
callq malloc
movq %rax, %r14
testl %ebx, %ebx
je .LBB0_10
# %bb.8: # %.lr.ph.preheader
movl %ebx, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB0_9: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, %edx
andl $1, %edx
movl %edx, (%r13,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB0_9
.LBB0_10: # %._crit_edge
callq _ZNSt6chrono3_V212steady_clock3nowEv
movq %rax, %r15
movl 24(%rsp), %r9d
movq %r14, (%rsp)
movq %r13, %rdi
movq %r12, %rsi
movl %ebx, %edx
movl %ebp, %ecx
movl 20(%rsp), %r8d # 4-byte Reload
callq _Z11ldpcEncoderPjS_jjjjS_
callq _ZNSt6chrono3_V212steady_clock3nowEv
subq %r15, %rax
movabsq $2361183241434822607, %rcx # imm = 0x20C49BA5E353F7CF
imulq %rcx
movq %rdx, %rsi
shrq $63, %rsi
sarq $7, %rdx
addq %rdx, %rsi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 16(%rsp), %edx
leaq 304(%rsp), %rbx
movl $.L.str.12, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq sprintf
movl $.L.str.13, %esi
movq %rbx, %rdi
callq fopen
testq %rax, %rax
je .LBB0_15
# %bb.11: # %.preheader
movq %rax, %rbx
cmpl $0, 16(%rsp)
je .LBB0_14
# %bb.12: # %.lr.ph60.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_13: # %.lr.ph60
# =>This Inner Loop Header: Depth=1
movl (%r14,%r15,4), %edx
movl $.L.str.14, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq fprintf
incq %r15
movl 16(%rsp), %eax
cmpq %rax, %r15
jb .LBB0_13
.LBB0_14: # %._crit_edge61
movq %rbx, %rdi
callq fclose
xorl %eax, %eax
.LBB0_17:
addq $824, %rsp # imm = 0x338
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_4:
.cfi_def_cfa_offset 880
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 560(%rsp), %rsi
jmp .LBB0_16
.LBB0_6:
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 48(%rsp), %rsi
jmp .LBB0_16
.LBB0_15:
callq __errno_location
movl (%rax), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
callq perror
leaq 304(%rsp), %rsi
.LBB0_16:
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl $1, %eax
jmp .LBB0_17
.LBB0_18:
movl $.Lstr.1, %edi
callq puts@PLT
movl $-1, %edi
callq exit
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "./G_and_H_Matrices/H_%d%d_%d.alist"
.size .L.str.1, 35
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "./G_and_H_Matrices/W_ROW_ROM_%d%d_%d.binary"
.size .L.str.2, 44
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "r"
.size .L.str.3, 2
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Value of errno: %d\n"
.size .L.str.4, 20
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Error printed by perror"
.size .L.str.5, 24
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Error opening file %s\n"
.size .L.str.6, 23
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "%d"
.size .L.str.7, 3
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "numBits = %i, numChecks = %i\n"
.size .L.str.9, 30
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Max checks for bit: %i Max bits for check %i\n"
.size .L.str.10, 47
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Time for encoder: %i microsec\n"
.size .L.str.11, 31
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "./evenodd%d.encoded"
.size .L.str.12, 20
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "w"
.size .L.str.13, 2
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "%d\n"
.size .L.str.14, 4
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "parameters have been read."
.size .Lstr, 27
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "usage: TestEncoder <infoLength> <r-numerator> <r-denominator>"
.size .Lstr.1, 63
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
cudaDeviceProp prop;
cudaGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
cudaGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream;
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError();
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream; //PLACE YOUR CODE HERE
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError(); //error handling
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
cudaFree((void* ) d_data); //free devide data
cudaFreeHost(hi_data); //free up the host memory
cudaFreeHost(hf_data); //free up the host memory
cudaDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} | code for sm_80
Function : _Z26gpu_shared_array_operationPjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE.U32 R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0005 */
/*0070*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */
/* 0x000ea8000c1e1900 */
/*0080*/ STS [R0.X4], R5 ; /* 0x0000000500007388 */
/* 0x004fe80000004800 */
/*0090*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*00a0*/ LDS R4, [R0.X4] ; /* 0x0000000000047984 */
/* 0x000e240000004800 */
/*00b0*/ IMAD R7, R4, R4, RZ ; /* 0x0000000404077224 */
/* 0x001fca00078e02ff */
/*00c0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe8000c101904 */
/*00d0*/ STS [R0.X4], R7 ; /* 0x0000000700007388 */
/* 0x000fe20000004800 */
/*00e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z28gpu_register_array_operationPjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R5, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0005 */
/*0070*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0080*/ IMAD R5, R0, R0, RZ ; /* 0x0000000000057224 */
/* 0x004fca00078e02ff */
/*0090*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
cudaDeviceProp prop;
cudaGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
cudaGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream;
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError();
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream; //PLACE YOUR CODE HERE
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError(); //error handling
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
cudaFree((void* ) d_data); //free devide data
cudaFreeHost(hi_data); //free up the host memory
cudaFreeHost(hf_data); //free up the host memory
cudaDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} | .file "tmpxft_001a1db7_00000000-6_module7_stretch_problem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2067:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z18generate_rand_dataPjj
.type _Z18generate_rand_dataPjj, @function
_Z18generate_rand_dataPjj:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
je .L8
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movl %esi, %esi
leaq (%rdi,%rsi,4), %rbp
.L5:
call rand@PLT
cltd
shrl $30, %edx
addl %edx, %eax
andl $3, %eax
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2057:
.size _Z18generate_rand_dataPjj, .-_Z18generate_rand_dataPjj
.globl _Z19copy_data_to_sharedPjS_j
.type _Z19copy_data_to_sharedPjS_j, @function
_Z19copy_data_to_sharedPjS_j:
.LFB2058:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2058:
.size _Z19copy_data_to_sharedPjS_j, .-_Z19copy_data_to_sharedPjS_j
.globl _Z25simple_squaring_operationPjj
.type _Z25simple_squaring_operationPjj, @function
_Z25simple_squaring_operationPjj:
.LFB2059:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z25simple_squaring_operationPjj, .-_Z25simple_squaring_operationPjj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Yes"
.LC1:
.string "No"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "============Start Device %x============\n"
.align 8
.LC3:
.string "Name: %s\n"
.align 8
.LC4:
.string "Total global memory: %lu\n"
.align 8
.LC5:
.string "Total shared memory per block: %lu\n"
.align 8
.LC6:
.string "Total registers per block: %d\n"
.align 8
.LC7:
.string "Warp size: %d\n"
.align 8
.LC8:
.string "Maximum memory pitch: %lu\n"
.align 8
.LC9:
.string "Maximum threads per block: %d\n"
.align 8
.LC10:
.string "Maximum dimension %d of block: %d\n"
.align 8
.LC11:
.string "Maximum dimension %d of grid: %d\n"
.align 8
.LC12:
.string "Total constant memory: %lu\n"
.align 8
.LC13:
.string "Major revision number: %d\n"
.align 8
.LC14:
.string "Minor revision number: %d\n"
.align 8
.LC15:
.string "Clock rate: %d\n"
.align 8
.LC16:
.string "Texture alignment: %lu\n"
.align 8
.LC17:
.string "Concurrent copy and execution: %s\n"
.align 8
.LC18:
.string "Number of multiprocessors: %d\n"
.align 8
.LC19:
.string "Kernel execution timeout: %s\n"
.align 8
.LC20:
.string "Integrated: %s\n"
.align 8
.LC21:
.string "Mapable Host Memory: %s\n"
.align 8
.LC22:
.string "Compute Mode: %d\n"
.align 8
.LC23:
.string "Concurrent Kernels: %d\n"
.align 8
.LC24:
.string "ECC Enabled: %s\n"
.align 8
.LC25:
.string "pci Bus ID: %d\n"
.align 8
.LC26:
.string "pci Device ID: %d\n"
.align 8
.LC27:
.string "Using a tcc Driver: %s\n"
.align 8
.LC28:
.string "============End Device %x============\n"
.text
.globl _Z27print_all_device_propertiesi
.type _Z27print_all_device_propertiesi, @function
_Z27print_all_device_propertiesi:
.LFB2060:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1040, %rsp
.cfi_def_cfa_offset 1072
movl %edi, %ebp
movq %fs:40, %rax
movq %rax, 1032(%rsp)
xorl %eax, %eax
movq %rsp, %rbx
movl %edi, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebp, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbx, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 288(%rsp), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 296(%rsp), %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 304(%rsp), %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 308(%rsp), %edx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebx
leaq .LC10(%rip), %r12
.L16:
movl 324(%rsp,%rbx,4), %ecx
movl %ebx, %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $3, %rbx
jne .L16
movl $0, %ebx
leaq .LC11(%rip), %r12
.L17:
movl 336(%rsp,%rbx,4), %ecx
movl %ebx, %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $3, %rbx
jne .L17
movq 352(%rsp), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 384(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 388(%rsp), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 392(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 396(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 400(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 576(%rsp), %edx
leaq .LC23(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 580(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC24(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 584(%rsp), %edx
leaq .LC25(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 588(%rsp), %edx
leaq .LC26(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 596(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC27(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L34
addq $1040, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z27print_all_device_propertiesi, .-_Z27print_all_device_propertiesi
.section .rodata.str1.8
.align 8
.LC29:
.string "Print of all CUDA devices and device properties\n"
.text
.globl _Z37print_all_CUDA_devices_and_propertiesv
.type _Z37print_all_CUDA_devices_and_propertiesv, @function
_Z37print_all_CUDA_devices_and_propertiesv:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $16, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 4(%rsp), %edi
testl %edi, %edi
jle .L35
movl $0, %ebx
.L37:
call _Z27print_all_device_propertiesi
addl $1, %ebx
movl 4(%rsp), %edi
cmpl %ebx, %edi
jg .L37
.L35:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L41
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size _Z37print_all_CUDA_devices_and_propertiesv, .-_Z37print_all_CUDA_devices_and_propertiesv
.globl _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
.type _Z49__device_stub__Z28gpu_register_array_operationPjjPjj, @function
_Z49__device_stub__Z28gpu_register_array_operationPjjPjj:
.LFB2089:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L46
.L42:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L47
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z28gpu_register_array_operationPjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L42
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2089:
.size _Z49__device_stub__Z28gpu_register_array_operationPjjPjj, .-_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
.globl _Z28gpu_register_array_operationPjj
.type _Z28gpu_register_array_operationPjj, @function
_Z28gpu_register_array_operationPjj:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _Z28gpu_register_array_operationPjj, .-_Z28gpu_register_array_operationPjj
.section .rodata.str1.8
.align 8
.LC31:
.string "Input value: %x, device output: %x\n"
.text
.globl _Z34execute_register_memory_operationsv
.type _Z34execute_register_memory_operationsv, @function
_Z34execute_register_memory_operationsv:
.LFB2062:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $152, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $0x00000000, 4(%rsp)
leaq 16(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 24(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 32(%rsp), %rdi
call cudaStreamCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 8(%rsp), %rdi
movl $32, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rbx
movl $8, %esi
movq %rbx, %rdi
call _Z18generate_rand_dataPjj
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L56
.L51:
movq 32(%rsp), %rdi
call cudaStreamSynchronize@PLT
call cudaGetLastError@PLT
leaq 96(%rsp), %rdi
movl $2, %ecx
movl $32, %edx
movq 8(%rsp), %rsi
call cudaMemcpy@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
leaq .LC31(%rip), %rbp
.L52:
movl 96(%rsp,%rbx), %ecx
movl 64(%rsp,%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $32, %rbx
jne .L52
movss 4(%rsp), %xmm0
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L57
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L56:
.cfi_restore_state
movl $8, %esi
movq 8(%rsp), %rdi
call _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
jmp .L51
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size _Z34execute_register_memory_operationsv, .-_Z34execute_register_memory_operationsv
.globl _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
.type _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, @function
_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj:
.LFB2091:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L62
.L58:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L63
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L62:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z26gpu_shared_array_operationPjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L58
.L63:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2091:
.size _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, .-_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
.globl _Z26gpu_shared_array_operationPjj
.type _Z26gpu_shared_array_operationPjj, @function
_Z26gpu_shared_array_operationPjj:
.LFB2092:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2092:
.size _Z26gpu_shared_array_operationPjj, .-_Z26gpu_shared_array_operationPjj
.globl _Z32execute_shared_memory_operationsv
.type _Z32execute_shared_memory_operationsv, @function
_Z32execute_shared_memory_operationsv:
.LFB2063:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $152, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $0x00000000, 4(%rsp)
leaq 16(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 24(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 32(%rsp), %rdi
call cudaStreamCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 8(%rsp), %rdi
movl $32, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rbx
movl $8, %esi
movq %rbx, %rdi
call _Z18generate_rand_dataPjj
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L72
.L67:
movq 32(%rsp), %rdi
call cudaStreamSynchronize@PLT
call cudaGetLastError@PLT
leaq 96(%rsp), %rdi
movl $2, %ecx
movl $32, %edx
movq 8(%rsp), %rsi
call cudaMemcpy@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
leaq .LC31(%rip), %rbp
.L68:
movl 96(%rsp,%rbx), %ecx
movl 64(%rsp,%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $32, %rbx
jne .L68
movq 8(%rsp), %rdi
call cudaFree@PLT
leaq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 96(%rsp), %rdi
call cudaFreeHost@PLT
call cudaDeviceReset@PLT
movss 4(%rsp), %xmm0
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L73
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L72:
.cfi_restore_state
movl $8, %esi
movq 8(%rsp), %rdi
call _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
jmp .L67
.L73:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2063:
.size _Z32execute_shared_memory_operationsv, .-_Z32execute_shared_memory_operationsv
.section .rodata.str1.1
.LC32:
.string "========================\n"
.LC33:
.string "Summary\n"
.LC34:
.string "Total Threads: %d\n"
.LC35:
.string "Total Blocks: %d\n"
.section .rodata.str1.8
.align 8
.LC36:
.string "Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n"
.section .rodata.str1.1
.LC37:
.string "duration: %fms\n"
.section .rodata.str1.8
.align 8
.LC38:
.string "Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n"
.text
.globl main
.type main, @function
main:
.LFB2064:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
call _Z37print_all_CUDA_devices_and_propertiesv
call _Z32execute_shared_memory_operationsv
movss %xmm0, 8(%rsp)
call _Z34execute_register_memory_operationsv
movss %xmm0, 12(%rsp)
leaq .LC32(%rip), %rbx
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $8, %edx
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edx
leaq .LC35(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC36(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 8(%rsp), %xmm0
leaq .LC37(%rip), %rbp
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC38(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $0, %eax
addq $24, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC39:
.string "_Z26gpu_shared_array_operationPjj"
.align 8
.LC40:
.string "_Z28gpu_register_array_operationPjj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2094:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC39(%rip), %rdx
movq %rdx, %rcx
leaq _Z26gpu_shared_array_operationPjj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC40(%rip), %rdx
movq %rdx, %rcx
leaq _Z28gpu_register_array_operationPjj(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2094:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
cudaDeviceProp prop;
cudaGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
cudaGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream;
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError();
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
cudaEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
cudaEventCreate(&kernel_start,0);
cudaEventCreate(&kernel_stop,0);
//set CUDA stream
cudaStream_t stream; //PLACE YOUR CODE HERE
cudaStreamCreate(&stream);
//start timing metric
cudaEventRecord(kernel_start, 0);
//device memory alloc
cudaMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
cudaMemcpy(d_data, hi_data, num_bytes, cudaMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
cudaStreamSynchronize(stream); // Wait for the GPU launched work to complete
cudaGetLastError(); //error handling
//copy from device to host memory
cudaMemcpy(hf_data, d_data, num_bytes, cudaMemcpyDeviceToHost);
//end timing metric
cudaEventRecord(kernel_stop, 0);
cudaEventSynchronize(kernel_stop);
cudaEventElapsedTime(&delta, kernel_start, kernel_stop);
cudaEventDestroy(kernel_start);
cudaEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
cudaFree((void* ) d_data); //free devide data
cudaFreeHost(hi_data); //free up the host memory
cudaFreeHost(hf_data); //free up the host memory
cudaDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
hipDeviceProp_t prop;
hipGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
hipGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream;
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError();
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream; //PLACE YOUR CODE HERE
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError(); //error handling
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
hipFree((void* ) d_data); //free devide data
hipHostFree(hi_data); //free up the host memory
hipHostFree(hf_data); //free up the host memory
hipDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
hipDeviceProp_t prop;
hipGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
hipGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream;
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError();
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream; //PLACE YOUR CODE HERE
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError(); //error handling
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
hipFree((void* ) d_data); //free devide data
hipHostFree(hi_data); //free up the host memory
hipHostFree(hf_data); //free up the host memory
hipDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z28gpu_register_array_operationPjj
.globl _Z28gpu_register_array_operationPjj
.p2align 8
.type _Z28gpu_register_array_operationPjj,@function
_Z28gpu_register_array_operationPjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, v2, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z28gpu_register_array_operationPjj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z28gpu_register_array_operationPjj, .Lfunc_end0-_Z28gpu_register_array_operationPjj
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z26gpu_shared_array_operationPjj
.globl _Z26gpu_shared_array_operationPjj
.p2align 8
.type _Z26gpu_shared_array_operationPjj,@function
_Z26gpu_shared_array_operationPjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v0, v1
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v0, v0, v0
ds_store_b32 v1, v0
global_store_b32 v[2:3], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z26gpu_shared_array_operationPjj
.amdhsa_group_segment_fixed_size 32
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z26gpu_shared_array_operationPjj, .Lfunc_end1-_Z26gpu_shared_array_operationPjj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z28gpu_register_array_operationPjj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z28gpu_register_array_operationPjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 32
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z26gpu_shared_array_operationPjj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z26gpu_shared_array_operationPjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h> // for pow()
#define NUM_THREADS 8
#define NUM_BLOCKS 1
__host__ void generate_rand_data(unsigned int * data, unsigned int num_elements)
{
for(unsigned int i=0; i < num_elements; i++)
{
data[i] = rand() % 4; //PLACE YOUR CODE HERE
}
}
__device__ void copy_data_to_shared(unsigned int * const data,
unsigned int * const shared_tmp,
const unsigned int tid)
{
// Copy data into shared memory
shared_tmp[tid] = data[tid];
__syncthreads();
}
__device__ void simple_squaring_operation(unsigned int * const data,
const unsigned int tid)
{
//square the mem value and overwrite
data[tid] = data[tid] * data[tid]; //PLACE YOUR CODE HERE
}
__global__ void gpu_register_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//perform some simple operation
simple_squaring_operation(data, tid);
}
__global__ void gpu_shared_array_operation(unsigned int * const data, const unsigned int num_elements)
{
const unsigned int tid = (blockIdx.x * blockDim.x) + threadIdx.x;
//allocate shared memory
__shared__ unsigned int shared_tmp[NUM_THREADS];
//make a copy of the global device data into the shared device memory
copy_data_to_shared(data, shared_tmp, tid);
//perform some simple operation
simple_squaring_operation(shared_tmp, tid);
//push updated shared mem back to the initial global data mem
data[tid] = shared_tmp[tid];
}
//tier 2 method for printing a specific cuda device properties
//already called by the tier 1 method
void print_all_device_properties(int device_id){
hipDeviceProp_t prop;
hipGetDeviceProperties( &prop, device_id);
// printf("============Start Device %x============\n", device_id);
// printf("Name: %s\n", prop.name);
// printf("Total global memory: %lu\n", prop.totalGlobalMem);
// printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
// printf("Total registers per block: %lu\n", (unsigned long)prop.regsPerBlock);
// printf("Warp size: %lu\n", (unsigned long)prop.warpSize);
// printf("Maximum memory pitch: %lu\n", prop.memPitch);
// printf("Maximum threads per block: %lu\n", (unsigned long)prop.maxThreadsPerBlock);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of block: %lu\n", i, (unsigned long)prop.maxThreadsDim[i]);
// for (int i = 0; i < 3; ++i)
// printf("Maximum dimension %d of grid: %lu\n", i, (unsigned long)prop.maxGridSize[i]);
// printf("Total constant memory: %lu\n", prop.totalConstMem);
// printf("Major revision number: %lu\n", (unsigned long)prop.major);
// printf("Minor revision number: %lu\n", (unsigned long)prop.minor);
// printf("Clock rate: %lu\n", (unsigned long)prop.clockRate);
// printf("Texture alignment: %lu\n", prop.textureAlignment);
// printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
// printf("Number of multiprocessors: %lu\n", (unsigned long)prop.multiProcessorCount);
// printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
// printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
// printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
// printf("Compute Mode: %d\n", prop.computeMode);
// printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
// printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
// printf("pci Bus ID: %lu\n", (unsigned long)prop.pciBusID);
// printf("pci Device ID: %lu\n", (unsigned long)prop.pciDeviceID);
// printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
// printf("============End Device %x============\n", device_id);
printf("============Start Device %x============\n", device_id);
printf("Name: %s\n", prop.name);
printf("Total global memory: %lu\n", prop.totalGlobalMem);
printf("Total shared memory per block: %lu\n", prop.sharedMemPerBlock);
printf("Total registers per block: %d\n", prop.regsPerBlock);
printf("Warp size: %d\n", prop.warpSize);
printf("Maximum memory pitch: %lu\n", prop.memPitch);
printf("Maximum threads per block: %d\n", prop.maxThreadsPerBlock);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of block: %d\n", i, prop.maxThreadsDim[i]);
for (int i = 0; i < 3; ++i)
printf("Maximum dimension %d of grid: %d\n", i, prop.maxGridSize[i]);
printf("Total constant memory: %lu\n", prop.totalConstMem);
printf("Major revision number: %d\n", prop.major);
printf("Minor revision number: %d\n", prop.minor);
printf("Clock rate: %d\n", prop.clockRate);
printf("Texture alignment: %lu\n", prop.textureAlignment);
printf("Concurrent copy and execution: %s\n", (prop.deviceOverlap ? "Yes" : "No"));
printf("Number of multiprocessors: %d\n", prop.multiProcessorCount);
printf("Kernel execution timeout: %s\n", (prop.kernelExecTimeoutEnabled ? "Yes" : "No"));
printf("Integrated: %s\n", (prop.integrated ? "Yes" : "No"));
printf("Mapable Host Memory: %s\n", (prop.canMapHostMemory ? "Yes" : "No"));
printf("Compute Mode: %d\n", prop.computeMode);
printf("Concurrent Kernels: %d\n", prop.concurrentKernels);
printf("ECC Enabled: %s\n", (prop.ECCEnabled ? "Yes" : "No"));
printf("pci Bus ID: %d\n", prop.pciBusID);
printf("pci Device ID: %d\n", prop.pciDeviceID);
printf("Using a tcc Driver: %s\n", (prop.tccDriver ? "Yes" : "No"));
printf("============End Device %x============\n", device_id);
}
//tier 1 method for printing all cuda devices and their properties
void print_all_CUDA_devices_and_properties() {
int device_id;
hipGetDeviceCount( &device_id);
printf("Print of all CUDA devices and device properties\n");
for (int i = 0; i < device_id; i++){
//states that cudaDeviceProp returns a 25 data types in a struct
print_all_device_properties(device_id);
}
}
__host__ float execute_register_memory_operations(void)
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream;
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernel <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_register_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError();
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
//PLACE YOUR CODE HERE
return delta;
}
__host__ float execute_shared_memory_operations()
{
const unsigned int num_elements = NUM_THREADS;
const unsigned int num_bytes = NUM_THREADS * sizeof(unsigned int);
unsigned int * d_data; //device data
unsigned int hi_data[num_elements]; //initial host data
unsigned int hf_data[num_elements]; //final host data
/* Set timing Metrics */
hipEvent_t kernel_start, kernel_stop;
float delta = 0.0F;
hipEventCreateWithFlags(&kernel_start,0);
hipEventCreateWithFlags(&kernel_stop,0);
//set CUDA stream
hipStream_t stream; //PLACE YOUR CODE HERE
hipStreamCreate(&stream);
//start timing metric
hipEventRecord(kernel_start, 0);
//device memory alloc
hipMalloc(&d_data, num_bytes);
//populate the initial host array with random data
generate_rand_data(hi_data, num_elements);
//copy from host memory to device memory
hipMemcpy(d_data, hi_data, num_bytes, hipMemcpyHostToDevice);
//Call GPU kernels <<<BLOCK TOTAL, THREADS TOTAL>>>
gpu_shared_array_operation<<<NUM_BLOCKS, NUM_THREADS>>>(d_data, num_elements);
//sync the cuda stream
hipStreamSynchronize(stream); // Wait for the GPU launched work to complete
hipGetLastError(); //error handling
//copy from device to host memory
hipMemcpy(hf_data, d_data, num_bytes, hipMemcpyDeviceToHost);
//end timing metric
hipEventRecord(kernel_stop, 0);
hipEventSynchronize(kernel_stop);
hipEventElapsedTime(&delta, kernel_start, kernel_stop);
hipEventDestroy(kernel_start);
hipEventDestroy(kernel_stop);
//console print the host data after the GPU kernal
for (int i = 0; i < num_elements; i++){
printf("Input value: %x, device output: %x\n", hi_data[i], hf_data[i]);
}
//free device and host memory allocations
hipFree((void* ) d_data); //free devide data
hipHostFree(hi_data); //free up the host memory
hipHostFree(hf_data); //free up the host memory
hipDeviceReset();
return delta;
}
/**
* Host function that prepares data array and passes it to the CUDA kernel.
*/
int main(void) {
//print all cuda devices and device properties for kicks
print_all_CUDA_devices_and_properties();
//test harness for timing some kernels using streams and events
float delta_shared = execute_shared_memory_operations(); //PLACE YOUR CODE HERE TO USE SHARED MEMORY FOR OPERATIONS
float delta_register = execute_register_memory_operations();//PLACE YOUR CODE HERE TO USE REGISTER MEMORY FOR OPERATIONS
//print out the results of the time executions returned by the prev methods
printf("========================\n");
printf("Summary\n");
printf("Total Threads: %d\n", NUM_THREADS);
printf("Total Blocks: %d\n", NUM_BLOCKS);
printf("========================\n");
printf("Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n");
printf("duration: %fms\n",delta_shared);
printf("========================\n");
printf("Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n");
printf("duration: %fms\n",delta_register);
return 0;
} | .text
.file "module7_stretch_problem.hip"
.globl _Z18generate_rand_dataPjj # -- Begin function _Z18generate_rand_dataPjj
.p2align 4, 0x90
.type _Z18generate_rand_dataPjj,@function
_Z18generate_rand_dataPjj: # @_Z18generate_rand_dataPjj
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB0_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB0_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB0_4: # %._crit_edge
retq
.Lfunc_end0:
.size _Z18generate_rand_dataPjj, .Lfunc_end0-_Z18generate_rand_dataPjj
.cfi_endproc
# -- End function
.globl _Z43__device_stub__gpu_register_array_operationPjj # -- Begin function _Z43__device_stub__gpu_register_array_operationPjj
.p2align 4, 0x90
.type _Z43__device_stub__gpu_register_array_operationPjj,@function
_Z43__device_stub__gpu_register_array_operationPjj: # @_Z43__device_stub__gpu_register_array_operationPjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z28gpu_register_array_operationPjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z43__device_stub__gpu_register_array_operationPjj, .Lfunc_end1-_Z43__device_stub__gpu_register_array_operationPjj
.cfi_endproc
# -- End function
.globl _Z41__device_stub__gpu_shared_array_operationPjj # -- Begin function _Z41__device_stub__gpu_shared_array_operationPjj
.p2align 4, 0x90
.type _Z41__device_stub__gpu_shared_array_operationPjj,@function
_Z41__device_stub__gpu_shared_array_operationPjj: # @_Z41__device_stub__gpu_shared_array_operationPjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z26gpu_shared_array_operationPjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end2:
.size _Z41__device_stub__gpu_shared_array_operationPjj, .Lfunc_end2-_Z41__device_stub__gpu_shared_array_operationPjj
.cfi_endproc
# -- End function
.globl _Z27print_all_device_propertiesi # -- Begin function _Z27print_all_device_propertiesi
.p2align 4, 0x90
.type _Z27print_all_device_propertiesi,@function
_Z27print_all_device_propertiesi: # @_Z27print_all_device_propertiesi
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1472, %rsp # imm = 0x5C0
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %edi, %ebx
movq %rsp, %r14
movq %r14, %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %edi
movl %ebx, %esi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movq 288(%rsp), %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq 296(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movl 304(%rsp), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 308(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movq 312(%rsp), %rsi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 320(%rsp), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_1: # =>This Inner Loop Header: Depth=1
movl 324(%rsp,%r14,4), %edx
movl $.L.str.8, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq $3, %r14
jne .LBB3_1
# %bb.2: # %.preheader.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_3: # %.preheader
# =>This Inner Loop Header: Depth=1
movl 336(%rsp,%r14,4), %edx
movl $.L.str.9, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq $3, %r14
jne .LBB3_3
# %bb.4:
movq 352(%rsp), %rsi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 360(%rsp), %esi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 364(%rsp), %esi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 348(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movq 368(%rsp), %rsi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
cmpl $0, 384(%rsp)
movl $.L.str.17, %r15d
movl $.L.str.16, %r14d
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 388(%rsp), %esi
movl $.L.str.18, %edi
xorl %eax, %eax
callq printf
cmpl $0, 392(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.19, %edi
xorl %eax, %eax
callq printf
cmpl $0, 396(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.20, %edi
xorl %eax, %eax
callq printf
cmpl $0, 400(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.21, %edi
xorl %eax, %eax
callq printf
movl 404(%rsp), %esi
movl $.L.str.22, %edi
xorl %eax, %eax
callq printf
movl 576(%rsp), %esi
movl $.L.str.23, %edi
xorl %eax, %eax
callq printf
cmpl $0, 580(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.24, %edi
xorl %eax, %eax
callq printf
movl 584(%rsp), %esi
movl $.L.str.25, %edi
xorl %eax, %eax
callq printf
movl 588(%rsp), %esi
movl $.L.str.26, %edi
xorl %eax, %eax
callq printf
cmpl $0, 596(%rsp)
cmoveq %r15, %r14
movl $.L.str.27, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.28, %edi
movl %ebx, %esi
xorl %eax, %eax
callq printf
addq $1472, %rsp # imm = 0x5C0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z27print_all_device_propertiesi, .Lfunc_end3-_Z27print_all_device_propertiesi
.cfi_endproc
# -- End function
.globl _Z37print_all_CUDA_devices_and_propertiesv # -- Begin function _Z37print_all_CUDA_devices_and_propertiesv
.p2align 4, 0x90
.type _Z37print_all_CUDA_devices_and_propertiesv,@function
_Z37print_all_CUDA_devices_and_propertiesv: # @_Z37print_all_CUDA_devices_and_propertiesv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl $.Lstr, %edi
callq puts@PLT
movl 12(%rsp), %edi
testl %edi, %edi
jle .LBB4_3
# %bb.1: # %.lr.ph.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq _Z27print_all_device_propertiesi
incl %ebx
movl 12(%rsp), %edi
cmpl %edi, %ebx
jl .LBB4_2
.LBB4_3: # %._crit_edge
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z37print_all_CUDA_devices_and_propertiesv, .Lfunc_end4-_Z37print_all_CUDA_devices_and_propertiesv
.cfi_endproc
# -- End function
.globl _Z34execute_register_memory_operationsv # -- Begin function _Z34execute_register_memory_operationsv
.p2align 4, 0x90
.type _Z34execute_register_memory_operationsv,@function
_Z34execute_register_memory_operationsv: # @_Z34execute_register_memory_operationsv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $176, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -16
movl $0, 12(%rsp)
leaq 24(%rsp), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 48(%rsp), %rdi
callq hipStreamCreate
movq 24(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 32(%rsp), %rdi
movl $32, %esi
callq hipMalloc
.p2align 4, 0x90
.LBB5_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, 144(%rsp,%rbx,4)
incq %rbx
cmpq $8, %rbx
jne .LBB5_1
# %bb.2: # %_Z18generate_rand_dataPjj.exit
movq 32(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $32, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 7(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_4
# %bb.3:
movq 32(%rsp), %rax
movq %rax, 104(%rsp)
movl $8, 44(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 44(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z28gpu_register_array_operationPjj, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_4:
movq 48(%rsp), %rdi
callq hipStreamSynchronize
callq hipGetLastError
movq 32(%rsp), %rsi
leaq 112(%rsp), %rdi
movl $32, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB5_5: # =>This Inner Loop Header: Depth=1
movl 144(%rsp,%rbx,4), %esi
movl 112(%rsp,%rbx,4), %edx
movl $.L.str.30, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $8, %rbx
jne .LBB5_5
# %bb.6:
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addq $176, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _Z34execute_register_memory_operationsv, .Lfunc_end5-_Z34execute_register_memory_operationsv
.cfi_endproc
# -- End function
.globl _Z32execute_shared_memory_operationsv # -- Begin function _Z32execute_shared_memory_operationsv
.p2align 4, 0x90
.type _Z32execute_shared_memory_operationsv,@function
_Z32execute_shared_memory_operationsv: # @_Z32execute_shared_memory_operationsv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $176, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -16
movl $0, 12(%rsp)
leaq 32(%rsp), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 48(%rsp), %rdi
callq hipStreamCreate
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 24(%rsp), %rdi
movl $32, %esi
callq hipMalloc
.p2align 4, 0x90
.LBB6_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, 144(%rsp,%rbx,4)
incq %rbx
cmpq $8, %rbx
jne .LBB6_1
# %bb.2: # %_Z18generate_rand_dataPjj.exit
movq 24(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $32, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 7(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_4
# %bb.3:
movq 24(%rsp), %rax
movq %rax, 104(%rsp)
movl $8, 44(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 44(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z26gpu_shared_array_operationPjj, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_4:
movq 48(%rsp), %rdi
callq hipStreamSynchronize
callq hipGetLastError
movq 24(%rsp), %rsi
leaq 112(%rsp), %rdi
movl $32, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 32(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB6_5: # =>This Inner Loop Header: Depth=1
movl 144(%rsp,%rbx,4), %esi
movl 112(%rsp,%rbx,4), %edx
movl $.L.str.30, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $8, %rbx
jne .LBB6_5
# %bb.6:
movq 24(%rsp), %rdi
callq hipFree
leaq 144(%rsp), %rdi
callq hipHostFree
leaq 112(%rsp), %rdi
callq hipHostFree
callq hipDeviceReset
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addq $176, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _Z32execute_shared_memory_operationsv, .Lfunc_end6-_Z32execute_shared_memory_operationsv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
movl $.Lstr, %edi
callq puts@PLT
movl 4(%rsp), %edi
testl %edi, %edi
jle .LBB7_3
# %bb.1: # %.lr.ph.i.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB7_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq _Z27print_all_device_propertiesi
incl %ebx
movl 4(%rsp), %edi
cmpl %edi, %ebx
jl .LBB7_2
.LBB7_3: # %_Z37print_all_CUDA_devices_and_propertiesv.exit
callq _Z32execute_shared_memory_operationsv
movss %xmm0, 8(%rsp) # 4-byte Spill
callq _Z34execute_register_memory_operationsv
movss %xmm0, 12(%rsp) # 4-byte Spill
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.2, %edi
callq puts@PLT
movl $.L.str.33, %edi
movl $8, %esi
xorl %eax, %eax
callq printf
movl $.L.str.34, %edi
movl $1, %esi
xorl %eax, %eax
callq printf
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.4, %edi
callq puts@PLT
movss 8(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.36, %edi
movb $1, %al
callq printf
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.6, %edi
callq puts@PLT
movss 12(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.36, %edi
movb $1, %al
callq printf
xorl %eax, %eax
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size main, .Lfunc_end7-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB8_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB8_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z28gpu_register_array_operationPjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z26gpu_shared_array_operationPjj, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end8:
.size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB9_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB9_2:
retq
.Lfunc_end9:
.size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z28gpu_register_array_operationPjj,@object # @_Z28gpu_register_array_operationPjj
.section .rodata,"a",@progbits
.globl _Z28gpu_register_array_operationPjj
.p2align 3, 0x0
_Z28gpu_register_array_operationPjj:
.quad _Z43__device_stub__gpu_register_array_operationPjj
.size _Z28gpu_register_array_operationPjj, 8
.type _Z26gpu_shared_array_operationPjj,@object # @_Z26gpu_shared_array_operationPjj
.globl _Z26gpu_shared_array_operationPjj
.p2align 3, 0x0
_Z26gpu_shared_array_operationPjj:
.quad _Z41__device_stub__gpu_shared_array_operationPjj
.size _Z26gpu_shared_array_operationPjj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "============Start Device %x============\n"
.size .L.str, 41
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Name: %s\n"
.size .L.str.1, 35
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Total global memory: %lu\n"
.size .L.str.2, 36
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Total shared memory per block: %lu\n"
.size .L.str.3, 36
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Total registers per block: %d\n"
.size .L.str.4, 35
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Warp size: %d\n"
.size .L.str.5, 35
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Maximum memory pitch: %lu\n"
.size .L.str.6, 36
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Maximum threads per block: %d\n"
.size .L.str.7, 35
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Maximum dimension %d of block: %d\n"
.size .L.str.8, 35
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Maximum dimension %d of grid: %d\n"
.size .L.str.9, 35
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Total constant memory: %lu\n"
.size .L.str.10, 36
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Major revision number: %d\n"
.size .L.str.11, 35
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Minor revision number: %d\n"
.size .L.str.12, 35
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Clock rate: %d\n"
.size .L.str.13, 35
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Texture alignment: %lu\n"
.size .L.str.14, 36
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Concurrent copy and execution: %s\n"
.size .L.str.15, 35
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Yes"
.size .L.str.16, 4
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "No"
.size .L.str.17, 3
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz "Number of multiprocessors: %d\n"
.size .L.str.18, 35
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "Kernel execution timeout: %s\n"
.size .L.str.19, 35
.type .L.str.20,@object # @.str.20
.L.str.20:
.asciz "Integrated: %s\n"
.size .L.str.20, 35
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "Mapable Host Memory: %s\n"
.size .L.str.21, 35
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "Compute Mode: %d\n"
.size .L.str.22, 35
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "Concurrent Kernels: %d\n"
.size .L.str.23, 35
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "ECC Enabled: %s\n"
.size .L.str.24, 35
.type .L.str.25,@object # @.str.25
.L.str.25:
.asciz "pci Bus ID: %d\n"
.size .L.str.25, 35
.type .L.str.26,@object # @.str.26
.L.str.26:
.asciz "pci Device ID: %d\n"
.size .L.str.26, 35
.type .L.str.27,@object # @.str.27
.L.str.27:
.asciz "Using a tcc Driver: %s\n"
.size .L.str.27, 35
.type .L.str.28,@object # @.str.28
.L.str.28:
.asciz "============End Device %x============\n"
.size .L.str.28, 39
.type .L.str.30,@object # @.str.30
.L.str.30:
.asciz "Input value: %x, device output: %x\n"
.size .L.str.30, 36
.type .L.str.33,@object # @.str.33
.L.str.33:
.asciz "Total Threads: %d\n"
.size .L.str.33, 19
.type .L.str.34,@object # @.str.34
.L.str.34:
.asciz "Total Blocks: %d\n"
.size .L.str.34, 18
.type .L.str.36,@object # @.str.36
.L.str.36:
.asciz "duration: %fms\n"
.size .L.str.36, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z28gpu_register_array_operationPjj"
.size .L__unnamed_1, 36
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z26gpu_shared_array_operationPjj"
.size .L__unnamed_2, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Print of all CUDA devices and device properties"
.size .Lstr, 48
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Summary"
.size .Lstr.2, 8
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global"
.size .Lstr.4, 105
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "========================"
.size .Lstr.5, 25
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global"
.size .Lstr.6, 109
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z43__device_stub__gpu_register_array_operationPjj
.addrsig_sym _Z41__device_stub__gpu_shared_array_operationPjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z28gpu_register_array_operationPjj
.addrsig_sym _Z26gpu_shared_array_operationPjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z26gpu_shared_array_operationPjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE.U32 R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0005 */
/*0070*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */
/* 0x000ea8000c1e1900 */
/*0080*/ STS [R0.X4], R5 ; /* 0x0000000500007388 */
/* 0x004fe80000004800 */
/*0090*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*00a0*/ LDS R4, [R0.X4] ; /* 0x0000000000047984 */
/* 0x000e240000004800 */
/*00b0*/ IMAD R7, R4, R4, RZ ; /* 0x0000000404077224 */
/* 0x001fca00078e02ff */
/*00c0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe8000c101904 */
/*00d0*/ STS [R0.X4], R7 ; /* 0x0000000700007388 */
/* 0x000fe20000004800 */
/*00e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z28gpu_register_array_operationPjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0060*/ IMAD.WIDE.U32 R2, R2, R5, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0005 */
/*0070*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */
/* 0x000ea4000c1e1900 */
/*0080*/ IMAD R5, R0, R0, RZ ; /* 0x0000000000057224 */
/* 0x004fca00078e02ff */
/*0090*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z28gpu_register_array_operationPjj
.globl _Z28gpu_register_array_operationPjj
.p2align 8
.type _Z28gpu_register_array_operationPjj,@function
_Z28gpu_register_array_operationPjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v2, v2, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z28gpu_register_array_operationPjj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 3
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z28gpu_register_array_operationPjj, .Lfunc_end0-_Z28gpu_register_array_operationPjj
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z26gpu_shared_array_operationPjj
.globl _Z26gpu_shared_array_operationPjj
.p2align 8
.type _Z26gpu_shared_array_operationPjj,@function
_Z26gpu_shared_array_operationPjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_lshlrev_b32_e32 v1, 2, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v0, v[2:3], off
s_waitcnt vmcnt(0)
ds_store_b32 v1, v0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v0, v1
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v0, v0, v0
ds_store_b32 v1, v0
global_store_b32 v[2:3], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z26gpu_shared_array_operationPjj
.amdhsa_group_segment_fixed_size 32
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z26gpu_shared_array_operationPjj, .Lfunc_end1-_Z26gpu_shared_array_operationPjj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z28gpu_register_array_operationPjj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z28gpu_register_array_operationPjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 3
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 32
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z26gpu_shared_array_operationPjj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z26gpu_shared_array_operationPjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a1db7_00000000-6_module7_stretch_problem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2067:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z18generate_rand_dataPjj
.type _Z18generate_rand_dataPjj, @function
_Z18generate_rand_dataPjj:
.LFB2057:
.cfi_startproc
endbr64
testl %esi, %esi
je .L8
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movl %esi, %esi
leaq (%rdi,%rsi,4), %rbp
.L5:
call rand@PLT
cltd
shrl $30, %edx
addl %edx, %eax
andl $3, %eax
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L5
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2057:
.size _Z18generate_rand_dataPjj, .-_Z18generate_rand_dataPjj
.globl _Z19copy_data_to_sharedPjS_j
.type _Z19copy_data_to_sharedPjS_j, @function
_Z19copy_data_to_sharedPjS_j:
.LFB2058:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2058:
.size _Z19copy_data_to_sharedPjS_j, .-_Z19copy_data_to_sharedPjS_j
.globl _Z25simple_squaring_operationPjj
.type _Z25simple_squaring_operationPjj, @function
_Z25simple_squaring_operationPjj:
.LFB2059:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2059:
.size _Z25simple_squaring_operationPjj, .-_Z25simple_squaring_operationPjj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Yes"
.LC1:
.string "No"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "============Start Device %x============\n"
.align 8
.LC3:
.string "Name: %s\n"
.align 8
.LC4:
.string "Total global memory: %lu\n"
.align 8
.LC5:
.string "Total shared memory per block: %lu\n"
.align 8
.LC6:
.string "Total registers per block: %d\n"
.align 8
.LC7:
.string "Warp size: %d\n"
.align 8
.LC8:
.string "Maximum memory pitch: %lu\n"
.align 8
.LC9:
.string "Maximum threads per block: %d\n"
.align 8
.LC10:
.string "Maximum dimension %d of block: %d\n"
.align 8
.LC11:
.string "Maximum dimension %d of grid: %d\n"
.align 8
.LC12:
.string "Total constant memory: %lu\n"
.align 8
.LC13:
.string "Major revision number: %d\n"
.align 8
.LC14:
.string "Minor revision number: %d\n"
.align 8
.LC15:
.string "Clock rate: %d\n"
.align 8
.LC16:
.string "Texture alignment: %lu\n"
.align 8
.LC17:
.string "Concurrent copy and execution: %s\n"
.align 8
.LC18:
.string "Number of multiprocessors: %d\n"
.align 8
.LC19:
.string "Kernel execution timeout: %s\n"
.align 8
.LC20:
.string "Integrated: %s\n"
.align 8
.LC21:
.string "Mapable Host Memory: %s\n"
.align 8
.LC22:
.string "Compute Mode: %d\n"
.align 8
.LC23:
.string "Concurrent Kernels: %d\n"
.align 8
.LC24:
.string "ECC Enabled: %s\n"
.align 8
.LC25:
.string "pci Bus ID: %d\n"
.align 8
.LC26:
.string "pci Device ID: %d\n"
.align 8
.LC27:
.string "Using a tcc Driver: %s\n"
.align 8
.LC28:
.string "============End Device %x============\n"
.text
.globl _Z27print_all_device_propertiesi
.type _Z27print_all_device_propertiesi, @function
_Z27print_all_device_propertiesi:
.LFB2060:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1040, %rsp
.cfi_def_cfa_offset 1072
movl %edi, %ebp
movq %fs:40, %rax
movq %rax, 1032(%rsp)
xorl %eax, %eax
movq %rsp, %rbx
movl %edi, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebp, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbx, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 288(%rsp), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 296(%rsp), %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 304(%rsp), %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 308(%rsp), %edx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %ebx
leaq .LC10(%rip), %r12
.L16:
movl 324(%rsp,%rbx,4), %ecx
movl %ebx, %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $3, %rbx
jne .L16
movl $0, %ebx
leaq .LC11(%rip), %r12
.L17:
movl 336(%rsp,%rbx,4), %ecx
movl %ebx, %edx
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $3, %rbx
jne .L17
movq 352(%rsp), %rdx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %edx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 384(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 388(%rsp), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 392(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 396(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 400(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 576(%rsp), %edx
leaq .LC23(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 580(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC24(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 584(%rsp), %edx
leaq .LC25(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 588(%rsp), %edx
leaq .LC26(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpl $0, 596(%rsp)
leaq .LC1(%rip), %rdx
leaq .LC0(%rip), %rax
cmovne %rax, %rdx
leaq .LC27(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L34
addq $1040, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z27print_all_device_propertiesi, .-_Z27print_all_device_propertiesi
.section .rodata.str1.8
.align 8
.LC29:
.string "Print of all CUDA devices and device properties\n"
.text
.globl _Z37print_all_CUDA_devices_and_propertiesv
.type _Z37print_all_CUDA_devices_and_propertiesv, @function
_Z37print_all_CUDA_devices_and_propertiesv:
.LFB2061:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $16, %rsp
.cfi_def_cfa_offset 32
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
leaq .LC29(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 4(%rsp), %edi
testl %edi, %edi
jle .L35
movl $0, %ebx
.L37:
call _Z27print_all_device_propertiesi
addl $1, %ebx
movl 4(%rsp), %edi
cmpl %ebx, %edi
jg .L37
.L35:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L41
addq $16, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size _Z37print_all_CUDA_devices_and_propertiesv, .-_Z37print_all_CUDA_devices_and_propertiesv
.globl _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
.type _Z49__device_stub__Z28gpu_register_array_operationPjjPjj, @function
_Z49__device_stub__Z28gpu_register_array_operationPjjPjj:
.LFB2089:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L46
.L42:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L47
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L46:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z28gpu_register_array_operationPjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L42
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2089:
.size _Z49__device_stub__Z28gpu_register_array_operationPjjPjj, .-_Z49__device_stub__Z28gpu_register_array_operationPjjPjj
.globl _Z28gpu_register_array_operationPjj
.type _Z28gpu_register_array_operationPjj, @function
_Z28gpu_register_array_operationPjj:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _Z28gpu_register_array_operationPjj, .-_Z28gpu_register_array_operationPjj
.section .rodata.str1.8
.align 8
.LC31:
.string "Input value: %x, device output: %x\n"
.text
.globl _Z34execute_register_memory_operationsv
.type _Z34execute_register_memory_operationsv, @function
_Z34execute_register_memory_operationsv:
.LFB2062:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $152, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $0x00000000, 4(%rsp)
leaq 16(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 24(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 32(%rsp), %rdi
call cudaStreamCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 8(%rsp), %rdi
movl $32, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rbx
movl $8, %esi
movq %rbx, %rdi
call _Z18generate_rand_dataPjj
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L56
.L51:
movq 32(%rsp), %rdi
call cudaStreamSynchronize@PLT
call cudaGetLastError@PLT
leaq 96(%rsp), %rdi
movl $2, %ecx
movl $32, %edx
movq 8(%rsp), %rsi
call cudaMemcpy@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
leaq .LC31(%rip), %rbp
.L52:
movl 96(%rsp,%rbx), %ecx
movl 64(%rsp,%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $32, %rbx
jne .L52
movss 4(%rsp), %xmm0
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L57
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L56:
.cfi_restore_state
movl $8, %esi
movq 8(%rsp), %rdi
call _Z49__device_stub__Z28gpu_register_array_operationPjjPjj
jmp .L51
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size _Z34execute_register_memory_operationsv, .-_Z34execute_register_memory_operationsv
.globl _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
.type _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, @function
_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj:
.LFB2091:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L62
.L58:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L63
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L62:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z26gpu_shared_array_operationPjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L58
.L63:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2091:
.size _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj, .-_Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
.globl _Z26gpu_shared_array_operationPjj
.type _Z26gpu_shared_array_operationPjj, @function
_Z26gpu_shared_array_operationPjj:
.LFB2092:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2092:
.size _Z26gpu_shared_array_operationPjj, .-_Z26gpu_shared_array_operationPjj
.globl _Z32execute_shared_memory_operationsv
.type _Z32execute_shared_memory_operationsv, @function
_Z32execute_shared_memory_operationsv:
.LFB2063:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $152, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $0x00000000, 4(%rsp)
leaq 16(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 24(%rsp), %rdi
movl $0, %esi
call cudaEventCreateWithFlags@PLT
leaq 32(%rsp), %rdi
call cudaStreamCreate@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
leaq 8(%rsp), %rdi
movl $32, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rbx
movl $8, %esi
movq %rbx, %rdi
call _Z18generate_rand_dataPjj
movl $1, %ecx
movl $32, %edx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L72
.L67:
movq 32(%rsp), %rdi
call cudaStreamSynchronize@PLT
call cudaGetLastError@PLT
leaq 96(%rsp), %rdi
movl $2, %ecx
movl $32, %edx
movq 8(%rsp), %rsi
call cudaMemcpy@PLT
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
leaq .LC31(%rip), %rbp
.L68:
movl 96(%rsp,%rbx), %ecx
movl 64(%rsp,%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq $32, %rbx
jne .L68
movq 8(%rsp), %rdi
call cudaFree@PLT
leaq 64(%rsp), %rdi
call cudaFreeHost@PLT
leaq 96(%rsp), %rdi
call cudaFreeHost@PLT
call cudaDeviceReset@PLT
movss 4(%rsp), %xmm0
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L73
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L72:
.cfi_restore_state
movl $8, %esi
movq 8(%rsp), %rdi
call _Z47__device_stub__Z26gpu_shared_array_operationPjjPjj
jmp .L67
.L73:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2063:
.size _Z32execute_shared_memory_operationsv, .-_Z32execute_shared_memory_operationsv
.section .rodata.str1.1
.LC32:
.string "========================\n"
.LC33:
.string "Summary\n"
.LC34:
.string "Total Threads: %d\n"
.LC35:
.string "Total Blocks: %d\n"
.section .rodata.str1.8
.align 8
.LC36:
.string "Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global\n"
.section .rodata.str1.1
.LC37:
.string "duration: %fms\n"
.section .rodata.str1.8
.align 8
.LC38:
.string "Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global\n"
.text
.globl main
.type main, @function
main:
.LFB2064:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
call _Z37print_all_CUDA_devices_and_propertiesv
call _Z32execute_shared_memory_operationsv
movss %xmm0, 8(%rsp)
call _Z34execute_register_memory_operationsv
movss %xmm0, 12(%rsp)
leaq .LC32(%rip), %rbx
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC33(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $8, %edx
leaq .LC34(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edx
leaq .LC35(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC36(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 8(%rsp), %xmm0
leaq .LC37(%rip), %rbp
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC38(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtss2sd 12(%rsp), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $0, %eax
addq $24, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC39:
.string "_Z26gpu_shared_array_operationPjj"
.align 8
.LC40:
.string "_Z28gpu_register_array_operationPjj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2094:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC39(%rip), %rdx
movq %rdx, %rcx
leaq _Z26gpu_shared_array_operationPjj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC40(%rip), %rdx
movq %rdx, %rcx
leaq _Z28gpu_register_array_operationPjj(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2094:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "module7_stretch_problem.hip"
.globl _Z18generate_rand_dataPjj # -- Begin function _Z18generate_rand_dataPjj
.p2align 4, 0x90
.type _Z18generate_rand_dataPjj,@function
_Z18generate_rand_dataPjj: # @_Z18generate_rand_dataPjj
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB0_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB0_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB0_4: # %._crit_edge
retq
.Lfunc_end0:
.size _Z18generate_rand_dataPjj, .Lfunc_end0-_Z18generate_rand_dataPjj
.cfi_endproc
# -- End function
.globl _Z43__device_stub__gpu_register_array_operationPjj # -- Begin function _Z43__device_stub__gpu_register_array_operationPjj
.p2align 4, 0x90
.type _Z43__device_stub__gpu_register_array_operationPjj,@function
_Z43__device_stub__gpu_register_array_operationPjj: # @_Z43__device_stub__gpu_register_array_operationPjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z28gpu_register_array_operationPjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z43__device_stub__gpu_register_array_operationPjj, .Lfunc_end1-_Z43__device_stub__gpu_register_array_operationPjj
.cfi_endproc
# -- End function
.globl _Z41__device_stub__gpu_shared_array_operationPjj # -- Begin function _Z41__device_stub__gpu_shared_array_operationPjj
.p2align 4, 0x90
.type _Z41__device_stub__gpu_shared_array_operationPjj,@function
_Z41__device_stub__gpu_shared_array_operationPjj: # @_Z41__device_stub__gpu_shared_array_operationPjj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z26gpu_shared_array_operationPjj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end2:
.size _Z41__device_stub__gpu_shared_array_operationPjj, .Lfunc_end2-_Z41__device_stub__gpu_shared_array_operationPjj
.cfi_endproc
# -- End function
.globl _Z27print_all_device_propertiesi # -- Begin function _Z27print_all_device_propertiesi
.p2align 4, 0x90
.type _Z27print_all_device_propertiesi,@function
_Z27print_all_device_propertiesi: # @_Z27print_all_device_propertiesi
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1472, %rsp # imm = 0x5C0
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl %edi, %ebx
movq %rsp, %r14
movq %r14, %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %edi
movl %ebx, %esi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movq 288(%rsp), %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq 296(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movl 304(%rsp), %esi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 308(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movq 312(%rsp), %rsi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movl 320(%rsp), %esi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_1: # =>This Inner Loop Header: Depth=1
movl 324(%rsp,%r14,4), %edx
movl $.L.str.8, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq $3, %r14
jne .LBB3_1
# %bb.2: # %.preheader.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_3: # %.preheader
# =>This Inner Loop Header: Depth=1
movl 336(%rsp,%r14,4), %edx
movl $.L.str.9, %edi
movl %r14d, %esi
xorl %eax, %eax
callq printf
incq %r14
cmpq $3, %r14
jne .LBB3_3
# %bb.4:
movq 352(%rsp), %rsi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 360(%rsp), %esi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 364(%rsp), %esi
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 348(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movq 368(%rsp), %rsi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
cmpl $0, 384(%rsp)
movl $.L.str.17, %r15d
movl $.L.str.16, %r14d
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 388(%rsp), %esi
movl $.L.str.18, %edi
xorl %eax, %eax
callq printf
cmpl $0, 392(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.19, %edi
xorl %eax, %eax
callq printf
cmpl $0, 396(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.20, %edi
xorl %eax, %eax
callq printf
cmpl $0, 400(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.21, %edi
xorl %eax, %eax
callq printf
movl 404(%rsp), %esi
movl $.L.str.22, %edi
xorl %eax, %eax
callq printf
movl 576(%rsp), %esi
movl $.L.str.23, %edi
xorl %eax, %eax
callq printf
cmpl $0, 580(%rsp)
movl $.L.str.16, %esi
cmoveq %r15, %rsi
movl $.L.str.24, %edi
xorl %eax, %eax
callq printf
movl 584(%rsp), %esi
movl $.L.str.25, %edi
xorl %eax, %eax
callq printf
movl 588(%rsp), %esi
movl $.L.str.26, %edi
xorl %eax, %eax
callq printf
cmpl $0, 596(%rsp)
cmoveq %r15, %r14
movl $.L.str.27, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.28, %edi
movl %ebx, %esi
xorl %eax, %eax
callq printf
addq $1472, %rsp # imm = 0x5C0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z27print_all_device_propertiesi, .Lfunc_end3-_Z27print_all_device_propertiesi
.cfi_endproc
# -- End function
.globl _Z37print_all_CUDA_devices_and_propertiesv # -- Begin function _Z37print_all_CUDA_devices_and_propertiesv
.p2align 4, 0x90
.type _Z37print_all_CUDA_devices_and_propertiesv,@function
_Z37print_all_CUDA_devices_and_propertiesv: # @_Z37print_all_CUDA_devices_and_propertiesv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl $.Lstr, %edi
callq puts@PLT
movl 12(%rsp), %edi
testl %edi, %edi
jle .LBB4_3
# %bb.1: # %.lr.ph.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq _Z27print_all_device_propertiesi
incl %ebx
movl 12(%rsp), %edi
cmpl %edi, %ebx
jl .LBB4_2
.LBB4_3: # %._crit_edge
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z37print_all_CUDA_devices_and_propertiesv, .Lfunc_end4-_Z37print_all_CUDA_devices_and_propertiesv
.cfi_endproc
# -- End function
.globl _Z34execute_register_memory_operationsv # -- Begin function _Z34execute_register_memory_operationsv
.p2align 4, 0x90
.type _Z34execute_register_memory_operationsv,@function
_Z34execute_register_memory_operationsv: # @_Z34execute_register_memory_operationsv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $176, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -16
movl $0, 12(%rsp)
leaq 24(%rsp), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 48(%rsp), %rdi
callq hipStreamCreate
movq 24(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 32(%rsp), %rdi
movl $32, %esi
callq hipMalloc
.p2align 4, 0x90
.LBB5_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, 144(%rsp,%rbx,4)
incq %rbx
cmpq $8, %rbx
jne .LBB5_1
# %bb.2: # %_Z18generate_rand_dataPjj.exit
movq 32(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $32, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 7(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_4
# %bb.3:
movq 32(%rsp), %rax
movq %rax, 104(%rsp)
movl $8, 44(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 44(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z28gpu_register_array_operationPjj, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_4:
movq 48(%rsp), %rdi
callq hipStreamSynchronize
callq hipGetLastError
movq 32(%rsp), %rsi
leaq 112(%rsp), %rdi
movl $32, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 24(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movq 24(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB5_5: # =>This Inner Loop Header: Depth=1
movl 144(%rsp,%rbx,4), %esi
movl 112(%rsp,%rbx,4), %edx
movl $.L.str.30, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $8, %rbx
jne .LBB5_5
# %bb.6:
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addq $176, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _Z34execute_register_memory_operationsv, .Lfunc_end5-_Z34execute_register_memory_operationsv
.cfi_endproc
# -- End function
.globl _Z32execute_shared_memory_operationsv # -- Begin function _Z32execute_shared_memory_operationsv
.p2align 4, 0x90
.type _Z32execute_shared_memory_operationsv,@function
_Z32execute_shared_memory_operationsv: # @_Z32execute_shared_memory_operationsv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $176, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -16
movl $0, 12(%rsp)
leaq 32(%rsp), %rdi
xorl %ebx, %ebx
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventCreateWithFlags
leaq 48(%rsp), %rdi
callq hipStreamCreate
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leaq 24(%rsp), %rdi
movl $32, %esi
callq hipMalloc
.p2align 4, 0x90
.LBB6_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
# kill: def $eax killed $eax def $rax
leal 3(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-4, %ecx
subl %ecx, %eax
movl %eax, 144(%rsp,%rbx,4)
incq %rbx
cmpq $8, %rbx
jne .LBB6_1
# %bb.2: # %_Z18generate_rand_dataPjj.exit
movq 24(%rsp), %rdi
leaq 144(%rsp), %rsi
movl $32, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 7(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_4
# %bb.3:
movq 24(%rsp), %rax
movq %rax, 104(%rsp)
movl $8, 44(%rsp)
leaq 104(%rsp), %rax
movq %rax, 112(%rsp)
leaq 44(%rsp), %rax
movq %rax, 120(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z26gpu_shared_array_operationPjj, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_4:
movq 48(%rsp), %rdi
callq hipStreamSynchronize
callq hipGetLastError
movq 24(%rsp), %rsi
leaq 112(%rsp), %rdi
movl $32, %edx
movl $2, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 16(%rsp), %rdi
callq hipEventSynchronize
movq 32(%rsp), %rsi
movq 16(%rsp), %rdx
leaq 12(%rsp), %rdi
callq hipEventElapsedTime
movq 32(%rsp), %rdi
callq hipEventDestroy
movq 16(%rsp), %rdi
callq hipEventDestroy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB6_5: # =>This Inner Loop Header: Depth=1
movl 144(%rsp,%rbx,4), %esi
movl 112(%rsp,%rbx,4), %edx
movl $.L.str.30, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $8, %rbx
jne .LBB6_5
# %bb.6:
movq 24(%rsp), %rdi
callq hipFree
leaq 144(%rsp), %rdi
callq hipHostFree
leaq 112(%rsp), %rdi
callq hipHostFree
callq hipDeviceReset
movss 12(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
addq $176, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _Z32execute_shared_memory_operationsv, .Lfunc_end6-_Z32execute_shared_memory_operationsv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
movl $.Lstr, %edi
callq puts@PLT
movl 4(%rsp), %edi
testl %edi, %edi
jle .LBB7_3
# %bb.1: # %.lr.ph.i.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB7_2: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq _Z27print_all_device_propertiesi
incl %ebx
movl 4(%rsp), %edi
cmpl %edi, %ebx
jl .LBB7_2
.LBB7_3: # %_Z37print_all_CUDA_devices_and_propertiesv.exit
callq _Z32execute_shared_memory_operationsv
movss %xmm0, 8(%rsp) # 4-byte Spill
callq _Z34execute_register_memory_operationsv
movss %xmm0, 12(%rsp) # 4-byte Spill
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.2, %edi
callq puts@PLT
movl $.L.str.33, %edi
movl $8, %esi
xorl %eax, %eax
callq printf
movl $.L.str.34, %edi
movl $1, %esi
xorl %eax, %eax
callq printf
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.4, %edi
callq puts@PLT
movss 8(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.36, %edi
movb $1, %al
callq printf
movl $.Lstr.5, %edi
callq puts@PLT
movl $.Lstr.6, %edi
callq puts@PLT
movss 12(%rsp), %xmm0 # 4-byte Reload
# xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.36, %edi
movb $1, %al
callq printf
xorl %eax, %eax
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size main, .Lfunc_end7-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB8_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB8_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z28gpu_register_array_operationPjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z26gpu_shared_array_operationPjj, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end8:
.size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB9_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB9_2:
retq
.Lfunc_end9:
.size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z28gpu_register_array_operationPjj,@object # @_Z28gpu_register_array_operationPjj
.section .rodata,"a",@progbits
.globl _Z28gpu_register_array_operationPjj
.p2align 3, 0x0
_Z28gpu_register_array_operationPjj:
.quad _Z43__device_stub__gpu_register_array_operationPjj
.size _Z28gpu_register_array_operationPjj, 8
.type _Z26gpu_shared_array_operationPjj,@object # @_Z26gpu_shared_array_operationPjj
.globl _Z26gpu_shared_array_operationPjj
.p2align 3, 0x0
_Z26gpu_shared_array_operationPjj:
.quad _Z41__device_stub__gpu_shared_array_operationPjj
.size _Z26gpu_shared_array_operationPjj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "============Start Device %x============\n"
.size .L.str, 41
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Name: %s\n"
.size .L.str.1, 35
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Total global memory: %lu\n"
.size .L.str.2, 36
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Total shared memory per block: %lu\n"
.size .L.str.3, 36
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Total registers per block: %d\n"
.size .L.str.4, 35
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Warp size: %d\n"
.size .L.str.5, 35
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Maximum memory pitch: %lu\n"
.size .L.str.6, 36
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Maximum threads per block: %d\n"
.size .L.str.7, 35
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Maximum dimension %d of block: %d\n"
.size .L.str.8, 35
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Maximum dimension %d of grid: %d\n"
.size .L.str.9, 35
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Total constant memory: %lu\n"
.size .L.str.10, 36
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Major revision number: %d\n"
.size .L.str.11, 35
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Minor revision number: %d\n"
.size .L.str.12, 35
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Clock rate: %d\n"
.size .L.str.13, 35
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Texture alignment: %lu\n"
.size .L.str.14, 36
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Concurrent copy and execution: %s\n"
.size .L.str.15, 35
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Yes"
.size .L.str.16, 4
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "No"
.size .L.str.17, 3
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz "Number of multiprocessors: %d\n"
.size .L.str.18, 35
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "Kernel execution timeout: %s\n"
.size .L.str.19, 35
.type .L.str.20,@object # @.str.20
.L.str.20:
.asciz "Integrated: %s\n"
.size .L.str.20, 35
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "Mapable Host Memory: %s\n"
.size .L.str.21, 35
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "Compute Mode: %d\n"
.size .L.str.22, 35
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "Concurrent Kernels: %d\n"
.size .L.str.23, 35
.type .L.str.24,@object # @.str.24
.L.str.24:
.asciz "ECC Enabled: %s\n"
.size .L.str.24, 35
.type .L.str.25,@object # @.str.25
.L.str.25:
.asciz "pci Bus ID: %d\n"
.size .L.str.25, 35
.type .L.str.26,@object # @.str.26
.L.str.26:
.asciz "pci Device ID: %d\n"
.size .L.str.26, 35
.type .L.str.27,@object # @.str.27
.L.str.27:
.asciz "Using a tcc Driver: %s\n"
.size .L.str.27, 35
.type .L.str.28,@object # @.str.28
.L.str.28:
.asciz "============End Device %x============\n"
.size .L.str.28, 39
.type .L.str.30,@object # @.str.30
.L.str.30:
.asciz "Input value: %x, device output: %x\n"
.size .L.str.30, 36
.type .L.str.33,@object # @.str.33
.L.str.33:
.asciz "Total Threads: %d\n"
.size .L.str.33, 19
.type .L.str.34,@object # @.str.34
.L.str.34:
.asciz "Total Blocks: %d\n"
.size .L.str.34, 18
.type .L.str.36,@object # @.str.36
.L.str.36:
.asciz "duration: %fms\n"
.size .L.str.36, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z28gpu_register_array_operationPjj"
.size .L__unnamed_1, 36
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z26gpu_shared_array_operationPjj"
.size .L__unnamed_2, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Print of all CUDA devices and device properties"
.size .Lstr, 48
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Summary"
.size .Lstr.2, 8
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz "Time to copy global to shared mem, perform simple operation w/ shared memory, copy memory back to global"
.size .Lstr.4, 105
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "========================"
.size .Lstr.5, 25
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "Time to copy global to register mem, perform simple operation w/ register memory, copy memory back to global"
.size .Lstr.6, 109
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z43__device_stub__gpu_register_array_operationPjj
.addrsig_sym _Z41__device_stub__gpu_shared_array_operationPjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z28gpu_register_array_operationPjj
.addrsig_sym _Z26gpu_shared_array_operationPjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <cuda.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <cuda.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// | .file "tmpxft_001157eb_00000000-6_deviceDetails.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "\n\nThere is no device supporting CUDA.\n"
.align 8
.LC1:
.string "\n\nThere are %d device(s) supporting CUDA\n"
.align 8
.LC2:
.string "\n\n********************* DEVICE-%d DETAILS *******************\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "The name of the device : %s\n"
.section .rodata.str1.8
.align 8
.LC4:
.string "The compute capability : %d.%d\n"
.section .rodata.str1.1
.LC5:
.string "The warp size : %d\n"
.section .rodata.str1.8
.align 8
.LC7:
.string "The Global memory available on device : %lf GBytes\n"
.align 8
.LC8:
.string "The Constant memory available on device: %ld Bytes\n"
.align 8
.LC9:
.string "The shared memory available per Block : %ld Bytes\n"
.align 8
.LC10:
.string "The registers available per Block : %d\n"
.align 8
.LC11:
.string "The number of multiprocessors on the device : %d\n"
.align 8
.LC12:
.string "The max number of threads per Block : %d\n"
.align 8
.LC13:
.string "The max sizes of each dimension of a block: (%d,%d,%d)\n"
.align 8
.LC14:
.string "The max sizes of each dimension of a grid: (%d,%d,%d)\n"
.align 8
.LC15:
.string "----------------------------------------------------------\n\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1064, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
movabsq $42945378002703, %r12
leaq .LC1(%rip), %r13
leaq .LC2(%rip), %rbp
jmp .L9
.L14:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L13
movl $0, %eax
addq $1064, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
.L8:
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L4
.L9:
leaq 16(%rsp), %rdi
movl %ebx, %esi
call cudaGetDeviceProperties_v2@PLT
testl %ebx, %ebx
jne .L5
cmpq %r12, 376(%rsp)
je .L14
movl 12(%rsp), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L5:
movl %ebx, %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 16(%rsp), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rax
testq %rax, %rax
js .L7
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L8
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <cuda.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
cudaGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
cudaDeviceProp deviceProp;
cudaGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <hip/hip_runtime.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <hip/hip_runtime.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /********************************************************************************************
source Code : deviceDetails.cu
Objective : Example code to demonstrate the number of devices that are present on the
current system and their properties
Description: To query using the cuda API calls about the various properties of the devices like
the device model,max number of threads per block, compute capability,warp size,
available Global, shared, and constant memories etc.
input: none
output: The various properties of all the devices that are present on the current system
**********************************************************************************************/
#include <hip/hip_runtime.h>
#include<stdio.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// main routene to find the gpu devices that are presented on the system
// querying the various details of all the devices that are presented and printing the details
//
/////////////////////////////////////////////////////////////////////////////////////////////////////////////
int main(int argc,char* argv[])
{
int deviceCount;
hipGetDeviceCount(&deviceCount);
int device;
for (device = 0; device < deviceCount; ++device) {
hipDeviceProp_t deviceProp;
hipGetDeviceProperties(&deviceProp, device);
if (device == 0)
{
if (deviceProp.major == 9999 && deviceProp.minor == 9999)
{
printf("\n\nThere is no device supporting CUDA.\n");
break;
}
else
printf("\n\nThere are %d device(s) supporting CUDA\n",deviceCount);
}
printf("\n\n********************* DEVICE-%d DETAILS *******************\n",device);
printf("The name of the device : %s\n",deviceProp.name);
printf("The compute capability : %d.%d\n",deviceProp.major,deviceProp.minor);
printf("The warp size : %d\n",deviceProp.warpSize);
printf("The Global memory available on device : %lf GBytes\n",(double)deviceProp.totalGlobalMem/1000000000);
printf("The Constant memory available on device: %ld Bytes\n",deviceProp.totalConstMem);
printf("The shared memory available per Block : %ld Bytes\n",deviceProp.sharedMemPerBlock);
printf("The registers available per Block : %d\n",deviceProp.regsPerBlock);
printf("The number of multiprocessors on the device : %d\n",deviceProp.multiProcessorCount);
printf("The max number of threads per Block : %d\n",deviceProp.maxThreadsPerBlock);
printf("The max sizes of each dimension of a block: (%d,%d,%d)\n",deviceProp.maxThreadsDim[0],deviceProp.maxThreadsDim[1],deviceProp.maxThreadsDim[2]);
printf("The max sizes of each dimension of a grid: (%d,%d,%d)\n",deviceProp.maxGridSize[0],deviceProp.maxGridSize[1],deviceProp.maxGridSize[2]);
printf("----------------------------------------------------------\n\n");
}
return 0;
}
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// | .text
.file "deviceDetails.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI0_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI0_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI0_2:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 4(%rsp)
jle .LBB0_8
# %bb.1: # %.lr.ph
leaq 8(%rsp), %rbx
xorl %ebp, %ebp
jmp .LBB0_2
.p2align 4, 0x90
.LBB0_6: # in Loop: Header=BB0_2 Depth=1
movl 4(%rsp), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
.LBB0_7: # in Loop: Header=BB0_2 Depth=1
movl $.L.str.2, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl 372(%rsp), %edx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 316(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movsd 296(%rsp), %xmm1 # xmm1 = mem[0],zero
unpcklps .LCPI0_0(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI0_1(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
divsd .LCPI0_2(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq 360(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 304(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 312(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 396(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 328(%rsp), %esi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 332(%rsp), %esi
movl 336(%rsp), %edx
movl 340(%rsp), %ecx
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 344(%rsp), %esi
movl 348(%rsp), %edx
movl 352(%rsp), %ecx
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl $.Lstr, %edi
callq puts@PLT
incl %ebp
cmpl 4(%rsp), %ebp
jge .LBB0_8
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
testl %ebp, %ebp
jne .LBB0_7
# %bb.3: # in Loop: Header=BB0_2 Depth=1
cmpl $9999, 368(%rsp) # imm = 0x270F
jne .LBB0_6
# %bb.4: # in Loop: Header=BB0_2 Depth=1
cmpl $9999, 372(%rsp) # imm = 0x270F
jne .LBB0_6
# %bb.5: # %.critedge
movl $.Lstr.1, %edi
callq puts@PLT
.LBB0_8: # %.loopexit
xorl %eax, %eax
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "\n\nThere are %d device(s) supporting CUDA\n"
.size .L.str.1, 42
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n\n********************* DEVICE-%d DETAILS *******************\n"
.size .L.str.2, 63
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "The name of the device : %s\n"
.size .L.str.3, 29
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "The compute capability : %d.%d\n"
.size .L.str.4, 32
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "The warp size : %d\n"
.size .L.str.5, 20
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "The Global memory available on device : %lf GBytes\n"
.size .L.str.6, 52
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "The Constant memory available on device: %ld Bytes\n"
.size .L.str.7, 52
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "The shared memory available per Block : %ld Bytes\n"
.size .L.str.8, 51
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "The registers available per Block : %d\n"
.size .L.str.9, 40
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "The number of multiprocessors on the device : %d\n"
.size .L.str.10, 50
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "The max number of threads per Block : %d\n"
.size .L.str.11, 42
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "The max sizes of each dimension of a block: (%d,%d,%d)\n"
.size .L.str.12, 56
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "The max sizes of each dimension of a grid: (%d,%d,%d)\n"
.size .L.str.13, 55
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "----------------------------------------------------------\n"
.size .Lstr, 60
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\n\nThere is no device supporting CUDA."
.size .Lstr.1, 38
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001157eb_00000000-6_deviceDetails.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "\n\nThere is no device supporting CUDA.\n"
.align 8
.LC1:
.string "\n\nThere are %d device(s) supporting CUDA\n"
.align 8
.LC2:
.string "\n\n********************* DEVICE-%d DETAILS *******************\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "The name of the device : %s\n"
.section .rodata.str1.8
.align 8
.LC4:
.string "The compute capability : %d.%d\n"
.section .rodata.str1.1
.LC5:
.string "The warp size : %d\n"
.section .rodata.str1.8
.align 8
.LC7:
.string "The Global memory available on device : %lf GBytes\n"
.align 8
.LC8:
.string "The Constant memory available on device: %ld Bytes\n"
.align 8
.LC9:
.string "The shared memory available per Block : %ld Bytes\n"
.align 8
.LC10:
.string "The registers available per Block : %d\n"
.align 8
.LC11:
.string "The number of multiprocessors on the device : %d\n"
.align 8
.LC12:
.string "The max number of threads per Block : %d\n"
.align 8
.LC13:
.string "The max sizes of each dimension of a block: (%d,%d,%d)\n"
.align 8
.LC14:
.string "The max sizes of each dimension of a grid: (%d,%d,%d)\n"
.align 8
.LC15:
.string "----------------------------------------------------------\n\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $1064, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1048(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
movabsq $42945378002703, %r12
leaq .LC1(%rip), %r13
leaq .LC2(%rip), %rbp
jmp .L9
.L14:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L4:
movq 1048(%rsp), %rax
subq %fs:40, %rax
jne .L13
movl $0, %eax
addq $1064, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
.L8:
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L4
.L9:
leaq 16(%rsp), %rdi
movl %ebx, %esi
call cudaGetDeviceProperties_v2@PLT
testl %ebx, %ebx
jne .L5
cmpq %r12, 376(%rsp)
je .L14
movl 12(%rsp), %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L5:
movl %ebx, %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 16(%rsp), %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rax
testq %rax, %rax
js .L7
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L8
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1104006501
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "deviceDetails.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI0_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI0_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI0_2:
.quad 0x41cdcd6500000000 # double 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 4(%rsp)
jle .LBB0_8
# %bb.1: # %.lr.ph
leaq 8(%rsp), %rbx
xorl %ebp, %ebp
jmp .LBB0_2
.p2align 4, 0x90
.LBB0_6: # in Loop: Header=BB0_2 Depth=1
movl 4(%rsp), %esi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
.LBB0_7: # in Loop: Header=BB0_2 Depth=1
movl $.L.str.2, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl 372(%rsp), %edx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 316(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movsd 296(%rsp), %xmm1 # xmm1 = mem[0],zero
unpcklps .LCPI0_0(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI0_1(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
divsd .LCPI0_2(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq 360(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 304(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 312(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 396(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 328(%rsp), %esi
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 332(%rsp), %esi
movl 336(%rsp), %edx
movl 340(%rsp), %ecx
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 344(%rsp), %esi
movl 348(%rsp), %edx
movl 352(%rsp), %ecx
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl $.Lstr, %edi
callq puts@PLT
incl %ebp
cmpl 4(%rsp), %ebp
jge .LBB0_8
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
testl %ebp, %ebp
jne .LBB0_7
# %bb.3: # in Loop: Header=BB0_2 Depth=1
cmpl $9999, 368(%rsp) # imm = 0x270F
jne .LBB0_6
# %bb.4: # in Loop: Header=BB0_2 Depth=1
cmpl $9999, 372(%rsp) # imm = 0x270F
jne .LBB0_6
# %bb.5: # %.critedge
movl $.Lstr.1, %edi
callq puts@PLT
.LBB0_8: # %.loopexit
xorl %eax, %eax
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "\n\nThere are %d device(s) supporting CUDA\n"
.size .L.str.1, 42
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n\n********************* DEVICE-%d DETAILS *******************\n"
.size .L.str.2, 63
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "The name of the device : %s\n"
.size .L.str.3, 29
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "The compute capability : %d.%d\n"
.size .L.str.4, 32
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "The warp size : %d\n"
.size .L.str.5, 20
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "The Global memory available on device : %lf GBytes\n"
.size .L.str.6, 52
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "The Constant memory available on device: %ld Bytes\n"
.size .L.str.7, 52
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "The shared memory available per Block : %ld Bytes\n"
.size .L.str.8, 51
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "The registers available per Block : %d\n"
.size .L.str.9, 40
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "The number of multiprocessors on the device : %d\n"
.size .L.str.10, 50
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "The max number of threads per Block : %d\n"
.size .L.str.11, 42
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "The max sizes of each dimension of a block: (%d,%d,%d)\n"
.size .L.str.12, 56
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "The max sizes of each dimension of a grid: (%d,%d,%d)\n"
.size .L.str.13, 55
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "----------------------------------------------------------\n"
.size .Lstr, 60
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\n\nThere is no device supporting CUDA."
.size .Lstr.1, 38
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void cudaclaw5_update_q_cuda(int mbc, double dtdx, double dtdy, double* qold, double* fm, double* fp, double* gm, double* gp)
{
int mq = threadIdx.z;
int x = threadIdx.x;
int x_stride = blockDim.z;
int y = threadIdx.y;
int y_stride = (blockDim.x + 2*mbc)*x_stride;
int i = mq + (x+mbc)*x_stride + (y+mbc)*y_stride;
qold[i] = qold[i] - dtdx * (fm[i+x_stride] - fp[i])
- dtdy * (gm[i+y_stride] - gp[i]);
} | code for sm_80
Function : _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ ULDC UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */
/* 0x000fe20000000800 */
/*0030*/ HFMA2.MMA R2, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff027435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */
/* 0x000fe20000000800 */
/*0050*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e620000002200 */
/*0060*/ ULEA UR4, UR4, UR5, 0x1 ; /* 0x0000000504047291 */
/* 0x000fc6000f8e083f */
/*0070*/ S2R R5, SR_TID.Z ; /* 0x0000000000057919 */
/* 0x000ea20000002300 */
/*0080*/ ULDC UR5, c[0x0][0x8] ; /* 0x0000020000057ab9 */
/* 0x000fe40000000800 */
/*0090*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */
/* 0x000fe2000f8e023f */
/*00a0*/ IADD3 R0, R0, c[0x0][0x160], RZ ; /* 0x0000580000007a10 */
/* 0x001fe40007ffe0ff */
/*00b0*/ IADD3 R3, R3, c[0x0][0x160], RZ ; /* 0x0000580003037a10 */
/* 0x002fc60007ffe0ff */
/*00c0*/ IMAD R0, R0, c[0x0][0x8], R5 ; /* 0x0000020000007a24 */
/* 0x004fc800078e0205 */
/*00d0*/ IMAD R3, R3, UR4, R0 ; /* 0x0000000403037c24 */
/* 0x000fc8000f8e0200 */
/*00e0*/ IMAD.WIDE R8, R3.reuse, R2.reuse, c[0x0][0x188] ; /* 0x0000620003087625 */
/* 0x0c0fe200078e0202 */
/*00f0*/ IADD3 R6, R3.reuse, c[0x0][0x8], RZ ; /* 0x0000020003067a10 */
/* 0x040fe40007ffe0ff */
/*0100*/ IADD3 R12, R3.reuse, UR4, RZ ; /* 0x00000004030c7c10 */
/* 0x040fe2000fffe0ff */
/*0110*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0120*/ IMAD.WIDE R14, R3, R2.reuse, c[0x0][0x198] ; /* 0x00006600030e7625 */
/* 0x080fe200078e0202 */
/*0130*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000ea6000c1e1b00 */
/*0140*/ IMAD.WIDE R6, R6, R2.reuse, c[0x0][0x180] ; /* 0x0000600006067625 */
/* 0x080fe400078e0202 */
/*0150*/ LDG.E.64 R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ee4000c1e1b00 */
/*0160*/ IMAD.WIDE R12, R12, R2, c[0x0][0x190] ; /* 0x000064000c0c7625 */
/* 0x000fc400078e0202 */
/*0170*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea4000c1e1b00 */
/*0180*/ IMAD.WIDE R2, R3, R2, c[0x0][0x178] ; /* 0x00005e0003027625 */
/* 0x000fe400078e0202 */
/*0190*/ LDG.E.64 R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000ee8000c1e1b00 */
/*01a0*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000f22000c1e1b00 */
/*01b0*/ DADD R10, R6, -R8 ; /* 0x00000000060a7229 */
/* 0x004f080000000808 */
/*01c0*/ DADD R16, R12, -R14 ; /* 0x000000000c107229 */
/* 0x008fc8000000080e */
/*01d0*/ DFMA R4, -R10, c[0x0][0x168], R4 ; /* 0x00005a000a047a2b */
/* 0x010e0c0000000104 */
/*01e0*/ DFMA R4, -R16, c[0x0][0x170], R4 ; /* 0x00005c0010047a2b */
/* 0x001e0e0000000104 */
/*01f0*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */
/* 0x001fe2000c101b04 */
/*0200*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0210*/ BRA 0x210; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0280*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void cudaclaw5_update_q_cuda(int mbc, double dtdx, double dtdy, double* qold, double* fm, double* fp, double* gm, double* gp)
{
int mq = threadIdx.z;
int x = threadIdx.x;
int x_stride = blockDim.z;
int y = threadIdx.y;
int y_stride = (blockDim.x + 2*mbc)*x_stride;
int i = mq + (x+mbc)*x_stride + (y+mbc)*y_stride;
qold[i] = qold[i] - dtdx * (fm[i+x_stride] - fp[i])
- dtdy * (gm[i+y_stride] - gp[i]);
} | .file "tmpxft_000178a1_00000000-6_cudaclaw5_update_q_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_
.type _Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_, @function
_Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_:
.LFB2051:
.cfi_startproc
endbr64
subq $216, %rsp
.cfi_def_cfa_offset 224
movl %edi, 60(%rsp)
movsd %xmm0, 48(%rsp)
movsd %xmm1, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %r9, (%rsp)
movq %fs:40, %rax
movq %rax, 200(%rsp)
xorl %eax, %eax
leaq 60(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 40(%rsp), %rax
movq %rax, 144(%rsp)
leaq 32(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 16(%rsp), %rax
movq %rax, 168(%rsp)
leaq 8(%rsp), %rax
movq %rax, 176(%rsp)
movq %rsp, %rax
movq %rax, 184(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $1, 88(%rsp)
movl $1, 92(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
leaq 72(%rsp), %rcx
leaq 64(%rsp), %rdx
leaq 92(%rsp), %rsi
leaq 80(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 200(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $216, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 72(%rsp)
.cfi_def_cfa_offset 232
pushq 72(%rsp)
.cfi_def_cfa_offset 240
leaq 144(%rsp), %r9
movq 108(%rsp), %rcx
movl 116(%rsp), %r8d
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
leaq _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 224
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_, .-_Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_
.globl _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_
.type _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_, @function
_Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z54__device_stub__Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_iddPdS_S_S_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_, .-_Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z23cudaclaw5_update_q_cudaiddPdS_S_S_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
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