system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
Code adapted from book "CUDA by Example: An Introduction to General-Purpose GPU Programming"
This code computes a visualization of the Julia set. Two-dimenansional "bitman" data which can be plotted is computed by the function kernel.
The data can be viewed with gnuplot.
The Julia set iteration is:
z= z**2 + C
If it converges, then the initial point z is in the Julia set.
*/
#include <stdio.h>
#include <hip/hip_runtime.h>
#define DIM 1000
__device__ int d_arr[DIM*DIM];
__device__ int julia( int x, int y ) {
const float scale = 1.5;
float jx = scale * (float)(DIM/2 - x)/(DIM/2);
float jy = scale * (float)(DIM/2 - y)/(DIM/2);
float cr=-0.8f;
float ci=0.156f;
float ar=jx;
float ai=jy;
float artmp;
int i = 0;
for (i=0; i<200; i++) {
artmp = ar;
ar =(ar*ar-ai*ai) +cr;
ai = 2.0f*artmp*ai + ci;
if ( (ar*ar+ai*ai) > 1000)
return 0;
}
return 1;
}
/*
void kernel( int *arr ){
for (int y=0; y<DIM; y++) {
for (int x=0; x<DIM; x++) {
int offset = x + y * DIM;
int juliaValue = julia( x, y );
arr[offset] = juliaValue;
}
}
}
*/
__global__ void kernel_gpu(int n){
//for (int y=0; y<DIM; y++) {
// for (int x=0; x<DIM; x++) {
//int offset = x + y * DIM;
//int offset = threadIdx.x+blockDim.x*(blockIdx.x);
int offset =blockIdx.x+n*(blockIdx.y);
//int juliaValue = julia( x, y );
int juliaValue = julia( blockIdx.x, blockIdx.y);
d_arr[offset] = juliaValue;
// }
//}
}
int main( void ) {
int h_arr[DIM*DIM];
// __device__ int d_arr[DIM*DIM];
FILE *out;
int n =DIM*DIM;
int blockSize;
// dim3 nBlocks;
size_t memsize;
memsize = n*sizeof(int);
blockSize = 1;
//nBlocks = n / blockSize + (n % blockSize > 0);
dim3 nBlocks(DIM,DIM,1);
kernel_gpu<<<nBlocks,blockSize>>>(DIM);
hipMemcpy(h_arr,d_arr,memsize,hipMemcpyDeviceToHost);
hipDeviceSynchronize();
out = fopen( "julia_gpu.dat", "w" );
for (int y=0; y<DIM; y++) {
for (int x=0; x<DIM; x++) {
int offset = x + y * DIM;
if(h_arr[offset]==1){
fprintf(out,"%d %d \n",x,y); }
}
}
fclose(out);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10kernel_gpui
.globl _Z10kernel_gpui
.p2align 8
.type _Z10kernel_gpui,@function
_Z10kernel_gpui:
s_sub_i32 s3, 0x1f4, s15
s_sub_i32 s2, 0x1f4, s14
v_cvt_f32_i32_e32 v1, s3
v_cvt_f32_i32_e32 v0, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, 0x3fc00000, v1
v_div_scale_f32 v3, null, 0x43fa0000, 0x43fa0000, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v5, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v7, -v3, v5, 1.0
v_dual_mul_f32 v0, 0x3fc00000, v0 :: v_dual_fmac_f32 v5, v7, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v1, null, 0x43fa0000, 0x43fa0000, v0
v_div_scale_f32 v8, vcc_lo, v0, 0x43fa0000, v0
v_rcp_f32_e32 v4, v1
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v1, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v6, v4
v_mul_f32_e32 v7, v8, v4
v_div_scale_f32 v6, s2, v2, 0x43fa0000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v10, -v1, v7, v8
v_mul_f32_e32 v9, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v11, -v3, v9, v6
v_fmac_f32_e32 v9, v11, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmac_f32_e32 v7, v10, v4
v_fma_f32 v3, -v3, v9, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v1, -v1, v7, v8
v_div_fmas_f32 v1, v1, v4, v7
s_mov_b32 vcc_lo, s2
s_movk_i32 s2, 0xc8
v_div_fmas_f32 v3, v3, v5, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_div_fixup_f32 v1, v1, 0x43fa0000, v0
v_div_fixup_f32 v0, v3, 0x43fa0000, v2
s_branch .LBB0_2
.p2align 6
.LBB0_1:
s_mov_b32 s3, 0
s_branch .LBB0_4
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mul_f32 v2, v0, v0 :: v_dual_add_f32 v3, v1, v1
v_fma_f32 v2, v1, v1, -v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmaak_f32 v0, v0, v3, 0x3e1fbe77
v_add_f32_e32 v1, 0xbf4ccccd, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v2, v1, v1
v_fmac_f32_e32 v2, v0, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_nlt_f32_e32 vcc_lo, 0x447a0000, v2
s_cbranch_vccz .LBB0_1
s_add_i32 s2, s2, -1
s_mov_b32 s3, 1
s_cmp_eq_u32 s2, 0
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s4
s_cbranch_vccnz .LBB0_2
.LBB0_4:
s_load_b32 s0, s[0:1], 0x0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
s_waitcnt lgkmcnt(0)
s_mul_i32 s0, s15, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_add_i32 s0, s0, s14
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, d_arr@rel32@lo+4
s_addc_u32 s5, s5, d_arr@rel32@hi+12
s_ashr_i32 s1, s0, 31
s_lshl_b64 s[0:1], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10kernel_gpui
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 4
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 12
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10kernel_gpui, .Lfunc_end0-_Z10kernel_gpui
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected d_arr
.type d_arr,@object
.section .bss,"aw",@nobits
.globl d_arr
.p2align 4, 0x0
d_arr:
.zero 4000000
.size d_arr, 4000000
.type __hip_cuid_,@object
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym d_arr
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 4
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10kernel_gpui
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10kernel_gpui.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 12
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
Code adapted from book "CUDA by Example: An Introduction to General-Purpose GPU Programming"
This code computes a visualization of the Julia set. Two-dimenansional "bitman" data which can be plotted is computed by the function kernel.
The data can be viewed with gnuplot.
The Julia set iteration is:
z= z**2 + C
If it converges, then the initial point z is in the Julia set.
*/
#include <stdio.h>
#include <hip/hip_runtime.h>
#define DIM 1000
__device__ int d_arr[DIM*DIM];
__device__ int julia( int x, int y ) {
const float scale = 1.5;
float jx = scale * (float)(DIM/2 - x)/(DIM/2);
float jy = scale * (float)(DIM/2 - y)/(DIM/2);
float cr=-0.8f;
float ci=0.156f;
float ar=jx;
float ai=jy;
float artmp;
int i = 0;
for (i=0; i<200; i++) {
artmp = ar;
ar =(ar*ar-ai*ai) +cr;
ai = 2.0f*artmp*ai + ci;
if ( (ar*ar+ai*ai) > 1000)
return 0;
}
return 1;
}
/*
void kernel( int *arr ){
for (int y=0; y<DIM; y++) {
for (int x=0; x<DIM; x++) {
int offset = x + y * DIM;
int juliaValue = julia( x, y );
arr[offset] = juliaValue;
}
}
}
*/
__global__ void kernel_gpu(int n){
//for (int y=0; y<DIM; y++) {
// for (int x=0; x<DIM; x++) {
//int offset = x + y * DIM;
//int offset = threadIdx.x+blockDim.x*(blockIdx.x);
int offset =blockIdx.x+n*(blockIdx.y);
//int juliaValue = julia( x, y );
int juliaValue = julia( blockIdx.x, blockIdx.y);
d_arr[offset] = juliaValue;
// }
//}
}
int main( void ) {
int h_arr[DIM*DIM];
// __device__ int d_arr[DIM*DIM];
FILE *out;
int n =DIM*DIM;
int blockSize;
// dim3 nBlocks;
size_t memsize;
memsize = n*sizeof(int);
blockSize = 1;
//nBlocks = n / blockSize + (n % blockSize > 0);
dim3 nBlocks(DIM,DIM,1);
kernel_gpu<<<nBlocks,blockSize>>>(DIM);
hipMemcpy(h_arr,d_arr,memsize,hipMemcpyDeviceToHost);
hipDeviceSynchronize();
out = fopen( "julia_gpu.dat", "w" );
for (int y=0; y<DIM; y++) {
for (int x=0; x<DIM; x++) {
int offset = x + y * DIM;
if(h_arr[offset]==1){
fprintf(out,"%d %d \n",x,y); }
}
}
fclose(out);
} | .text
.file "julia_gpu.hip"
.globl _Z25__device_stub__kernel_gpui # -- Begin function _Z25__device_stub__kernel_gpui
.p2align 4, 0x90
.type _Z25__device_stub__kernel_gpui,@function
_Z25__device_stub__kernel_gpui: # @_Z25__device_stub__kernel_gpui
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movl %edi, 12(%rsp)
leaq 12(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z10kernel_gpui, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z25__device_stub__kernel_gpui, .Lfunc_end0-_Z25__device_stub__kernel_gpui
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $4000072, %rsp # imm = 0x3D0948
.cfi_def_cfa_offset 4000112
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movabsq $4294967297000, %rdi # imm = 0x3E8000003E8
movabsq $4294967297, %rdx # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 12(%rsp), %rax
movq %rax, 16(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z10kernel_gpui, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
leaq 64(%rsp), %rbx
movl $d_arr, %esi
movl $4000000, %edx # imm = 0x3D0900
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r14
xorl %r15d, %r15d
jmp .LBB1_3
.p2align 4, 0x90
.LBB1_7: # in Loop: Header=BB1_3 Depth=1
incq %r15
addq $4000, %rbx # imm = 0xFA0
cmpq $1000, %r15 # imm = 0x3E8
je .LBB1_8
.LBB1_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
xorl %r12d, %r12d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
incq %r12
cmpq $1000, %r12 # imm = 0x3E8
je .LBB1_7
.LBB1_4: # Parent Loop BB1_3 Depth=1
# => This Inner Loop Header: Depth=2
cmpl $1, (%rbx,%r12,4)
jne .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
movl $.L.str.2, %esi
movq %r14, %rdi
movl %r12d, %edx
movl %r15d, %ecx
xorl %eax, %eax
callq fprintf
jmp .LBB1_6
.LBB1_8:
movq %r14, %rdi
callq fclose
xorl %eax, %eax
addq $4000072, %rsp # imm = 0x3D0948
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10kernel_gpui, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $0, (%rsp)
movl $d_arr, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $4000000, %r9d # imm = 0x3D0900
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type d_arr,@object # @d_arr
.local d_arr
.comm d_arr,4000000,16
.type _Z10kernel_gpui,@object # @_Z10kernel_gpui
.section .rodata,"a",@progbits
.globl _Z10kernel_gpui
.p2align 3, 0x0
_Z10kernel_gpui:
.quad _Z25__device_stub__kernel_gpui
.size _Z10kernel_gpui, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "julia_gpu.dat"
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d %d \n"
.size .L.str.2, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10kernel_gpui"
.size .L__unnamed_1, 16
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "d_arr"
.size .L__unnamed_2, 6
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__kernel_gpui
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym d_arr
.addrsig_sym _Z10kernel_gpui
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00135164_00000000-6_julia_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z5juliaii
.type _Z5juliaii, @function
_Z5juliaii:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z5juliaii, .-_Z5juliaii
.globl _Z29__device_stub__Z10kernel_gpuii
.type _Z29__device_stub__Z10kernel_gpuii, @function
_Z29__device_stub__Z10kernel_gpuii:
.LFB2083:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z10kernel_gpui(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z29__device_stub__Z10kernel_gpuii, .-_Z29__device_stub__Z10kernel_gpuii
.globl _Z10kernel_gpui
.type _Z10kernel_gpui, @function
_Z10kernel_gpui:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z10kernel_gpuii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z10kernel_gpui, .-_Z10kernel_gpui
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "julia_gpu.dat"
.LC2:
.string "%d %d \n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
leaq -3997696(%rsp), %r11
.cfi_def_cfa 11, 3997744
.LPSRL0:
subq $4096, %rsp
orq $0, (%rsp)
cmpq %r11, %rsp
jne .LPSRL0
.cfi_def_cfa_register 7
subq $2352, %rsp
.cfi_def_cfa_offset 4000096
movq %fs:40, %rax
movq %rax, 4000040(%rsp)
xorl %eax, %eax
movl $1000, 8(%rsp)
movl $1000, 12(%rsp)
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L22
.L14:
leaq 32(%rsp), %rbp
movl $2, %ecx
movl $4000000, %edx
leaq _ZL5d_arr(%rip), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
call cudaDeviceSynchronize@PLT
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, %r13
movl $0, %r12d
leaq .LC2(%rip), %r14
jmp .L15
.L22:
movl $1000, %edi
call _Z29__device_stub__Z10kernel_gpuii
jmp .L14
.L16:
addq $1, %rbx
cmpq $1000, %rbx
je .L23
.L17:
cmpl $1, 0(%rbp,%rbx,4)
jne .L16
movl %r12d, %r8d
movl %ebx, %ecx
movq %r14, %rdx
movl $2, %esi
movq %r13, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L16
.L23:
addl $1, %r12d
addq $4000, %rbp
cmpl $1000, %r12d
je .L18
.L15:
movl $0, %ebx
jmp .L17
.L18:
movq %r13, %rdi
call fclose@PLT
movq 4000040(%rsp), %rax
subq %fs:40, %rax
jne .L24
movl $0, %eax
addq $4000048, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC3:
.string "_Z10kernel_gpui"
.LC4:
.string "d_arr"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC3(%rip), %rdx
movq %rdx, %rcx
leaq _Z10kernel_gpui(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $4000000, %r9d
movl $0, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _ZL5d_arr(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL5d_arr
.comm _ZL5d_arr,4000000,32
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "julia_gpu.hip"
.globl _Z25__device_stub__kernel_gpui # -- Begin function _Z25__device_stub__kernel_gpui
.p2align 4, 0x90
.type _Z25__device_stub__kernel_gpui,@function
_Z25__device_stub__kernel_gpui: # @_Z25__device_stub__kernel_gpui
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movl %edi, 12(%rsp)
leaq 12(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z10kernel_gpui, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z25__device_stub__kernel_gpui, .Lfunc_end0-_Z25__device_stub__kernel_gpui
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $4000072, %rsp # imm = 0x3D0948
.cfi_def_cfa_offset 4000112
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movabsq $4294967297000, %rdi # imm = 0x3E8000003E8
movabsq $4294967297, %rdx # imm = 0x100000001
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movl $1000, 12(%rsp) # imm = 0x3E8
leaq 12(%rsp), %rax
movq %rax, 16(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z10kernel_gpui, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
leaq 64(%rsp), %rbx
movl $d_arr, %esi
movl $4000000, %edx # imm = 0x3D0900
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r14
xorl %r15d, %r15d
jmp .LBB1_3
.p2align 4, 0x90
.LBB1_7: # in Loop: Header=BB1_3 Depth=1
incq %r15
addq $4000, %rbx # imm = 0xFA0
cmpq $1000, %r15 # imm = 0x3E8
je .LBB1_8
.LBB1_3: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
xorl %r12d, %r12d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
incq %r12
cmpq $1000, %r12 # imm = 0x3E8
je .LBB1_7
.LBB1_4: # Parent Loop BB1_3 Depth=1
# => This Inner Loop Header: Depth=2
cmpl $1, (%rbx,%r12,4)
jne .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
movl $.L.str.2, %esi
movq %r14, %rdi
movl %r12d, %edx
movl %r15d, %ecx
xorl %eax, %eax
callq fprintf
jmp .LBB1_6
.LBB1_8:
movq %r14, %rdi
callq fclose
xorl %eax, %eax
addq $4000072, %rsp # imm = 0x3D0948
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10kernel_gpui, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $0, (%rsp)
movl $d_arr, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $4000000, %r9d # imm = 0x3D0900
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type d_arr,@object # @d_arr
.local d_arr
.comm d_arr,4000000,16
.type _Z10kernel_gpui,@object # @_Z10kernel_gpui
.section .rodata,"a",@progbits
.globl _Z10kernel_gpui
.p2align 3, 0x0
_Z10kernel_gpui:
.quad _Z25__device_stub__kernel_gpui
.size _Z10kernel_gpui, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "julia_gpu.dat"
.size .L.str, 14
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d %d \n"
.size .L.str.2, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10kernel_gpui"
.size .L__unnamed_1, 16
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "d_arr"
.size .L__unnamed_2, 6
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__kernel_gpui
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym d_arr
.addrsig_sym _Z10kernel_gpui
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // g++ -DTHRUST_DEVICE_SYSTEM=THRUST_DEVICE_SYSTEM_OMP -I../../../thrust/ -fopenmp -x c++ exemplo2.cu -o exemplo2 && ./exemplo2 < ../17-intro-gpu/stocks2.csv
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <iostream>
#include <math.h>
#include <thrust/iterator/constant_iterator.h>
int main()
{
int N = 0;
thrust::host_vector<double> hostMicrosoft;
thrust::host_vector<double> hostApple;
double a, m;
while (std::cin.fail() == false)
{
N += 1;
std::cin >> a;
std::cin >> m;
hostMicrosoft.push_back(m);
hostApple.push_back(a);
}
thrust::device_vector<double> diferenca(N);
thrust::device_vector<double> MSFT(hostMicrosoft);
thrust::device_vector<double> AAPL(hostApple);
thrust::device_vector<double> mean_vector(N);
thrust::device_vector<double> var(N);
thrust::device_vector<double> var_double(N);
// diference
thrust::transform(MSFT.begin(), MSFT.end(), AAPL.begin(), diferenca.begin(), thrust::minus<double>());
// mean
double mean = thrust::reduce(diferenca.begin(), diferenca.end(), 0, thrust::plus<double>()) / N;
// thrust::fill(mean_vector.begin(), mean_vector.end(), mean);
thrust::transform(diferenca.begin(), diferenca.end(), thrust::constant_iterator<double>(mean), var.begin(), thrust::minus<double>());
thrust::transform(var.begin(), var.end(), var.begin(),
var_double.begin(), thrust::multiplies<double>());
// for (auto i = var_double.begin(); i != var_double.end(); i++)
// {
// std::cout << *i / N << " "; // este acesso é rápido -- CPU
// }
double variancia = thrust::reduce(var_double.begin(), var_double.end(), 0, thrust::plus<double>()) / N;
std::cout << "variancia: " << variancia << "\n";
} | // g++ -DTHRUST_DEVICE_SYSTEM=THRUST_DEVICE_SYSTEM_OMP -I../../../thrust/ -fopenmp -x c++ exemplo2.cu -o exemplo2 && ./exemplo2 < ../17-intro-gpu/stocks2.csv
#include <hip/hip_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <iostream>
#include <math.h>
#include <thrust/iterator/constant_iterator.h>
int main()
{
int N = 0;
thrust::host_vector<double> hostMicrosoft;
thrust::host_vector<double> hostApple;
double a, m;
while (std::cin.fail() == false)
{
N += 1;
std::cin >> a;
std::cin >> m;
hostMicrosoft.push_back(m);
hostApple.push_back(a);
}
thrust::device_vector<double> diferenca(N);
thrust::device_vector<double> MSFT(hostMicrosoft);
thrust::device_vector<double> AAPL(hostApple);
thrust::device_vector<double> mean_vector(N);
thrust::device_vector<double> var(N);
thrust::device_vector<double> var_double(N);
// diference
thrust::transform(MSFT.begin(), MSFT.end(), AAPL.begin(), diferenca.begin(), thrust::minus<double>());
// mean
double mean = thrust::reduce(diferenca.begin(), diferenca.end(), 0, thrust::plus<double>()) / N;
// thrust::fill(mean_vector.begin(), mean_vector.end(), mean);
thrust::transform(diferenca.begin(), diferenca.end(), thrust::constant_iterator<double>(mean), var.begin(), thrust::minus<double>());
thrust::transform(var.begin(), var.end(), var.begin(),
var_double.begin(), thrust::multiplies<double>());
// for (auto i = var_double.begin(); i != var_double.end(); i++)
// {
// std::cout << *i / N << " "; // este acesso é rápido -- CPU
// }
double variancia = thrust::reduce(var_double.begin(), var_double.end(), 0, thrust::plus<double>()) / N;
std::cout << "variancia: " << variancia << "\n";
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} | code for sm_80
Function : _Z8mykernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} | .file "tmpxft_00192248_00000000-6_hello_world.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z8mykernelvv
.type _Z26__device_stub__Z8mykernelvv, @function
_Z26__device_stub__Z8mykernelvv:
.LFB3694:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z8mykernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z8mykernelvv, .-_Z26__device_stub__Z8mykernelvv
.globl _Z8mykernelv
.type _Z8mykernelv, @function
_Z8mykernelv:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8mykernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z8mykernelv, .-_Z8mykernelv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello World!\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z26__device_stub__Z8mykernelvv
jmp .L12
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z8mykernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z8mykernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8mykernelv
.globl _Z8mykernelv
.p2align 8
.type _Z8mykernelv,@function
_Z8mykernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8mykernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8mykernelv, .Lfunc_end0-_Z8mykernelv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8mykernelv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z8mykernelv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<iostream>
using namespace std;
__global__ void mykernel(void){
}
int main(void){
mykernel<<<1, 1>>>();
cout << "Hello World!\n" << endl;
return 0;
} | .text
.file "hello_world.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__mykernelv # -- Begin function _Z23__device_stub__mykernelv
.p2align 4, 0x90
.type _Z23__device_stub__mykernelv,@function
_Z23__device_stub__mykernelv: # @_Z23__device_stub__mykernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z8mykernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z23__device_stub__mykernelv, .Lfunc_end0-_Z23__device_stub__mykernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $64, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -16
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z8mykernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $13, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_7
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_5
# %bb.4:
movzbl 67(%rbx), %eax
jmp .LBB1_6
.LBB1_5:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_6: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
addq $64, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_7:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8mykernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8mykernelv,@object # @_Z8mykernelv
.section .rodata,"a",@progbits
.globl _Z8mykernelv
.p2align 3, 0x0
_Z8mykernelv:
.quad _Z23__device_stub__mykernelv
.size _Z8mykernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Hello World!\n"
.size .L.str, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8mykernelv"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__mykernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8mykernelv
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8mykernelv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8mykernelv
.globl _Z8mykernelv
.p2align 8
.type _Z8mykernelv,@function
_Z8mykernelv:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8mykernelv
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 0
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 0
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8mykernelv, .Lfunc_end0-_Z8mykernelv
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args: []
.group_segment_fixed_size: 0
.kernarg_segment_align: 4
.kernarg_segment_size: 0
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8mykernelv
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z8mykernelv.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00192248_00000000-6_hello_world.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z8mykernelvv
.type _Z26__device_stub__Z8mykernelvv, @function
_Z26__device_stub__Z8mykernelvv:
.LFB3694:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z8mykernelv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z26__device_stub__Z8mykernelvv, .-_Z26__device_stub__Z8mykernelvv
.globl _Z8mykernelv
.type _Z8mykernelv, @function
_Z8mykernelv:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z8mykernelvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z8mykernelv, .-_Z8mykernelv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello World!\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z26__device_stub__Z8mykernelvv
jmp .L12
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z8mykernelv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z8mykernelv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "hello_world.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__mykernelv # -- Begin function _Z23__device_stub__mykernelv
.p2align 4, 0x90
.type _Z23__device_stub__mykernelv,@function
_Z23__device_stub__mykernelv: # @_Z23__device_stub__mykernelv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z8mykernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z23__device_stub__mykernelv, .Lfunc_end0-_Z23__device_stub__mykernelv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $64, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -16
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z8mykernelv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $13, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_7
# %bb.3: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_5
# %bb.4:
movzbl 67(%rbx), %eax
jmp .LBB1_6
.LBB1_5:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_6: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
addq $64, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_7:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8mykernelv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8mykernelv,@object # @_Z8mykernelv
.section .rodata,"a",@progbits
.globl _Z8mykernelv
.p2align 3, 0x0
_Z8mykernelv:
.quad _Z23__device_stub__mykernelv
.size _Z8mykernelv, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Hello World!\n"
.size .L.str, 14
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8mykernelv"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__mykernelv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8mykernelv
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(cudaError_t e)
{
if (e != cudaSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << cudaGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(cudaMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(cudaMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(cudaMemcpy(T1_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
checkError(cudaMemcpy(T2_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(cudaMemcpy(T, T2_device, NX*NY*sizeof(float),cudaMemcpyDeviceToHost));
cudaDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
cudaFree(T1_device);
cudaFree(T2_device);
} | code for sm_80
Function : _Z7LaplacePfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc400078e0203 */
/*0060*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fc600078e0205 */
/*0070*/ IADD3 R2, R0, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x000fe40007ffe0ff */
/*0080*/ IADD3 R4, R3, -0x1, RZ ; /* 0xffffffff03047810 */
/* 0x000fe40007ffe0ff */
/*0090*/ ISETP.GT.U32.AND P0, PT, R2, 0xfd, PT ; /* 0x000000fd0200780c */
/* 0x000fc80003f04070 */
/*00a0*/ ISETP.GT.U32.OR P0, PT, R4, 0xfd, P0 ; /* 0x000000fd0400780c */
/* 0x000fda0000704470 */
/*00b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00c0*/ HFMA2.MMA R11, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0b7435 */
/* 0x000fe200000001ff */
/*00d0*/ LEA R0, R3, R0, 0x8 ; /* 0x0000000003007211 */
/* 0x000fe200078e40ff */
/*00e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00f0*/ IMAD.WIDE R2, R0, R11, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e020b */
/*0100*/ LDG.E R4, [R2.64+-0x4] ; /* 0xfffffc0402047981 */
/* 0x000ea8000c1e1900 */
/*0110*/ LDG.E R5, [R2.64+0x4] ; /* 0x0000040402057981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R7, [R2.64+0x400] ; /* 0x0004000402077981 */
/* 0x000ee8000c1e1900 */
/*0130*/ LDG.E R9, [R2.64+-0x400] ; /* 0xfffc000402097981 */
/* 0x000f22000c1e1900 */
/*0140*/ FADD R4, R4, R5 ; /* 0x0000000504047221 */
/* 0x004fc80000000000 */
/*0150*/ FADD R4, R4, R7 ; /* 0x0000000704047221 */
/* 0x008fc80000000000 */
/*0160*/ FADD R9, R4, R9 ; /* 0x0000000904097221 */
/* 0x010fe40000000000 */
/*0170*/ IMAD.WIDE R4, R0, R11, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e020b */
/*0180*/ FMUL R9, R9, 0.25 ; /* 0x3e80000009097820 */
/* 0x000fca0000400000 */
/*0190*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(cudaError_t e)
{
if (e != cudaSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << cudaGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(cudaMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(cudaMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(cudaMemcpy(T1_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
checkError(cudaMemcpy(T2_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(cudaMemcpy(T, T2_device, NX*NY*sizeof(float),cudaMemcpyDeviceToHost));
cudaDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
cudaFree(T1_device);
cudaFree(T2_device);
} | .file "tmpxft_00181a0a_00000000-6_laplace.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3805:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3805:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "CUDA error: "
.LC1:
.string " : "
.text
.globl _Z10checkError9cudaError
.type _Z10checkError9cudaError, @function
_Z10checkError9cudaError:
.LFB3800:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L8
ret
.L8:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movl %edi, %ebx
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rbp
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
call abort@PLT
.cfi_endproc
.LFE3800:
.size _Z10checkError9cudaError, .-_Z10checkError9cudaError
.globl _Z10InitializePf
.type _Z10InitializePf, @function
_Z10InitializePf:
.LFB3801:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movq %rdi, %rcx
leaq 262144(%rdi), %rdi
movq %rdi, %rdx
movl $0, %esi
.L10:
leaq -262144(%rdx), %rax
.L11:
movl $0x00000000, (%rax)
addq $1024, %rax
cmpq %rdx, %rax
jne .L11
addl $1, %esi
addq $4, %rdx
cmpl $256, %esi
jne .L10
movss .LC3(%rip), %xmm0
.L12:
movss %xmm0, (%rcx)
addq $1024, %rcx
cmpq %rdi, %rcx
jne .L12
movl $0, %eax
movss .LC4(%rip), %xmm3
movss .LC3(%rip), %xmm2
.L13:
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss %xmm3, %xmm0
movaps %xmm2, %xmm1
subss %xmm0, %xmm1
movss %xmm1, 261120(%rbx,%rax,4)
addq $1, %rax
cmpq $256, %rax
jne .L13
movl $0, %ebp
.L14:
pxor %xmm0, %xmm0
cvtsi2ssl %ebp, %xmm0
cvtss2sd %xmm0, %xmm0
mulsd .LC5(%rip), %xmm0
mulsd .LC6(%rip), %xmm0
call cos@PLT
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%rbp,4)
addq $1, %rbp
cmpq $256, %rbp
jne .L14
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3801:
.size _Z10InitializePf, .-_Z10InitializePf
.globl _Z28__device_stub__Z7LaplacePfS_PfS_
.type _Z28__device_stub__Z7LaplacePfS_PfS_, @function
_Z28__device_stub__Z7LaplacePfS_PfS_:
.LFB3827:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L25
.L21:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7LaplacePfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L21
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3827:
.size _Z28__device_stub__Z7LaplacePfS_PfS_, .-_Z28__device_stub__Z7LaplacePfS_PfS_
.globl _Z7LaplacePfS_
.type _Z7LaplacePfS_, @function
_Z7LaplacePfS_:
.LFB3828:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z7LaplacePfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3828:
.size _Z7LaplacePfS_, .-_Z7LaplacePfS_
.section .rodata.str1.1
.LC7:
.string "_Z7LaplacePfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3830:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z7LaplacePfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3830:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC8:
.string "temperature.dat"
.text
.globl main
.type main, @function
main:
.LFB3802:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3802
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $584, %rsp
.cfi_def_cfa_offset 640
movq %fs:40, %rax
movq %rax, 568(%rsp)
xorl %eax, %eax
movl $262144, %edi
.LEHB0:
call _Znam@PLT
movq %rax, %r15
movq %rax, %rdi
call _Z10InitializePf
leaq 8(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl %eax, %edi
call _Z10checkError9cudaError
leaq 16(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, %ecx
movl $262144, %edx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, %ecx
movl $262144, %edx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, 32(%rsp)
movl $16, 36(%rsp)
movl $16, 40(%rsp)
movl $1, 44(%rsp)
movl $100000, %ebx
jmp .L34
.L55:
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z28__device_stub__Z7LaplacePfS_PfS_
jmp .L32
.L33:
subl $1, %ebx
je .L54
.L34:
movl $16, 24(%rsp)
movl $16, 28(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L55
.L32:
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L33
movq 8(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z28__device_stub__Z7LaplacePfS_PfS_
jmp .L33
.L54:
movl $2, %ecx
movl $262144, %edx
movq 16(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rdi
movl $16, %edx
leaq .LC8(%rip), %rsi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
movq %r15, %r13
movl $0, %r12d
leaq 48(%rsp), %r14
jmp .L35
.L59:
movq %rax, %rbx
movb $32, 4(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L36
leaq 4(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
.LEHB1:
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rax, %rbx
.L37:
movl %r12d, %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
jmp .L56
.L36:
movl $32, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L37
.L56:
movq %rax, %rbx
movb $32, 5(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L38
leaq 5(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rax, %rbx
.L39:
pxor %xmm0, %xmm0
cvtss2sd 0(%r13,%rbp,4), %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
jmp .L57
.L38:
movl $32, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L39
.L57:
movq %rax, %rdi
movb $10, 6(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rdi,%rax)
je .L40
leaq 6(%rsp), %rsi
movl $1, %edx
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L41
.L40:
movl $10, %esi
call _ZNSo3putEc@PLT
.L41:
addq $1, %rbp
cmpq $256, %rbp
je .L58
.L42:
movl %ebp, %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
jmp .L59
.L58:
movb $10, 7(%rsp)
movq 48(%rsp), %rax
movq -24(%rax), %rax
cmpq $0, 64(%rsp,%rax)
je .L43
leaq 7(%rsp), %rsi
movl $1, %edx
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L44
.L43:
movl $10, %esi
movq %r14, %rdi
call _ZNSo3putEc@PLT
.L44:
addl $1, %r12d
addq $1024, %r13
cmpl $256, %r12d
je .L45
.L35:
movl $0, %ebp
jmp .L42
.L45:
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
movq %r15, %rdi
call _ZdaPv@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
.LEHE1:
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 568(%rsp), %rax
subq %fs:40, %rax
jne .L60
movl $0, %eax
addq $584, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
endbr64
movq %rax, %rbx
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 568(%rsp), %rax
subq %fs:40, %rax
je .L47
call __stack_chk_fail@PLT
.L47:
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L60:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3802:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA3802:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE3802-.LLSDACSB3802
.LLSDACSB3802:
.uleb128 .LEHB0-.LFB3802
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB3802
.uleb128 .LEHE1-.LEHB1
.uleb128 .L49-.LFB3802
.uleb128 0
.uleb128 .LEHB2-.LFB3802
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE3802:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC3:
.long 1065353216
.align 4
.LC4:
.long 998244352
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 2134057426
.long 1074977148
.align 8
.LC6:
.long 0
.long 1064304640
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(cudaError_t e)
{
if (e != cudaSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << cudaGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(cudaMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(cudaMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(cudaMemcpy(T1_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
checkError(cudaMemcpy(T2_device, T, NX*NY*sizeof(float), cudaMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(cudaMemcpy(T, T2_device, NX*NY*sizeof(float),cudaMemcpyDeviceToHost));
cudaDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
cudaFree(T1_device);
cudaFree(T2_device);
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(hipError_t e)
{
if (e != hipSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << hipGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(hipMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(hipMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(hipMemcpy(T1_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
checkError(hipMemcpy(T2_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(hipMemcpy(T, T2_device, NX*NY*sizeof(float),hipMemcpyDeviceToHost));
hipDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
hipFree(T1_device);
hipFree(T2_device);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(hipError_t e)
{
if (e != hipSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << hipGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(hipMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(hipMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(hipMemcpy(T1_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
checkError(hipMemcpy(T2_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(hipMemcpy(T, T2_device, NX*NY*sizeof(float),hipMemcpyDeviceToHost));
hipDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
hipFree(T1_device);
hipFree(T2_device);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7LaplacePfS_
.globl _Z7LaplacePfS_
.p2align 8
.type _Z7LaplacePfS_,@function
_Z7LaplacePfS_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v2, -1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, -1, v1
v_max_u32_e32 v3, v2, v3
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 0xfe, v3
s_cbranch_execz .LBB0_2
v_lshlrev_b32_e32 v1, 8, v1
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, v1, v0
v_add_nc_u32_e32 v1, v1, v2
v_add_nc_u32_e32 v3, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v5, 0x100, v0
v_add_nc_u32_e32 v7, 0xffffff00, v0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_co_u32 v1, vcc_lo, s0, v1
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
v_add_co_u32 v3, vcc_lo, s0, v3
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_clause 0x1
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v[1:2], off
v_add_co_u32 v1, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v8, vcc_lo
s_clause 0x1
global_load_b32 v5, v[5:6], off
global_load_b32 v2, v[1:2], off
s_waitcnt vmcnt(2)
v_add_f32_e32 v1, v3, v4
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v1, v5
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_mul_f32_e32 v2, 0x3e800000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7LaplacePfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7LaplacePfS_, .Lfunc_end0-_Z7LaplacePfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7LaplacePfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7LaplacePfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <cmath>
// lattice size
int const NX = 256;
int const NY = 256;
int const MaxIter = 200000; // number of Jacobi iterations
void checkError(hipError_t e)
{
if (e != hipSuccess)
{
std::cerr << "CUDA error: " << int(e) << " : " << hipGetErrorString(e) << '\n';
abort();
}
}
// CUDA kernel to update the Tnew array based on the Told
// using Jacobi iterate of the Laplace operator
__global__
void Laplace(float* Told, float* Tnew)
{
// compute the x,y location of the lattice point
// handled by this thread
int x = blockIdx.x*blockDim.x + threadIdx.x ;
int y = blockIdx.y*blockDim.y + threadIdx.y ;
// get the natural index values of node (x,y) and its neighboring nodes
int P = y*NX + x; // node (x,y) N
int E = y*NX + (x+1); // node (x+1,y) |
int W = y*NX + (x-1); // node (x-1,y) W--P--E
int N = (y+1)*NX + x; // node (x,y+1) |
int S = (y-1)*NX + x; // node (x,y-1) S
// only update the interior points - fixed boundary conditions
if(x > 0 && x < (NX-1) && y > 0 && y < (NY-1))
{
Tnew[P] = 0.25*(Told[E] + Told[W] + Told[N] + Told[S]);
}
}
// Initial condition
void Initialize(float* T)
{
// set everything to zero
for(int x=0; x < NX; ++x)
{
for(int y=0; y < NY; ++y)
{
int index = y*NX + x;
T[index] = 0.0;
}
}
// set left wall to 1
for(int y=0; y < NY; ++y)
{
int index = y*NX;
T[index] = 1.0;
}
// set back wall to a ramp
for(int x=0; x < NX; ++x)
{
int index = (NY-1)*NX + x;
T[index] = 1.0 - float(x)/NX;
}
// set front wall to a sinusoid
for(int x=0; x < NX; ++x)
{
int index = x;
T[index] = std::cos(3.0 * M_PI_2 * float(x)/NX);
}
}
int main()
{
// The temperature matrix on the CPU
float* T = new float[NX*NY];
// Storage on the device (GPU)
float* T1_device;
float* T2_device;
// initialize array on the host
Initialize(T);
// allocate storage space on the GPU
checkError(hipMalloc(&T1_device, NX*NY*sizeof(float)));
checkError(hipMalloc(&T2_device, NX*NY*sizeof(float)));
// copy (initialized) host arrays to the GPU memory from CPU memory
checkError(hipMemcpy(T1_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
checkError(hipMemcpy(T2_device, T, NX*NY*sizeof(float), hipMemcpyHostToDevice));
// assign a 2D distribution of CUDA "threads" within each CUDA "block".
dim3 dimBlock(16, 16); // total of 256 threads per block
// calculate number of blocks along X and Y in a 2D CUDA "grid"
dim3 dimGrid((NX+dimBlock.x-1) / dimBlock.x, (NY+dimBlock.y-1) / dimBlock.y);
// begin Jacobi iteration
for (int k = 0; k < MaxIter; k += 2)
{
Laplace<<<dimGrid, dimBlock>>>(T1_device, T2_device); // update T1 using data stored in T2
Laplace<<<dimGrid, dimBlock>>>(T2_device, T1_device); // update T2 using data stored in T1
}
// copy final array to the CPU from the GPU
checkError(hipMemcpy(T, T2_device, NX*NY*sizeof(float),hipMemcpyDeviceToHost));
hipDeviceSynchronize();
// print the results to a file
std::ofstream Out("temperature.dat");
for (int y = 0; y < NY; ++y)
{
for (int x = 0; x < NX; ++x)
{
int index = y*NX + x;
Out << x << ' ' << y << ' ' << T[index] << '\n';
}
Out << '\n';
}
Out.close();
// release memory
delete[] T;
hipFree(T1_device);
hipFree(T2_device);
} | .text
.file "laplace.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10checkError10hipError_t # -- Begin function _Z10checkError10hipError_t
.p2align 4, 0x90
.type _Z10checkError10hipError_t,@function
_Z10checkError10hipError_t: # @_Z10checkError10hipError_t
.cfi_startproc
# %bb.0:
testl %edi, %edi
jne .LBB0_2
# %bb.1:
retq
.LBB0_2:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl %edi, %ebx
movl $_ZSt4cerr, %edi
movl $.L.str, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebx, %esi
callq _ZNSolsEi
movl $.L.str.1, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %r14
movl %ebx, %edi
callq hipGetErrorString
movq %r14, %rdi
movq %rax, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl $10, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
callq abort
.Lfunc_end0:
.size _Z10checkError10hipError_t, .Lfunc_end0-_Z10checkError10hipError_t
.cfi_endproc
# -- End function
.globl _Z22__device_stub__LaplacePfS_ # -- Begin function _Z22__device_stub__LaplacePfS_
.p2align 4, 0x90
.type _Z22__device_stub__LaplacePfS_,@function
_Z22__device_stub__LaplacePfS_: # @_Z22__device_stub__LaplacePfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7LaplacePfS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z22__device_stub__LaplacePfS_, .Lfunc_end1-_Z22__device_stub__LaplacePfS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10InitializePf
.LCPI2_0:
.long 0xbb800000 # float -0.00390625
.LCPI2_1:
.long 0x3f800000 # float 1
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI2_2:
.quad 0x4012d97c7f3321d2 # double 4.7123889803846897
.LCPI2_3:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl _Z10InitializePf
.p2align 4, 0x90
.type _Z10InitializePf,@function
_Z10InitializePf: # @_Z10InitializePf
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rbx
xorl %eax, %eax
movq %rdi, %rcx
.p2align 4, 0x90
.LBB2_1: # %.preheader30
# =>This Loop Header: Depth=1
# Child Loop BB2_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB2_2: # Parent Loop BB2_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $0, (%rcx,%rdx)
addq $1024, %rdx # imm = 0x400
cmpq $262144, %rdx # imm = 0x40000
jne .LBB2_2
# %bb.3: # in Loop: Header=BB2_1 Depth=1
incq %rax
addq $4, %rcx
cmpq $256, %rax # imm = 0x100
jne .LBB2_1
# %bb.4: # %.preheader29.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_5: # %.preheader29
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%rbx,%rax) # imm = 0x3F800000
addq $1024, %rax # imm = 0x400
cmpq $262144, %rax # imm = 0x40000
jne .LBB2_5
# %bb.6: # %.preheader28.preheader
xorl %eax, %eax
movss .LCPI2_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss .LCPI2_1(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
.p2align 4, 0x90
.LBB2_7: # %.preheader28
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2ss %eax, %xmm2
mulss %xmm0, %xmm2
addss %xmm1, %xmm2
movss %xmm2, 261120(%rbx,%rax,4)
incq %rax
cmpq $256, %rax # imm = 0x100
jne .LBB2_7
# %bb.8: # %.preheader.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB2_9: # %.preheader
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
mulsd .LCPI2_2(%rip), %xmm0
mulsd .LCPI2_3(%rip), %xmm0
callq cos
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r14,4)
incq %r14
cmpq $256, %r14 # imm = 0x100
jne .LBB2_9
# %bb.10:
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z10InitializePf, .Lfunc_end2-_Z10InitializePf
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0xbb800000 # float -0.00390625
.LCPI3_1:
.long 0x3f800000 # float 1
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_2:
.quad 0x4012d97c7f3321d2 # double 4.7123889803846897
.LCPI3_3:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 672
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $262144, %edi # imm = 0x40000
callq _Znam
movq %rax, %rbx
xorl %eax, %eax
movq %rbx, %rcx
.p2align 4, 0x90
.LBB3_1: # %.preheader30.i
# =>This Loop Header: Depth=1
# Child Loop BB3_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB3_2: # Parent Loop BB3_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $0, (%rcx,%rdx)
addq $1024, %rdx # imm = 0x400
cmpq $262144, %rdx # imm = 0x40000
jne .LBB3_2
# %bb.3: # in Loop: Header=BB3_1 Depth=1
incq %rax
addq $4, %rcx
cmpq $256, %rax # imm = 0x100
jne .LBB3_1
# %bb.4: # %.preheader29.i.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_5: # %.preheader29.i
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%rbx,%rax) # imm = 0x3F800000
addq $1024, %rax # imm = 0x400
cmpq $262144, %rax # imm = 0x40000
jne .LBB3_5
# %bb.6: # %.preheader28.i.preheader
xorl %eax, %eax
movss .LCPI3_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss .LCPI3_1(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
.p2align 4, 0x90
.LBB3_7: # %.preheader28.i
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2ss %eax, %xmm2
mulss %xmm0, %xmm2
addss %xmm1, %xmm2
movss %xmm2, 261120(%rbx,%rax,4)
incq %rax
cmpq $256, %rax # imm = 0x100
jne .LBB3_7
# %bb.8: # %.preheader.i.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_9: # %.preheader.i
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
mulsd .LCPI3_2(%rip), %xmm0
mulsd .LCPI3_3(%rip), %xmm0
.cfi_escape 0x2e, 0x00
callq cos
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r14,4)
incq %r14
cmpq $256, %r14 # imm = 0x100
jne .LBB3_9
# %bb.10: # %_Z10InitializePf.exit
movabsq $68719476752, %r14 # imm = 0x1000000010
.cfi_escape 0x2e, 0x00
leaq 32(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
.cfi_escape 0x2e, 0x00
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movq 32(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movq 24(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq %rbx, 64(%rsp) # 8-byte Spill
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movl $-2, %r12d
leaq 88(%rsp), %rbx
leaq 80(%rsp), %r13
leaq 72(%rsp), %rbp
leaq 96(%rsp), %r15
jmp .LBB3_11
.p2align 4, 0x90
.LBB3_15: # in Loop: Header=BB3_11 Depth=1
addl $2, %r12d
cmpl $199998, %r12d # imm = 0x30D3E
jae .LBB3_16
.LBB3_11: # =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_13
# %bb.12: # in Loop: Header=BB3_11 Depth=1
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 56(%rsp)
movq %rbx, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
leaq 40(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 8(%rsp), %rsi
movl 16(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z7LaplacePfS_, %edi
movq %r15, %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_13: # in Loop: Header=BB3_11 Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_15
# %bb.14: # in Loop: Header=BB3_11 Depth=1
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 56(%rsp)
movq %rbx, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
leaq 40(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 8(%rsp), %rsi
movl 16(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z7LaplacePfS_, %edi
movq %r15, %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB3_15
.LBB3_16:
movq 24(%rsp), %rsi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq 64(%rsp), %rbp # 8-byte Reload
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
.cfi_escape 0x2e, 0x00
callq hipDeviceSynchronize
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %r14
movl $.L.str.2, %esi
movq %r14, %rdi
movl $16, %edx
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
xorl %r15d, %r15d
leaq 8(%rsp), %r12
jmp .LBB3_17
.p2align 4, 0x90
.LBB3_29: # in Loop: Header=BB3_17 Depth=1
.Ltmp21:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $10, %esi
callq _ZNSo3putEc
.Ltmp22:
.LBB3_30: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
# in Loop: Header=BB3_17 Depth=1
incq %r15
addq $1024, %rbp # imm = 0x400
cmpq $256, %r15 # imm = 0x100
je .LBB3_21
.LBB3_17: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_18 Depth 2
xorl %r13d, %r13d
jmp .LBB3_18
.p2align 4, 0x90
.LBB3_39: # in Loop: Header=BB3_18 Depth=2
.Ltmp16:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $10, %esi
callq _ZNSo3putEc
.Ltmp17:
.LBB3_40: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit66
# in Loop: Header=BB3_18 Depth=2
incq %r13
cmpq $256, %r13 # imm = 0x100
je .LBB3_27
.LBB3_18: # Parent Loop BB3_17 Depth=1
# => This Inner Loop Header: Depth=2
.Ltmp0:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl %r13d, %esi
callq _ZNSolsEi
.Ltmp1:
# %bb.19: # in Loop: Header=BB3_18 Depth=2
movb $32, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_31
# %bb.20: # in Loop: Header=BB3_18 Depth=2
.Ltmp2:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
jmp .LBB3_32
.p2align 4, 0x90
.LBB3_31: # in Loop: Header=BB3_18 Depth=2
.Ltmp4:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $32, %esi
movq %rax, %rbx
callq _ZNSo3putEc
movq %rbx, %rax
.Ltmp5:
.LBB3_32: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit55
# in Loop: Header=BB3_18 Depth=2
.Ltmp6:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl %r15d, %esi
callq _ZNSolsEi
.Ltmp7:
# %bb.33: # in Loop: Header=BB3_18 Depth=2
movb $32, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_35
# %bb.34: # in Loop: Header=BB3_18 Depth=2
.Ltmp8:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
jmp .LBB3_36
.p2align 4, 0x90
.LBB3_35: # in Loop: Header=BB3_18 Depth=2
.Ltmp10:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $32, %esi
movq %rax, %rbx
callq _ZNSo3putEc
movq %rbx, %rax
.Ltmp11:
.LBB3_36: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit60
# in Loop: Header=BB3_18 Depth=2
movss (%rbp,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
.Ltmp12:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo9_M_insertIdEERSoT_
.Ltmp13:
# %bb.37: # %_ZNSolsEf.exit
# in Loop: Header=BB3_18 Depth=2
movb $10, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_39
# %bb.38: # in Loop: Header=BB3_18 Depth=2
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
jmp .LBB3_40
.p2align 4, 0x90
.LBB3_27: # in Loop: Header=BB3_17 Depth=1
movb $10, 8(%rsp)
movq 96(%rsp), %rax
movq -24(%rax), %rax
cmpq $0, 112(%rsp,%rax)
je .LBB3_29
# %bb.28: # in Loop: Header=BB3_17 Depth=1
.Ltmp19:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %r14, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp20:
jmp .LBB3_30
.LBB3_21:
leaq 104(%rsp), %rdi
.Ltmp24:
.cfi_escape 0x2e, 0x00
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp25:
# %bb.22: # %.noexc
testq %rax, %rax
jne .LBB3_24
# %bb.23:
movq 96(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $96, %rdi
movl 128(%rsp,%rax), %esi
orl $4, %esi
.Ltmp26:
.cfi_escape 0x2e, 0x00
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp27:
.LBB3_24: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
.cfi_escape 0x2e, 0x00
movq 64(%rsp), %rdi # 8-byte Reload
callq _ZdaPv
movq 32(%rsp), %rdi
.Ltmp28:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp29:
# %bb.25:
movq 24(%rsp), %rdi
.Ltmp30:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp31:
# %bb.26:
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
xorl %eax, %eax
addq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_43:
.cfi_def_cfa_offset 672
.Ltmp32:
jmp .LBB3_44
.LBB3_42:
.Ltmp23:
jmp .LBB3_44
.LBB3_41:
.Ltmp18:
.LBB3_44:
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table3:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp21-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp21
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp21-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp22-.Ltmp21 # Call between .Ltmp21 and .Ltmp22
.uleb128 .Ltmp23-.Lfunc_begin0 # jumps to .Ltmp23
.byte 0 # On action: cleanup
.uleb128 .Ltmp16-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp15-.Ltmp16 # Call between .Ltmp16 and .Ltmp15
.uleb128 .Ltmp18-.Lfunc_begin0 # jumps to .Ltmp18
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp20-.Ltmp19 # Call between .Ltmp19 and .Ltmp20
.uleb128 .Ltmp23-.Lfunc_begin0 # jumps to .Ltmp23
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp31-.Ltmp24 # Call between .Ltmp24 and .Ltmp31
.uleb128 .Ltmp32-.Lfunc_begin0 # jumps to .Ltmp32
.byte 0 # On action: cleanup
.uleb128 .Ltmp31-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Lfunc_end3-.Ltmp31 # Call between .Ltmp31 and .Lfunc_end3
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7LaplacePfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "CUDA error: "
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " : "
.size .L.str.1, 4
.type _Z7LaplacePfS_,@object # @_Z7LaplacePfS_
.section .rodata,"a",@progbits
.globl _Z7LaplacePfS_
.p2align 3, 0x0
_Z7LaplacePfS_:
.quad _Z22__device_stub__LaplacePfS_
.size _Z7LaplacePfS_, 8
.type .L.str.2,@object # @.str.2
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.2:
.asciz "temperature.dat"
.size .L.str.2, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z7LaplacePfS_"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__LaplacePfS_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _ZSt4cerr
.addrsig_sym _Z7LaplacePfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7LaplacePfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc400078e0203 */
/*0060*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fc600078e0205 */
/*0070*/ IADD3 R2, R0, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x000fe40007ffe0ff */
/*0080*/ IADD3 R4, R3, -0x1, RZ ; /* 0xffffffff03047810 */
/* 0x000fe40007ffe0ff */
/*0090*/ ISETP.GT.U32.AND P0, PT, R2, 0xfd, PT ; /* 0x000000fd0200780c */
/* 0x000fc80003f04070 */
/*00a0*/ ISETP.GT.U32.OR P0, PT, R4, 0xfd, P0 ; /* 0x000000fd0400780c */
/* 0x000fda0000704470 */
/*00b0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00c0*/ HFMA2.MMA R11, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0b7435 */
/* 0x000fe200000001ff */
/*00d0*/ LEA R0, R3, R0, 0x8 ; /* 0x0000000003007211 */
/* 0x000fe200078e40ff */
/*00e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00f0*/ IMAD.WIDE R2, R0, R11, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e020b */
/*0100*/ LDG.E R4, [R2.64+-0x4] ; /* 0xfffffc0402047981 */
/* 0x000ea8000c1e1900 */
/*0110*/ LDG.E R5, [R2.64+0x4] ; /* 0x0000040402057981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R7, [R2.64+0x400] ; /* 0x0004000402077981 */
/* 0x000ee8000c1e1900 */
/*0130*/ LDG.E R9, [R2.64+-0x400] ; /* 0xfffc000402097981 */
/* 0x000f22000c1e1900 */
/*0140*/ FADD R4, R4, R5 ; /* 0x0000000504047221 */
/* 0x004fc80000000000 */
/*0150*/ FADD R4, R4, R7 ; /* 0x0000000704047221 */
/* 0x008fc80000000000 */
/*0160*/ FADD R9, R4, R9 ; /* 0x0000000904097221 */
/* 0x010fe40000000000 */
/*0170*/ IMAD.WIDE R4, R0, R11, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e020b */
/*0180*/ FMUL R9, R9, 0.25 ; /* 0x3e80000009097820 */
/* 0x000fca0000400000 */
/*0190*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7LaplacePfS_
.globl _Z7LaplacePfS_
.p2align 8
.type _Z7LaplacePfS_,@function
_Z7LaplacePfS_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_lshr_b32 s2, s2, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s2, v[3:4]
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v2, -1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, -1, v1
v_max_u32_e32 v3, v2, v3
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 0xfe, v3
s_cbranch_execz .LBB0_2
v_lshlrev_b32_e32 v1, 8, v1
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, v1, v0
v_add_nc_u32_e32 v1, v1, v2
v_add_nc_u32_e32 v3, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v5, 0x100, v0
v_add_nc_u32_e32 v7, 0xffffff00, v0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_add_co_u32 v1, vcc_lo, s0, v1
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
v_add_co_u32 v3, vcc_lo, s0, v3
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_clause 0x1
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v[1:2], off
v_add_co_u32 v1, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v8, vcc_lo
s_clause 0x1
global_load_b32 v5, v[5:6], off
global_load_b32 v2, v[1:2], off
s_waitcnt vmcnt(2)
v_add_f32_e32 v1, v3, v4
s_waitcnt vmcnt(1)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_f32_e32 v3, v1, v5
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_mul_f32_e32 v2, 0x3e800000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7LaplacePfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7LaplacePfS_, .Lfunc_end0-_Z7LaplacePfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7LaplacePfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z7LaplacePfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00181a0a_00000000-6_laplace.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3805:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3805:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "CUDA error: "
.LC1:
.string " : "
.text
.globl _Z10checkError9cudaError
.type _Z10checkError9cudaError, @function
_Z10checkError9cudaError:
.LFB3800:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L8
ret
.L8:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movl %edi, %ebx
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rbp
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $10, %esi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
call abort@PLT
.cfi_endproc
.LFE3800:
.size _Z10checkError9cudaError, .-_Z10checkError9cudaError
.globl _Z10InitializePf
.type _Z10InitializePf, @function
_Z10InitializePf:
.LFB3801:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movq %rdi, %rcx
leaq 262144(%rdi), %rdi
movq %rdi, %rdx
movl $0, %esi
.L10:
leaq -262144(%rdx), %rax
.L11:
movl $0x00000000, (%rax)
addq $1024, %rax
cmpq %rdx, %rax
jne .L11
addl $1, %esi
addq $4, %rdx
cmpl $256, %esi
jne .L10
movss .LC3(%rip), %xmm0
.L12:
movss %xmm0, (%rcx)
addq $1024, %rcx
cmpq %rdi, %rcx
jne .L12
movl $0, %eax
movss .LC4(%rip), %xmm3
movss .LC3(%rip), %xmm2
.L13:
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss %xmm3, %xmm0
movaps %xmm2, %xmm1
subss %xmm0, %xmm1
movss %xmm1, 261120(%rbx,%rax,4)
addq $1, %rax
cmpq $256, %rax
jne .L13
movl $0, %ebp
.L14:
pxor %xmm0, %xmm0
cvtsi2ssl %ebp, %xmm0
cvtss2sd %xmm0, %xmm0
mulsd .LC5(%rip), %xmm0
mulsd .LC6(%rip), %xmm0
call cos@PLT
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%rbp,4)
addq $1, %rbp
cmpq $256, %rbp
jne .L14
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3801:
.size _Z10InitializePf, .-_Z10InitializePf
.globl _Z28__device_stub__Z7LaplacePfS_PfS_
.type _Z28__device_stub__Z7LaplacePfS_PfS_, @function
_Z28__device_stub__Z7LaplacePfS_PfS_:
.LFB3827:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L25
.L21:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7LaplacePfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L21
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3827:
.size _Z28__device_stub__Z7LaplacePfS_PfS_, .-_Z28__device_stub__Z7LaplacePfS_PfS_
.globl _Z7LaplacePfS_
.type _Z7LaplacePfS_, @function
_Z7LaplacePfS_:
.LFB3828:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z7LaplacePfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3828:
.size _Z7LaplacePfS_, .-_Z7LaplacePfS_
.section .rodata.str1.1
.LC7:
.string "_Z7LaplacePfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3830:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z7LaplacePfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3830:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC8:
.string "temperature.dat"
.text
.globl main
.type main, @function
main:
.LFB3802:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA3802
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $584, %rsp
.cfi_def_cfa_offset 640
movq %fs:40, %rax
movq %rax, 568(%rsp)
xorl %eax, %eax
movl $262144, %edi
.LEHB0:
call _Znam@PLT
movq %rax, %r15
movq %rax, %rdi
call _Z10InitializePf
leaq 8(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl %eax, %edi
call _Z10checkError9cudaError
leaq 16(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, %ecx
movl $262144, %edx
movq %r15, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, %ecx
movl $262144, %edx
movq %r15, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
movl $1, 32(%rsp)
movl $16, 36(%rsp)
movl $16, 40(%rsp)
movl $1, 44(%rsp)
movl $100000, %ebx
jmp .L34
.L55:
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z28__device_stub__Z7LaplacePfS_PfS_
jmp .L32
.L33:
subl $1, %ebx
je .L54
.L34:
movl $16, 24(%rsp)
movl $16, 28(%rsp)
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L55
.L32:
movl 32(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 24(%rsp), %rdx
movq 36(%rsp), %rdi
movl 44(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L33
movq 8(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z28__device_stub__Z7LaplacePfS_PfS_
jmp .L33
.L54:
movl $2, %ecx
movl $262144, %edx
movq 16(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
call _Z10checkError9cudaError
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rdi
movl $16, %edx
leaq .LC8(%rip), %rsi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
movq %r15, %r13
movl $0, %r12d
leaq 48(%rsp), %r14
jmp .L35
.L59:
movq %rax, %rbx
movb $32, 4(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L36
leaq 4(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
.LEHB1:
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rax, %rbx
.L37:
movl %r12d, %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
jmp .L56
.L36:
movl $32, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L37
.L56:
movq %rax, %rbx
movb $32, 5(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rbx,%rax)
je .L38
leaq 5(%rsp), %rsi
movl $1, %edx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rax, %rbx
.L39:
pxor %xmm0, %xmm0
cvtss2sd 0(%r13,%rbp,4), %xmm0
movq %rbx, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
jmp .L57
.L38:
movl $32, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L39
.L57:
movq %rax, %rdi
movb $10, 6(%rsp)
movq (%rax), %rax
movq -24(%rax), %rax
cmpq $0, 16(%rdi,%rax)
je .L40
leaq 6(%rsp), %rsi
movl $1, %edx
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L41
.L40:
movl $10, %esi
call _ZNSo3putEc@PLT
.L41:
addq $1, %rbp
cmpq $256, %rbp
je .L58
.L42:
movl %ebp, %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
jmp .L59
.L58:
movb $10, 7(%rsp)
movq 48(%rsp), %rax
movq -24(%rax), %rax
cmpq $0, 64(%rsp,%rax)
je .L43
leaq 7(%rsp), %rsi
movl $1, %edx
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L44
.L43:
movl $10, %esi
movq %r14, %rdi
call _ZNSo3putEc@PLT
.L44:
addl $1, %r12d
addq $1024, %r13
cmpl $256, %r12d
je .L45
.L35:
movl $0, %ebp
jmp .L42
.L45:
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
movq %r15, %rdi
call _ZdaPv@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
.LEHE1:
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 568(%rsp), %rax
subq %fs:40, %rax
jne .L60
movl $0, %eax
addq $584, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
endbr64
movq %rax, %rbx
leaq 48(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 568(%rsp), %rax
subq %fs:40, %rax
je .L47
call __stack_chk_fail@PLT
.L47:
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L60:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3802:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA3802:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE3802-.LLSDACSB3802
.LLSDACSB3802:
.uleb128 .LEHB0-.LFB3802
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB3802
.uleb128 .LEHE1-.LEHB1
.uleb128 .L49-.LFB3802
.uleb128 0
.uleb128 .LEHB2-.LFB3802
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE3802:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC3:
.long 1065353216
.align 4
.LC4:
.long 998244352
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 2134057426
.long 1074977148
.align 8
.LC6:
.long 0
.long 1064304640
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "laplace.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10checkError10hipError_t # -- Begin function _Z10checkError10hipError_t
.p2align 4, 0x90
.type _Z10checkError10hipError_t,@function
_Z10checkError10hipError_t: # @_Z10checkError10hipError_t
.cfi_startproc
# %bb.0:
testl %edi, %edi
jne .LBB0_2
# %bb.1:
retq
.LBB0_2:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl %edi, %ebx
movl $_ZSt4cerr, %edi
movl $.L.str, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebx, %esi
callq _ZNSolsEi
movl $.L.str.1, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %r14
movl %ebx, %edi
callq hipGetErrorString
movq %r14, %rdi
movq %rax, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl $10, %esi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c
callq abort
.Lfunc_end0:
.size _Z10checkError10hipError_t, .Lfunc_end0-_Z10checkError10hipError_t
.cfi_endproc
# -- End function
.globl _Z22__device_stub__LaplacePfS_ # -- Begin function _Z22__device_stub__LaplacePfS_
.p2align 4, 0x90
.type _Z22__device_stub__LaplacePfS_,@function
_Z22__device_stub__LaplacePfS_: # @_Z22__device_stub__LaplacePfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7LaplacePfS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z22__device_stub__LaplacePfS_, .Lfunc_end1-_Z22__device_stub__LaplacePfS_
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z10InitializePf
.LCPI2_0:
.long 0xbb800000 # float -0.00390625
.LCPI2_1:
.long 0x3f800000 # float 1
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI2_2:
.quad 0x4012d97c7f3321d2 # double 4.7123889803846897
.LCPI2_3:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl _Z10InitializePf
.p2align 4, 0x90
.type _Z10InitializePf,@function
_Z10InitializePf: # @_Z10InitializePf
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movq %rdi, %rbx
xorl %eax, %eax
movq %rdi, %rcx
.p2align 4, 0x90
.LBB2_1: # %.preheader30
# =>This Loop Header: Depth=1
# Child Loop BB2_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB2_2: # Parent Loop BB2_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $0, (%rcx,%rdx)
addq $1024, %rdx # imm = 0x400
cmpq $262144, %rdx # imm = 0x40000
jne .LBB2_2
# %bb.3: # in Loop: Header=BB2_1 Depth=1
incq %rax
addq $4, %rcx
cmpq $256, %rax # imm = 0x100
jne .LBB2_1
# %bb.4: # %.preheader29.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_5: # %.preheader29
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%rbx,%rax) # imm = 0x3F800000
addq $1024, %rax # imm = 0x400
cmpq $262144, %rax # imm = 0x40000
jne .LBB2_5
# %bb.6: # %.preheader28.preheader
xorl %eax, %eax
movss .LCPI2_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss .LCPI2_1(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
.p2align 4, 0x90
.LBB2_7: # %.preheader28
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2ss %eax, %xmm2
mulss %xmm0, %xmm2
addss %xmm1, %xmm2
movss %xmm2, 261120(%rbx,%rax,4)
incq %rax
cmpq $256, %rax # imm = 0x100
jne .LBB2_7
# %bb.8: # %.preheader.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB2_9: # %.preheader
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
mulsd .LCPI2_2(%rip), %xmm0
mulsd .LCPI2_3(%rip), %xmm0
callq cos
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r14,4)
incq %r14
cmpq $256, %r14 # imm = 0x100
jne .LBB2_9
# %bb.10:
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z10InitializePf, .Lfunc_end2-_Z10InitializePf
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0xbb800000 # float -0.00390625
.LCPI3_1:
.long 0x3f800000 # float 1
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI3_2:
.quad 0x4012d97c7f3321d2 # double 4.7123889803846897
.LCPI3_3:
.quad 0x3f70000000000000 # double 0.00390625
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 672
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $262144, %edi # imm = 0x40000
callq _Znam
movq %rax, %rbx
xorl %eax, %eax
movq %rbx, %rcx
.p2align 4, 0x90
.LBB3_1: # %.preheader30.i
# =>This Loop Header: Depth=1
# Child Loop BB3_2 Depth 2
xorl %edx, %edx
.p2align 4, 0x90
.LBB3_2: # Parent Loop BB3_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $0, (%rcx,%rdx)
addq $1024, %rdx # imm = 0x400
cmpq $262144, %rdx # imm = 0x40000
jne .LBB3_2
# %bb.3: # in Loop: Header=BB3_1 Depth=1
incq %rax
addq $4, %rcx
cmpq $256, %rax # imm = 0x100
jne .LBB3_1
# %bb.4: # %.preheader29.i.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB3_5: # %.preheader29.i
# =>This Inner Loop Header: Depth=1
movl $1065353216, (%rbx,%rax) # imm = 0x3F800000
addq $1024, %rax # imm = 0x400
cmpq $262144, %rax # imm = 0x40000
jne .LBB3_5
# %bb.6: # %.preheader28.i.preheader
xorl %eax, %eax
movss .LCPI3_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss .LCPI3_1(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
.p2align 4, 0x90
.LBB3_7: # %.preheader28.i
# =>This Inner Loop Header: Depth=1
xorps %xmm2, %xmm2
cvtsi2ss %eax, %xmm2
mulss %xmm0, %xmm2
addss %xmm1, %xmm2
movss %xmm2, 261120(%rbx,%rax,4)
incq %rax
cmpq $256, %rax # imm = 0x100
jne .LBB3_7
# %bb.8: # %.preheader.i.preheader
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB3_9: # %.preheader.i
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
mulsd .LCPI3_2(%rip), %xmm0
mulsd .LCPI3_3(%rip), %xmm0
.cfi_escape 0x2e, 0x00
callq cos
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r14,4)
incq %r14
cmpq $256, %r14 # imm = 0x100
jne .LBB3_9
# %bb.10: # %_Z10InitializePf.exit
movabsq $68719476752, %r14 # imm = 0x1000000010
.cfi_escape 0x2e, 0x00
leaq 32(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
.cfi_escape 0x2e, 0x00
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movq 32(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movq 24(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq %rbx, 64(%rsp) # 8-byte Spill
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
movl $-2, %r12d
leaq 88(%rsp), %rbx
leaq 80(%rsp), %r13
leaq 72(%rsp), %rbp
leaq 96(%rsp), %r15
jmp .LBB3_11
.p2align 4, 0x90
.LBB3_15: # in Loop: Header=BB3_11 Depth=1
addl $2, %r12d
cmpl $199998, %r12d # imm = 0x30D3E
jae .LBB3_16
.LBB3_11: # =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_13
# %bb.12: # in Loop: Header=BB3_11 Depth=1
movq 32(%rsp), %rax
movq 24(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 56(%rsp)
movq %rbx, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
leaq 40(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 8(%rsp), %rsi
movl 16(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z7LaplacePfS_, %edi
movq %r15, %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_13: # in Loop: Header=BB3_11 Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_15
# %bb.14: # in Loop: Header=BB3_11 Depth=1
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 56(%rsp)
movq %rbx, 96(%rsp)
leaq 56(%rsp), %rax
movq %rax, 104(%rsp)
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
leaq 40(%rsp), %rsi
movq %r13, %rdx
movq %rbp, %rcx
callq __hipPopCallConfiguration
movq 8(%rsp), %rsi
movl 16(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z7LaplacePfS_, %edi
movq %r15, %r9
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB3_15
.LBB3_16:
movq 24(%rsp), %rsi
.cfi_escape 0x2e, 0x00
movl $262144, %edx # imm = 0x40000
movq 64(%rsp), %rbp # 8-byte Reload
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl %eax, %edi
callq _Z10checkError10hipError_t
.cfi_escape 0x2e, 0x00
callq hipDeviceSynchronize
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %r14
movl $.L.str.2, %esi
movq %r14, %rdi
movl $16, %edx
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
xorl %r15d, %r15d
leaq 8(%rsp), %r12
jmp .LBB3_17
.p2align 4, 0x90
.LBB3_29: # in Loop: Header=BB3_17 Depth=1
.Ltmp21:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $10, %esi
callq _ZNSo3putEc
.Ltmp22:
.LBB3_30: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
# in Loop: Header=BB3_17 Depth=1
incq %r15
addq $1024, %rbp # imm = 0x400
cmpq $256, %r15 # imm = 0x100
je .LBB3_21
.LBB3_17: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_18 Depth 2
xorl %r13d, %r13d
jmp .LBB3_18
.p2align 4, 0x90
.LBB3_39: # in Loop: Header=BB3_18 Depth=2
.Ltmp16:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $10, %esi
callq _ZNSo3putEc
.Ltmp17:
.LBB3_40: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit66
# in Loop: Header=BB3_18 Depth=2
incq %r13
cmpq $256, %r13 # imm = 0x100
je .LBB3_27
.LBB3_18: # Parent Loop BB3_17 Depth=1
# => This Inner Loop Header: Depth=2
.Ltmp0:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl %r13d, %esi
callq _ZNSolsEi
.Ltmp1:
# %bb.19: # in Loop: Header=BB3_18 Depth=2
movb $32, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_31
# %bb.20: # in Loop: Header=BB3_18 Depth=2
.Ltmp2:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
jmp .LBB3_32
.p2align 4, 0x90
.LBB3_31: # in Loop: Header=BB3_18 Depth=2
.Ltmp4:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $32, %esi
movq %rax, %rbx
callq _ZNSo3putEc
movq %rbx, %rax
.Ltmp5:
.LBB3_32: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit55
# in Loop: Header=BB3_18 Depth=2
.Ltmp6:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl %r15d, %esi
callq _ZNSolsEi
.Ltmp7:
# %bb.33: # in Loop: Header=BB3_18 Depth=2
movb $32, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_35
# %bb.34: # in Loop: Header=BB3_18 Depth=2
.Ltmp8:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp9:
jmp .LBB3_36
.p2align 4, 0x90
.LBB3_35: # in Loop: Header=BB3_18 Depth=2
.Ltmp10:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
movl $32, %esi
movq %rax, %rbx
callq _ZNSo3putEc
movq %rbx, %rax
.Ltmp11:
.LBB3_36: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit60
# in Loop: Header=BB3_18 Depth=2
movss (%rbp,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
.Ltmp12:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo9_M_insertIdEERSoT_
.Ltmp13:
# %bb.37: # %_ZNSolsEf.exit
# in Loop: Header=BB3_18 Depth=2
movb $10, 8(%rsp)
movq (%rax), %rcx
movq -24(%rcx), %rcx
cmpq $0, 16(%rax,%rcx)
je .LBB3_39
# %bb.38: # in Loop: Header=BB3_18 Depth=2
.Ltmp14:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %rax, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
jmp .LBB3_40
.p2align 4, 0x90
.LBB3_27: # in Loop: Header=BB3_17 Depth=1
movb $10, 8(%rsp)
movq 96(%rsp), %rax
movq -24(%rax), %rax
cmpq $0, 112(%rsp,%rax)
je .LBB3_29
# %bb.28: # in Loop: Header=BB3_17 Depth=1
.Ltmp19:
.cfi_escape 0x2e, 0x00
movl $1, %edx
movq %r14, %rdi
movq %r12, %rsi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp20:
jmp .LBB3_30
.LBB3_21:
leaq 104(%rsp), %rdi
.Ltmp24:
.cfi_escape 0x2e, 0x00
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp25:
# %bb.22: # %.noexc
testq %rax, %rax
jne .LBB3_24
# %bb.23:
movq 96(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $96, %rdi
movl 128(%rsp,%rax), %esi
orl $4, %esi
.Ltmp26:
.cfi_escape 0x2e, 0x00
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp27:
.LBB3_24: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
.cfi_escape 0x2e, 0x00
movq 64(%rsp), %rdi # 8-byte Reload
callq _ZdaPv
movq 32(%rsp), %rdi
.Ltmp28:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp29:
# %bb.25:
movq 24(%rsp), %rdi
.Ltmp30:
.cfi_escape 0x2e, 0x00
callq hipFree
.Ltmp31:
# %bb.26:
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
xorl %eax, %eax
addq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB3_43:
.cfi_def_cfa_offset 672
.Ltmp32:
jmp .LBB3_44
.LBB3_42:
.Ltmp23:
jmp .LBB3_44
.LBB3_41:
.Ltmp18:
.LBB3_44:
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table3:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp21-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp21
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp21-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp22-.Ltmp21 # Call between .Ltmp21 and .Ltmp22
.uleb128 .Ltmp23-.Lfunc_begin0 # jumps to .Ltmp23
.byte 0 # On action: cleanup
.uleb128 .Ltmp16-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp15-.Ltmp16 # Call between .Ltmp16 and .Ltmp15
.uleb128 .Ltmp18-.Lfunc_begin0 # jumps to .Ltmp18
.byte 0 # On action: cleanup
.uleb128 .Ltmp19-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp20-.Ltmp19 # Call between .Ltmp19 and .Ltmp20
.uleb128 .Ltmp23-.Lfunc_begin0 # jumps to .Ltmp23
.byte 0 # On action: cleanup
.uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp31-.Ltmp24 # Call between .Ltmp24 and .Ltmp31
.uleb128 .Ltmp32-.Lfunc_begin0 # jumps to .Ltmp32
.byte 0 # On action: cleanup
.uleb128 .Ltmp31-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Lfunc_end3-.Ltmp31 # Call between .Ltmp31 and .Lfunc_end3
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7LaplacePfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "CUDA error: "
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " : "
.size .L.str.1, 4
.type _Z7LaplacePfS_,@object # @_Z7LaplacePfS_
.section .rodata,"a",@progbits
.globl _Z7LaplacePfS_
.p2align 3, 0x0
_Z7LaplacePfS_:
.quad _Z22__device_stub__LaplacePfS_
.size _Z7LaplacePfS_, 8
.type .L.str.2,@object # @.str.2
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.2:
.asciz "temperature.dat"
.size .L.str.2, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z7LaplacePfS_"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__LaplacePfS_
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _ZSt4cerr
.addrsig_sym _Z7LaplacePfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} | code for sm_80
Function : _Z8calcmeanPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} | .file "tmpxft_0005cc5f_00000000-6_calcmean.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z8calcmeanPfS_PfS_
.type _Z29__device_stub__Z8calcmeanPfS_PfS_, @function
_Z29__device_stub__Z8calcmeanPfS_PfS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8calcmeanPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z29__device_stub__Z8calcmeanPfS_PfS_, .-_Z29__device_stub__Z8calcmeanPfS_PfS_
.globl _Z8calcmeanPfS_
.type _Z8calcmeanPfS_, @function
_Z8calcmeanPfS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z8calcmeanPfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8calcmeanPfS_, .-_Z8calcmeanPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8calcmeanPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8calcmeanPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} | #include <hip/hip_runtime.h>
#include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8calcmeanPfS_
.globl _Z8calcmeanPfS_
.p2align 8
.type _Z8calcmeanPfS_,@function
_Z8calcmeanPfS_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8calcmeanPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8calcmeanPfS_, .Lfunc_end0-_Z8calcmeanPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8calcmeanPfS_
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z8calcmeanPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define W 4000
#define H 20530
__global__ void calcmean(float *matrix, float *mean){
} | .text
.file "calcmean.hip"
.globl _Z23__device_stub__calcmeanPfS_ # -- Begin function _Z23__device_stub__calcmeanPfS_
.p2align 4, 0x90
.type _Z23__device_stub__calcmeanPfS_,@function
_Z23__device_stub__calcmeanPfS_: # @_Z23__device_stub__calcmeanPfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8calcmeanPfS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__calcmeanPfS_, .Lfunc_end0-_Z23__device_stub__calcmeanPfS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8calcmeanPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8calcmeanPfS_,@object # @_Z8calcmeanPfS_
.section .rodata,"a",@progbits
.globl _Z8calcmeanPfS_
.p2align 3, 0x0
_Z8calcmeanPfS_:
.quad _Z23__device_stub__calcmeanPfS_
.size _Z8calcmeanPfS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8calcmeanPfS_"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__calcmeanPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8calcmeanPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8calcmeanPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0030*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0040*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0050*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0060*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0070*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8calcmeanPfS_
.globl _Z8calcmeanPfS_
.p2align 8
.type _Z8calcmeanPfS_,@function
_Z8calcmeanPfS_:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z8calcmeanPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 1
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z8calcmeanPfS_, .Lfunc_end0-_Z8calcmeanPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z8calcmeanPfS_
.private_segment_fixed_size: 0
.sgpr_count: 0
.sgpr_spill_count: 0
.symbol: _Z8calcmeanPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 0
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005cc5f_00000000-6_calcmean.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z29__device_stub__Z8calcmeanPfS_PfS_
.type _Z29__device_stub__Z8calcmeanPfS_PfS_, @function
_Z29__device_stub__Z8calcmeanPfS_PfS_:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8calcmeanPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z29__device_stub__Z8calcmeanPfS_PfS_, .-_Z29__device_stub__Z8calcmeanPfS_PfS_
.globl _Z8calcmeanPfS_
.type _Z8calcmeanPfS_, @function
_Z8calcmeanPfS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z8calcmeanPfS_PfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z8calcmeanPfS_, .-_Z8calcmeanPfS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z8calcmeanPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z8calcmeanPfS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "calcmean.hip"
.globl _Z23__device_stub__calcmeanPfS_ # -- Begin function _Z23__device_stub__calcmeanPfS_
.p2align 4, 0x90
.type _Z23__device_stub__calcmeanPfS_,@function
_Z23__device_stub__calcmeanPfS_: # @_Z23__device_stub__calcmeanPfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 48(%rsp), %rax
movq %rax, 72(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8calcmeanPfS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z23__device_stub__calcmeanPfS_, .Lfunc_end0-_Z23__device_stub__calcmeanPfS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8calcmeanPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z8calcmeanPfS_,@object # @_Z8calcmeanPfS_
.section .rodata,"a",@progbits
.globl _Z8calcmeanPfS_
.p2align 3, 0x0
_Z8calcmeanPfS_:
.quad _Z23__device_stub__calcmeanPfS_
.size _Z8calcmeanPfS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z8calcmeanPfS_"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__calcmeanPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8calcmeanPfS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <cuda.h>
#include <cuda_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
cudaSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
cudaDeviceSetLimit(cudaLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
cudaMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
cudaMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
cudaMemcpy(device_x, host_x, sizen * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(device_y, host_y, sizen * sizeof(float), cudaMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
cudaMemcpy(host_y, device_y, sizen* sizeof(float), cudaMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
cudaFree(device_x);
cudaFree(device_y);
cudaDeviceReset();
return 0;
} | code for sm_80
Function : _Z12axpy_kernel1fPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R13, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0d7435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0050*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e680000002200 */
/*0060*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000ea20000002100 */
/*0070*/ IMAD R0, R3, c[0x0][0xc], R0 ; /* 0x0000030003007a24 */
/* 0x001fc800078e0200 */
/*0080*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */
/* 0x002fc800078e0205 */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */
/* 0x004fc800078e0207 */
/*00a0*/ IMAD.WIDE R2, R0, R13, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e020d */
/*00b0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ F2F.F64.F32 R6, c[0x0][0x160] ; /* 0x0000580000067b10 */
/* 0x000e220000201800 */
/*00d0*/ ISETP.GT.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */
/* 0x000fe20003f04270 */
/*00e0*/ DMUL R8, R6, c[0x2][0x8] ; /* 0x0080020006087a28 */
/* 0x001e140000000000 */
/*00f0*/ F2F.F32.F64 R8, R8 ; /* 0x0000000800087310 */
/* 0x001e240000301000 */
/*0100*/ FADD R6, R8, 999 ; /* 0x4479c00008067421 */
/* 0x001fca0000000000 */
/*0110*/ FSEL R11, R6, 99, !P0 ; /* 0x42c60000060b7808 */
/* 0x000fe20004000000 */
/*0120*/ IMAD.WIDE R6, R0, R13, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e020d */
/*0130*/ F2F.F64.F32 R4, R2 ; /* 0x0000000200047310 */
/* 0x004e240000201800 */
/*0140*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */
/* 0x001e140000000000 */
/*0150*/ F2F.F32.F64 R4, R4 ; /* 0x0000000400047310 */
/* 0x001e240000301000 */
/*0160*/ FADD R11, R4, R11 ; /* 0x0000000b040b7221 */
/* 0x001fca0000000000 */
/*0170*/ STG.E [R6.64], R11 ; /* 0x0000000b06007986 */
/* 0x000fe2000c101904 */
/*0180*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0190*/ BRA 0x190; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z12axpy_kernel2fPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R11, SR_TID.Y ; /* 0x00000000000b7919 */
/* 0x000e680000002200 */
/*0050*/ S2R R13, SR_TID.X ; /* 0x00000000000d7919 */
/* 0x000ea20000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fe200078e0203 */
/*0070*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fc600000001ff */
/*0080*/ IMAD R0, R0, c[0x0][0x4], R11 ; /* 0x0000010000007a24 */
/* 0x002fc800078e020b */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R13 ; /* 0x0000000000007a24 */
/* 0x004fc800078e020d */
/*00a0*/ IMAD.WIDE R8, R0, R3, c[0x0][0x168] ; /* 0x00005a0000087625 */
/* 0x000fc800078e0203 */
/*00b0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x170] ; /* 0x00005c0000027625 */
/* 0x000fe200078e0203 */
/*00c0*/ LDG.E R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1900 */
/*00d0*/ LDG.E R15, [R2.64] ; /* 0x00000004020f7981 */
/* 0x000ee2000c1e1900 */
/*00e0*/ ISETP.GT.U32.AND P0, PT, R11, 0x4, PT ; /* 0x000000040b00780c */
/* 0x000fc80003f04070 */
/*00f0*/ ISETP.LT.U32.OR P0, PT, R13, 0x8, P0 ; /* 0x000000080d00780c */
/* 0x000fda0000701470 */
/*0100*/ @P0 MOV R18, 0xc083126f ; /* 0xc083126f00120802 */
/* 0x000fe40000000f00 */
/*0110*/ @P0 MOV R19, 0x400921ca ; /* 0x400921ca00130802 */
/* 0x000fe20000000f00 */
/*0120*/ F2F.F64.F32 R6, R14 ; /* 0x0000000e00067310 */
/* 0x004e220000201800 */
/*0130*/ FADD R0, R14, R15 ; /* 0x0000000f0e007221 */
/* 0x008fce0000000000 */
/*0140*/ F2F.F64.F32 R4, R15 ; /* 0x0000000f00047310 */
/* 0x000e620000201800 */
/*0150*/ DMUL R10, R6, 0.25 ; /* 0x3fd00000060a7828 */
/* 0x001e4e0000000000 */
/*0160*/ F2F.F64.F32 R8, R0 ; /* 0x0000000000087310 */
/* 0x000e220000201800 */
/*0170*/ DFMA R10, R4, 0.5, R10 ; /* 0x3fe00000040a782b */
/* 0x002e4c000000000a */
/*0180*/ @!P0 DADD R10, R10, 1 ; /* 0x3ff000000a0a8429 */
/* 0x002e480000000000 */
/*0190*/ DADD R8, R8, c[0x2][0x0] ; /* 0x0080000008087629 */
/* 0x001e240000000000 */
/*01a0*/ @!P0 F2F.F32.F64 R21, R10 ; /* 0x0000000a00158310 */
/* 0x002e700000301000 */
/*01b0*/ F2F.F32.F64 R20, R8 ; /* 0x0000000800147310 */
/* 0x001e300000301000 */
/*01c0*/ @!P0 F2F.F64.F32 R12, R21 ; /* 0x00000015000c8310 */
/* 0x002e620000201800 */
/*01d0*/ @!P0 FMUL R16, R20, R21 ; /* 0x0000001514108220 */
/* 0x001fce0000400000 */
/*01e0*/ @P0 F2F.F64.F32 R10, R20 ; /* 0x00000014000a0310 */
/* 0x000fe20000201800 */
/*01f0*/ @!P0 DMUL R14, R12, c[0x2][0x8] ; /* 0x008002000c0e8a28 */
/* 0x002e0e0000000000 */
/*0200*/ @!P0 F2F.F64.F32 R16, R16 ; /* 0x0000001000108310 */
/* 0x000ff00000201800 */
/*0210*/ @!P0 F2F.F32.F64 R14, R14 ; /* 0x0000000e000e8310 */
/* 0x001e240000301000 */
/*0220*/ @!P0 FADD R22, R21, R14 ; /* 0x0000000e15168221 */
/* 0x001fcc0000000000 */
/*0230*/ @!P0 F2F.F64.F32 R12, R22 ; /* 0x00000016000c8310 */
/* 0x000e240000201800 */
/*0240*/ @!P0 DFMA R12, R16, 0.5, R12 ; /* 0x3fe00000100c882b */
/* 0x001fc8000000000c */
/*0250*/ @P0 DFMA R12, R10, R18, 1 ; /* 0x3ff000000a0c042b */
/* 0x000e140000000012 */
/*0260*/ F2F.F32.F64 R12, R12 ; /* 0x0000000c000c7310 */
/* 0x001e300000301000 */
/*0270*/ F2F.F64.F32 R8, R12 ; /* 0x0000000c00087310 */
/* 0x001e240000201800 */
/*0280*/ DFMA R8, R6, c[0x2][0x10], R8 ; /* 0x0080040006087a2b */
/* 0x001e0c0000000008 */
/*0290*/ DADD R8, R4, R8 ; /* 0x0000000004087229 */
/* 0x001e140000000008 */
/*02a0*/ F2F.F32.F64 R9, R8 ; /* 0x0000000800097310 */
/* 0x001e240000301000 */
/*02b0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x001fe2000c101904 */
/*02c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02d0*/ BRA 0x2d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <cuda.h>
#include <cuda_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
cudaSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
cudaDeviceSetLimit(cudaLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
cudaMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
cudaMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
cudaMemcpy(device_x, host_x, sizen * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(device_y, host_y, sizen * sizeof(float), cudaMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
cudaMemcpy(host_y, device_y, sizen* sizeof(float), cudaMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
cudaFree(device_x);
cudaFree(device_y);
cudaDeviceReset();
return 0;
} | .file "tmpxft_0006f632_00000000-6_axpy.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3689:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3689:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6foo_CCf
.type _Z6foo_CCf, @function
_Z6foo_CCf:
.LFB3682:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3682:
.size _Z6foo_CCf, .-_Z6foo_CCf
.globl _Z6foo_DDf
.type _Z6foo_DDf, @function
_Z6foo_DDf:
.LFB3683:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3683:
.size _Z6foo_DDf, .-_Z6foo_DDf
.globl _Z6foo_BBf
.type _Z6foo_BBf, @function
_Z6foo_BBf:
.LFB3684:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3684:
.size _Z6foo_BBf, .-_Z6foo_BBf
.globl _Z6foo_AAff
.type _Z6foo_AAff, @function
_Z6foo_AAff:
.LFB3685:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3685:
.size _Z6foo_AAff, .-_Z6foo_AAff
.globl _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
.type _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_, @function
_Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_:
.LFB3711:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movss %xmm0, 28(%rsp)
movq %rdi, 16(%rsp)
movq %rsi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12axpy_kernel2fPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3711:
.size _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_, .-_Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
.globl _Z12axpy_kernel2fPfS_
.type _Z12axpy_kernel2fPfS_, @function
_Z12axpy_kernel2fPfS_:
.LFB3712:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3712:
.size _Z12axpy_kernel2fPfS_, .-_Z12axpy_kernel2fPfS_
.globl _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
.type _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_, @function
_Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_:
.LFB3713:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movss %xmm0, 28(%rsp)
movq %rdi, 16(%rsp)
movq %rsi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12axpy_kernel1fPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3713:
.size _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_, .-_Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
.globl _Z12axpy_kernel1fPfS_
.type _Z12axpy_kernel1fPfS_, @function
_Z12axpy_kernel1fPfS_:
.LFB3714:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3714:
.size _Z12axpy_kernel1fPfS_, .-_Z12axpy_kernel1fPfS_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "launching kernel...\n"
.LC3:
.string "CUDA error: %s\n"
.LC4:
.string "y["
.LC5:
.string "] = "
.LC6:
.string "\n"
.section .rodata.str1.8
.align 8
.LC7:
.string "\n\n[TOOL verify] There are a total of\t"
.section .rodata.str1.1
.LC8:
.string " incorrect numbers."
.LC9:
.string "[TOOL verify] passed!"
.text
.globl main
.type main, @function
main:
.LFB3686:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movl %edi, %ebp
movq %rsi, %rbx
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $0, %edi
call cudaSetDevice@PLT
cmpl $5, %ebp
jne .L51
movq 8(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r15
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movq %rax, 24(%rsp)
movq 32(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rdi
movq %rax, 16(%rsp)
movl %r15d, %ebx
imull %r14d, %ebx
movl %ebx, %eax
imull %ebp, %eax
imull %edi, %eax
movl %eax, %ebx
movl $524288000, %esi
movl $2, %edi
call cudaDeviceSetLimit@PLT
movl %ebx, 12(%rsp)
movslq %ebx, %r13
leaq 0(,%r13,4), %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r12
cmpl $0, 12(%rsp)
jle .L29
movl $0, %eax
.L30:
movl %eax, %ecx
sarl $31, %ecx
shrl $29, %ecx
leal (%rcx,%rax), %edx
andl $7, %edx
subl %ecx, %edx
pxor %xmm0, %xmm0
cvtsi2ssl %edx, %xmm0
movss %xmm0, (%rbx,%rax,4)
movq %rax, %rcx
addq $1, %rax
cmpq %rax, %r13
jne .L30
movl $0, %edx
.L31:
movslq %edx, %rax
imulq $1717986919, %rax, %rax
sarq $33, %rax
movl %edx, %esi
sarl $31, %esi
subl %esi, %eax
leal (%rax,%rax,4), %esi
movl %edx, %eax
subl %esi, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, (%r12,%rdx,4)
movq %rdx, %rax
addq $1, %rdx
cmpq %rcx, %rax
jne .L31
.L29:
leaq 32(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 18(%rbp), %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %rbx, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %r14d, 48(%rsp)
movl %r15d, 52(%rsp)
movl $1, 56(%rsp)
movl 24(%rsp), %eax
movl %eax, 60(%rsp)
movl 16(%rsp), %eax
movl %eax, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L52
.L32:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L53
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L54
.L34:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L55
movl $2, %ecx
movq %rbp, %rdx
movq 40(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $0, %ebx
leaq .LC4(%rip), %r15
leaq _ZSt4cout(%rip), %r14
.L36:
movl $2, %edx
movq %r15, %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbp
movl $4, %edx
leaq .LC5(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %rbp, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
leaq .LC6(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $8, %rbx
jne .L36
cmpl $0, 12(%rsp)
jle .L37
movl $0, %edx
movl $0, %ebx
jmp .L40
.L51:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L52:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
movss .LC2(%rip), %xmm0
call _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
jmp .L32
.L53:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L54:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
movss .LC2(%rip), %xmm0
call _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
jmp .L34
.L55:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L38:
addq $1, %rdx
cmpq %rdx, %r13
je .L56
.L40:
movslq %edx, %rax
imulq $1717986919, %rax, %rax
sarq $33, %rax
movl %edx, %ecx
sarl $31, %ecx
subl %ecx, %eax
leal (%rax,%rax,4), %ecx
movl %edx, %eax
subl %ecx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
ucomiss (%r12,%rdx,4), %xmm0
jp .L38
jne .L38
addl $1, %ebx
jmp .L38
.L56:
leaq .LC7(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC8(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
testl %ebx, %ebx
je .L42
.L41:
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
call cudaDeviceReset@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L57
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
leaq .LC7(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $0, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC8(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L42:
leaq .LC9(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
jmp .L41
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3686:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z12axpy_kernel1fPfS_"
.LC11:
.string "_Z12axpy_kernel2fPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3716:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z12axpy_kernel1fPfS_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z12axpy_kernel2fPfS_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3716:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1073741824
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <cuda.h>
#include <cuda_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
cudaSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
cudaDeviceSetLimit(cudaLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
cudaMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
cudaMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
cudaMemcpy(device_x, host_x, sizen * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(device_y, host_y, sizen * sizeof(float), cudaMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
cudaDeviceSynchronize();
error = cudaGetLastError();
if (error != cudaSuccess) {
printf ("CUDA error: %s\n", cudaGetErrorString(error));
exit(-1);
}
cudaMemcpy(host_y, device_y, sizen* sizeof(float), cudaMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
cudaFree(device_x);
cudaFree(device_y);
cudaDeviceReset();
return 0;
} | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <hip/hip_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
hipSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
hipDeviceSetLimit(hipLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
hipMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
hipMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
hipMemcpy(device_x, host_x, sizen * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(device_y, host_y, sizen * sizeof(float), hipMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
hipMemcpy(host_y, device_y, sizen* sizeof(float), hipMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
hipFree(device_x);
hipFree(device_y);
hipDeviceReset();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <hip/hip_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
hipSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
hipDeviceSetLimit(hipLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
hipMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
hipMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
hipMemcpy(device_x, host_x, sizen * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(device_y, host_y, sizen * sizeof(float), hipMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
hipMemcpy(host_y, device_y, sizen* sizeof(float), hipMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
hipFree(device_x);
hipFree(device_y);
hipDeviceReset();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12axpy_kernel2fPfS_
.globl _Z12axpy_kernel2fPfS_
.p2align 8
.type _Z12axpy_kernel2fPfS_,@function
_Z12axpy_kernel2fPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x24
v_bfe_u32 v6, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_lshr_b32 s3, s4, 16
s_add_i32 s2, s2, s14
s_and_b32 s4, s4, 0xffff
v_mad_u64_u32 v[1:2], null, s2, s3, v[6:7]
v_and_b32_e32 v7, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s4, v[7:8]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s1, 0x3ff19999
global_load_b32 v8, v[0:1], off
global_load_b32 v9, v[2:3], off
s_mov_b32 s0, 0x9999999a
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v8, v9
v_cmp_lt_u32_e32 vcc_lo, 7, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v2
v_add_f64 v[4:5], v[2:3], s[0:1]
v_cvt_f64_f32_e32 v[2:3], v8
v_cmp_gt_u32_e64 s0, 5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
s_and_b32 s0, vcc_lo, s0
v_cvt_f32_f64_e32 v8, v[4:5]
v_cvt_f64_f32_e32 v[4:5], v9
s_and_saveexec_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s1
s_cbranch_execz .LBB0_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[4:5], -2
s_mov_b32 s3, 0x3feccccc
s_mov_b32 s2, 0xcccccccd
v_fma_f64 v[6:7], v[2:3], 0.5, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], 1.0
v_cvt_f32_f64_e32 v9, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[6:7], v9
v_mul_f64 v[6:7], v[6:7], s[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v6, v[6:7]
v_dual_mul_f32 v7, v8, v9 :: v_dual_add_f32 v8, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f64_f32_e32 v[6:7], v7
v_cvt_f64_f32_e32 v[8:9], v8
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], 0.5, v[8:9]
.LBB0_2:
s_and_not1_saveexec_b32 s0, s0
s_delay_alu instid0(VALU_DEP_2)
v_cvt_f64_f32_e32 v[6:7], v8
s_mov_b32 s3, 0x400921ca
s_mov_b32 s2, 0xc083126f
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[6:7], v[6:7], s[2:3], 1.0
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v6, v[6:7]
s_mov_b32 s1, 0x3ffab851
s_mov_b32 s0, 0xeb851eb8
v_cvt_f64_f32_e32 v[6:7], v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[4:5], s[0:1], v[6:7]
v_add_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12axpy_kernel2fPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12axpy_kernel2fPfS_, .Lfunc_end0-_Z12axpy_kernel2fPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z12axpy_kernel1fPfS_
.globl _Z12axpy_kernel1fPfS_
.p2align 8
.type _Z12axpy_kernel1fPfS_,@function
_Z12axpy_kernel1fPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_lshr_b32 s4, s3, 16
s_add_i32 s2, s2, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s2, s4, v[1:2]
s_and_b32 s2, s3, 0xffff
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s3, 0x3fd33333
v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
s_mov_b32 s2, 0x33333333
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[4:5], off
v_cmp_gt_i32_e32 vcc_lo, 3, v3
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[4:5], v[4:5], s[2:3]
v_cvt_f32_f64_e32 v2, v[4:5]
global_store_b32 v[0:1], v2, off
s_and_saveexec_b32 s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB1_2
s_load_b32 s0, s[0:1], 0x0
s_mov_b32 s1, 0x3feccccc
s_waitcnt lgkmcnt(0)
v_cvt_f64_f32_e32 v[3:4], s0
s_mov_b32 s0, 0xcccccccd
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mul_f64 v[3:4], v[3:4], s[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v3, v[3:4]
v_add_f32_e32 v3, 0x4479c000, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v3, v3, v2
.LBB1_2:
s_and_not1_saveexec_b32 s0, s2
v_add_f32_e32 v3, 0x42c60000, v2
s_or_b32 exec_lo, exec_lo, s0
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12axpy_kernel1fPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z12axpy_kernel1fPfS_, .Lfunc_end1-_Z12axpy_kernel1fPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12axpy_kernel2fPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12axpy_kernel2fPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12axpy_kernel1fPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12axpy_kernel1fPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <iostream>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <unistd.h>
#include <hip/hip_runtime.h>
//extern __device__ int testxyz[1000];
//int localtrace[10000];
//__device__ float* tracehandle;
__device__ float foo_CC(float a)
{
return a*0.9;
}
__device__ int foo_DD(float a)
{
if (threadIdx.x < 2 || threadIdx.y > 2)
return (int) a;
else
return a+2;
}
__device__ float foo_BB(float a)
{
if (threadIdx.x > 3 || threadIdx.y > 11)
return a + foo_CC(a);
else
return a + (float)foo_DD(a) /2;
}
__device__ float foo_AA( float a, float b)
{
if (threadIdx.x < 8 || threadIdx.y > 4)
return a*3.1415+1;
else
return (b*a)*0.5 + foo_BB(b);
}
__global__ void axpy_kernel2(float a, float* x, float* y)
{
//tracehandle = newbu;
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
float aa = y[index] + x[index] + 1.1;
float b = 0.5*y[index] + 0.25* x[index] + 1.0;
y[index] += ( x[index]*1.67 + foo_AA(aa, b) );
// y[index] += ( x[index]*1.67 + aa + b );
}
__global__ void axpy_kernel1(float a, float* x, float* y)
{
int blockId = blockIdx.x + blockIdx.y * gridDim.x;
int threadId = blockId * (blockDim.x * blockDim.y) + (threadIdx.y * blockDim.x) + threadIdx.x;
int index = threadId;
y[index] = x[index]*0.3;
if (index>2)
y[index] += 99;
else
y[index] += 999 + foo_CC(a);
}
int main(int argc, char* argv[])
{
//const int kDataLen2 = 128;
float a = 2.0f;
//int blocks2 = 600;
hipSetDevice(0);
if (argc != 5)
{
printf("usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n");
exit(1);
}
int blocksx = atoi(argv[1]) ;
int blocksy = atoi(argv[2]) ;
int kDataLenx = atoi(argv[3]);
int kDataLeny = atoi(argv[4]);
int sizen = blocksx *blocksy *kDataLenx *kDataLeny;
// cudaThreadSetLimit(cudaLimitMallocHeapSize, 1024*1024); //sderek
hipDeviceSetLimit(hipLimitMallocHeapSize, 1024*1024*500); //sderek
// tracetest = (int*)malloc( 1234);
// float host_y[blocks*kDataLen];
// float host_y[blocks*kDataLen];
float* host_x = (float*) malloc( sizen* sizeof(float));
float* host_y = (float*) malloc( sizen* sizeof(float));
void* host_newbu = (void*) malloc( 1000 );
int ii;
for( ii=0; ii<sizen; ii++)
host_x[ii] = ii%8;
for( ii=0; ii<sizen; ii++)
host_y[ii] = ii%5;
/* int x[5];
x[0] = 13;
printf("%p\n",x);
printf("%p\n",&x);
printf("%d\n",*x);
printf("%d\n",*(x+1));
*/
// Copy input data to device.
float* device_x;
float* device_y;
// void* newbu;
// printf(" %p\n", device_x);
hipMalloc((void**)&device_x, sizen * sizeof(float));
// printf(" %p\n", device_x);
// printf(" %p\n", device_y);
hipMalloc((void**)&device_y, sizen * sizeof(float) + 18);
// printf(" %p\n", device_y);
// printf(" %p\n", newbu);
// cudaMalloc(&newbu, 1000);
// printf(" %p\n", newbu);
/* std::cout << &(device_x) << "\n";
std::cout << &(device_y) << "\n";
std::cout << &(*device_x) << "\n";
std::cout << &(*device_y) << "\n";
std::cout << (device_x) << "\n";
std::cout << (device_y) << "\n";
*/
hipMemcpy(device_x, host_x, sizen * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(device_y, host_y, sizen * sizeof(float), hipMemcpyHostToDevice);
dim3 CTAs(blocksx, blocksy);
dim3 Threads(kDataLenx, kDataLeny);
std::cout << "launching kernel...\n";
axpy_kernel1<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
axpy_kernel2<<<CTAs, Threads>>>(a, device_x, device_y);
hipDeviceSynchronize();
error = hipGetLastError();
if (error != hipSuccess) {
printf ("CUDA error: %s\n", hipGetErrorString(error));
exit(-1);
}
hipMemcpy(host_y, device_y, sizen* sizeof(float), hipMemcpyDeviceToHost);
// cudaMemcpy(host_newbu, newbu, 1000, cudaMemcpyDeviceToHost);
free(host_newbu);
// cudaFree(newbu);
int verify = 0;
for (int ii = 0; ii < 8; ii++)
std::cout << "y[" << ii << "] = " << host_y[ii] << "\n";
for (int ii = 0; ii < sizen; ii++) {
if( host_y[ii] == ii%5)
verify ++;
// std::cout << "y[" << i << "] = " << host_y[i] << "\n";
}
std::cout << "\n\n[TOOL verify] There are a total of\t" << verify << " incorrect numbers." << std::endl;
if (verify==0)
std::cout << "[TOOL verify] passed!" << std::endl << std::endl;
// for (int i = 0; i < 20; ++i) {
// std::cout << "newtrace [" << i << "] = " << host_newbu[i] << "\n";
// std::cout << & (host_y[i] )<< "\n";
// }
/* cudaMemcpyFromSymbol(localtrace, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
cudaMemcpyFromSymbol(localtrace+8, testxyz, 40*sizeof(int), 0, cudaMemcpyDeviceToHost);
for (int i = 0; i < 20; ++i)
printf("%d\t", localtrace[i] );
std::cout << std::endl;
*/
// int* show_h;
// cudaMemcpyFromSymbol(show_h, show, sizeof(int), 0, cudaMemcpyDeviceToHost);
// msg = cudaGetSymbolAddress((void **)&d_G, test);
// printf("the address is %p\n", d_G);
// if (msg == cudaSuccess)
// {
// int tmp[4];
// printf("before %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tracetest, test1, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("copy %d %d %d %d@ %p\n", *tmp, *(tmp+1), *(tmp+2), *(tmp+3), tmp);
// cudaMemcpyFromSymbol(tmp, test2, 4*sizeof(int), 0, cudaMemcpyDeviceToHost);
// printf("after %d %d %d %d@ %p\n", tmp[0], tmp[1], tmp[2], tmp[3], tmp);
// }
//else
// std::cout << cudaGetErrorString(msg) << "\n\n";
hipFree(device_x);
hipFree(device_y);
hipDeviceReset();
return 0;
} | .text
.file "axpy.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__axpy_kernel2fPfS_ # -- Begin function _Z27__device_stub__axpy_kernel2fPfS_
.p2align 4, 0x90
.type _Z27__device_stub__axpy_kernel2fPfS_,@function
_Z27__device_stub__axpy_kernel2fPfS_: # @_Z27__device_stub__axpy_kernel2fPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movss %xmm0, 12(%rsp)
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12axpy_kernel2fPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__axpy_kernel2fPfS_, .Lfunc_end0-_Z27__device_stub__axpy_kernel2fPfS_
.cfi_endproc
# -- End function
.globl _Z27__device_stub__axpy_kernel1fPfS_ # -- Begin function _Z27__device_stub__axpy_kernel1fPfS_
.p2align 4, 0x90
.type _Z27__device_stub__axpy_kernel1fPfS_,@function
_Z27__device_stub__axpy_kernel1fPfS_: # @_Z27__device_stub__axpy_kernel1fPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movss %xmm0, 12(%rsp)
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12axpy_kernel1fPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z27__device_stub__axpy_kernel1fPfS_, .Lfunc_end1-_Z27__device_stub__axpy_kernel1fPfS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
xorl %edi, %edi
callq hipSetDevice
cmpl $5, %ebp
jne .LBB2_34
# %bb.1:
movq 8(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r13
movq 32(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbp
movl %r15d, %eax
movq %r14, 136(%rsp) # 8-byte Spill
imull %r14d, %eax
movl %ebp, %r12d
movq %r13, 128(%rsp) # 8-byte Spill
imull %r13d, %r12d
imull %eax, %r12d
movl $524288000, %esi # imm = 0x1F400000
movl $2, %edi
callq hipDeviceSetLimit
movslq %r12d, %r14
leaq (,%r14,4), %rbx
movq %rbx, %rdi
callq malloc
movq %rax, %r13
movq %rbx, 144(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, %rbx
movl %r12d, 20(%rsp) # 4-byte Spill
movl %r12d, %r12d
testl %r14d, %r14d
jle .LBB2_4
# %bb.2: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %eax, %ecx
andl $7, %ecx
xorps %xmm0, %xmm0
cvtsi2ss %ecx, %xmm0
movss %xmm0, (%r13,%rax,4)
incq %rax
cmpq %rax, %r12
jne .LBB2_3
.LBB2_4: # %.preheader102
cmpl $0, 20(%rsp) # 4-byte Folded Reload
jle .LBB2_7
# %bb.5: # %.lr.ph105.preheader
xorl %eax, %eax
movl $3435973837, %ecx # imm = 0xCCCCCCCD
.p2align 4, 0x90
.LBB2_6: # %.lr.ph105
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
imulq %rcx, %rdx
shrq $34, %rdx
leal (%rdx,%rdx,4), %edx
movl %eax, %esi
subl %edx, %esi
xorps %xmm0, %xmm0
cvtsi2ss %esi, %xmm0
movss %xmm0, (%rbx,%rax,4)
incq %rax
cmpq %rax, %r12
jne .LBB2_6
.LBB2_7: # %._crit_edge
leaq 24(%rsp), %rdi
movq 144(%rsp), %r14 # 8-byte Reload
movq %r14, %rsi
callq hipMalloc
leaq 18(%r14), %rsi
leaq 8(%rsp), %rdi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 136(%rsp), %eax # 4-byte Reload
shlq $32, %r15
orq %rax, %r15
movl 128(%rsp), %eax # 4-byte Reload
shlq $32, %rbp
orq %rax, %rbp
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $20, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq %r15, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 24(%rsp), %rax
movq 8(%rsp), %rcx
movl $1073741824, 4(%rsp) # imm = 0x40000000
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z12axpy_kernel1fPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB2_35
# %bb.10:
movq %r15, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11:
movq 24(%rsp), %rax
movq 8(%rsp), %rcx
movl $1073741824, 4(%rsp) # imm = 0x40000000
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z12axpy_kernel2fPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_12:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB2_35
# %bb.13:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB2_14: # =>This Inner Loop Header: Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movq %rax, %r15
movl $.L.str.4, %esi
movl $4, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss (%rbx,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movq %r15, %rdi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.5, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r14
cmpq $8, %r14
jne .LBB2_14
# %bb.15: # %.preheader
cmpl $0, 20(%rsp) # 4-byte Folded Reload
jle .LBB2_16
# %bb.25: # %.lr.ph109.preheader
shlq $2, %r12
xorl %eax, %eax
movl $3435973837, %ecx # imm = 0xCCCCCCCD
xorl %edx, %edx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB2_26: # %.lr.ph109
# =>This Inner Loop Header: Depth=1
movl %eax, %esi
imulq %rcx, %rsi
shrq $34, %rsi
leal (%rsi,%rsi,4), %esi
movl %eax, %edi
subl %esi, %edi
xorps %xmm0, %xmm0
cvtsi2ss %edi, %xmm0
cmpeqss (%rbx,%rdx), %xmm0
movd %xmm0, %esi
subl %esi, %ebp
addq $4, %rdx
incl %eax
cmpq %rdx, %r12
jne .LBB2_26
jmp .LBB2_17
.LBB2_16:
xorl %ebp, %ebp
.LBB2_17: # %._crit_edge110
movl $_ZSt4cout, %edi
movl $.L.str.6, %esi
movl $37, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %ebp, %esi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.7, %esi
movl $19, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r14
testq %r14, %r14
je .LBB2_36
# %bb.18: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB2_20
# %bb.19:
movzbl 67(%r14), %eax
jmp .LBB2_21
.LBB2_20:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_21: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
testl %ebp, %ebp
jne .LBB2_33
# %bb.22:
movl $_ZSt4cout, %edi
movl $.L.str.8, %esi
movl $21, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB2_36
# %bb.23: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i87
cmpb $0, 56(%rbx)
je .LBB2_27
# %bb.24:
movzbl 67(%rbx), %eax
jmp .LBB2_28
.LBB2_27:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_28: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit90
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_36
# %bb.29: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i92
cmpb $0, 56(%rbx)
je .LBB2_31
# %bb.30:
movzbl 67(%rbx), %ecx
jmp .LBB2_32
.LBB2_31:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_32: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit95
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
.LBB2_33:
movq 24(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
callq hipDeviceReset
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_35:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.LBB2_36:
callq _ZSt16__throw_bad_castv
.LBB2_34:
movl $.Lstr, %edi
callq puts@PLT
movl $1, %edi
callq exit
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12axpy_kernel2fPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12axpy_kernel1fPfS_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12axpy_kernel2fPfS_,@object # @_Z12axpy_kernel2fPfS_
.section .rodata,"a",@progbits
.globl _Z12axpy_kernel2fPfS_
.p2align 3, 0x0
_Z12axpy_kernel2fPfS_:
.quad _Z27__device_stub__axpy_kernel2fPfS_
.size _Z12axpy_kernel2fPfS_, 8
.type _Z12axpy_kernel1fPfS_,@object # @_Z12axpy_kernel1fPfS_
.globl _Z12axpy_kernel1fPfS_
.p2align 3, 0x0
_Z12axpy_kernel1fPfS_:
.quad _Z27__device_stub__axpy_kernel1fPfS_
.size _Z12axpy_kernel1fPfS_, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "launching kernel...\n"
.size .L.str.1, 21
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CUDA error: %s\n"
.size .L.str.2, 16
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "y["
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "] = "
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\n"
.size .L.str.5, 2
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "\n\n[TOOL verify] There are a total of\t"
.size .L.str.6, 38
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " incorrect numbers."
.size .L.str.7, 20
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "[TOOL verify] passed!"
.size .L.str.8, 22
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12axpy_kernel2fPfS_"
.size .L__unnamed_1, 22
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z12axpy_kernel1fPfS_"
.size .L__unnamed_2, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]"
.size .Lstr, 60
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__axpy_kernel2fPfS_
.addrsig_sym _Z27__device_stub__axpy_kernel1fPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12axpy_kernel2fPfS_
.addrsig_sym _Z12axpy_kernel1fPfS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12axpy_kernel1fPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R13, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0d7435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*0050*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e680000002200 */
/*0060*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000ea20000002100 */
/*0070*/ IMAD R0, R3, c[0x0][0xc], R0 ; /* 0x0000030003007a24 */
/* 0x001fc800078e0200 */
/*0080*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */
/* 0x002fc800078e0205 */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */
/* 0x004fc800078e0207 */
/*00a0*/ IMAD.WIDE R2, R0, R13, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fcc00078e020d */
/*00b0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ F2F.F64.F32 R6, c[0x0][0x160] ; /* 0x0000580000067b10 */
/* 0x000e220000201800 */
/*00d0*/ ISETP.GT.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */
/* 0x000fe20003f04270 */
/*00e0*/ DMUL R8, R6, c[0x2][0x8] ; /* 0x0080020006087a28 */
/* 0x001e140000000000 */
/*00f0*/ F2F.F32.F64 R8, R8 ; /* 0x0000000800087310 */
/* 0x001e240000301000 */
/*0100*/ FADD R6, R8, 999 ; /* 0x4479c00008067421 */
/* 0x001fca0000000000 */
/*0110*/ FSEL R11, R6, 99, !P0 ; /* 0x42c60000060b7808 */
/* 0x000fe20004000000 */
/*0120*/ IMAD.WIDE R6, R0, R13, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e020d */
/*0130*/ F2F.F64.F32 R4, R2 ; /* 0x0000000200047310 */
/* 0x004e240000201800 */
/*0140*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */
/* 0x001e140000000000 */
/*0150*/ F2F.F32.F64 R4, R4 ; /* 0x0000000400047310 */
/* 0x001e240000301000 */
/*0160*/ FADD R11, R4, R11 ; /* 0x0000000b040b7221 */
/* 0x001fca0000000000 */
/*0170*/ STG.E [R6.64], R11 ; /* 0x0000000b06007986 */
/* 0x000fe2000c101904 */
/*0180*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0190*/ BRA 0x190; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z12axpy_kernel2fPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */
/*0040*/ S2R R11, SR_TID.Y ; /* 0x00000000000b7919 */
/* 0x000e680000002200 */
/*0050*/ S2R R13, SR_TID.X ; /* 0x00000000000d7919 */
/* 0x000ea20000002100 */
/*0060*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */
/* 0x001fe200078e0203 */
/*0070*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fc600000001ff */
/*0080*/ IMAD R0, R0, c[0x0][0x4], R11 ; /* 0x0000010000007a24 */
/* 0x002fc800078e020b */
/*0090*/ IMAD R0, R0, c[0x0][0x0], R13 ; /* 0x0000000000007a24 */
/* 0x004fc800078e020d */
/*00a0*/ IMAD.WIDE R8, R0, R3, c[0x0][0x168] ; /* 0x00005a0000087625 */
/* 0x000fc800078e0203 */
/*00b0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x170] ; /* 0x00005c0000027625 */
/* 0x000fe200078e0203 */
/*00c0*/ LDG.E R14, [R8.64] ; /* 0x00000004080e7981 */
/* 0x000ea8000c1e1900 */
/*00d0*/ LDG.E R15, [R2.64] ; /* 0x00000004020f7981 */
/* 0x000ee2000c1e1900 */
/*00e0*/ ISETP.GT.U32.AND P0, PT, R11, 0x4, PT ; /* 0x000000040b00780c */
/* 0x000fc80003f04070 */
/*00f0*/ ISETP.LT.U32.OR P0, PT, R13, 0x8, P0 ; /* 0x000000080d00780c */
/* 0x000fda0000701470 */
/*0100*/ @P0 MOV R18, 0xc083126f ; /* 0xc083126f00120802 */
/* 0x000fe40000000f00 */
/*0110*/ @P0 MOV R19, 0x400921ca ; /* 0x400921ca00130802 */
/* 0x000fe20000000f00 */
/*0120*/ F2F.F64.F32 R6, R14 ; /* 0x0000000e00067310 */
/* 0x004e220000201800 */
/*0130*/ FADD R0, R14, R15 ; /* 0x0000000f0e007221 */
/* 0x008fce0000000000 */
/*0140*/ F2F.F64.F32 R4, R15 ; /* 0x0000000f00047310 */
/* 0x000e620000201800 */
/*0150*/ DMUL R10, R6, 0.25 ; /* 0x3fd00000060a7828 */
/* 0x001e4e0000000000 */
/*0160*/ F2F.F64.F32 R8, R0 ; /* 0x0000000000087310 */
/* 0x000e220000201800 */
/*0170*/ DFMA R10, R4, 0.5, R10 ; /* 0x3fe00000040a782b */
/* 0x002e4c000000000a */
/*0180*/ @!P0 DADD R10, R10, 1 ; /* 0x3ff000000a0a8429 */
/* 0x002e480000000000 */
/*0190*/ DADD R8, R8, c[0x2][0x0] ; /* 0x0080000008087629 */
/* 0x001e240000000000 */
/*01a0*/ @!P0 F2F.F32.F64 R21, R10 ; /* 0x0000000a00158310 */
/* 0x002e700000301000 */
/*01b0*/ F2F.F32.F64 R20, R8 ; /* 0x0000000800147310 */
/* 0x001e300000301000 */
/*01c0*/ @!P0 F2F.F64.F32 R12, R21 ; /* 0x00000015000c8310 */
/* 0x002e620000201800 */
/*01d0*/ @!P0 FMUL R16, R20, R21 ; /* 0x0000001514108220 */
/* 0x001fce0000400000 */
/*01e0*/ @P0 F2F.F64.F32 R10, R20 ; /* 0x00000014000a0310 */
/* 0x000fe20000201800 */
/*01f0*/ @!P0 DMUL R14, R12, c[0x2][0x8] ; /* 0x008002000c0e8a28 */
/* 0x002e0e0000000000 */
/*0200*/ @!P0 F2F.F64.F32 R16, R16 ; /* 0x0000001000108310 */
/* 0x000ff00000201800 */
/*0210*/ @!P0 F2F.F32.F64 R14, R14 ; /* 0x0000000e000e8310 */
/* 0x001e240000301000 */
/*0220*/ @!P0 FADD R22, R21, R14 ; /* 0x0000000e15168221 */
/* 0x001fcc0000000000 */
/*0230*/ @!P0 F2F.F64.F32 R12, R22 ; /* 0x00000016000c8310 */
/* 0x000e240000201800 */
/*0240*/ @!P0 DFMA R12, R16, 0.5, R12 ; /* 0x3fe00000100c882b */
/* 0x001fc8000000000c */
/*0250*/ @P0 DFMA R12, R10, R18, 1 ; /* 0x3ff000000a0c042b */
/* 0x000e140000000012 */
/*0260*/ F2F.F32.F64 R12, R12 ; /* 0x0000000c000c7310 */
/* 0x001e300000301000 */
/*0270*/ F2F.F64.F32 R8, R12 ; /* 0x0000000c00087310 */
/* 0x001e240000201800 */
/*0280*/ DFMA R8, R6, c[0x2][0x10], R8 ; /* 0x0080040006087a2b */
/* 0x001e0c0000000008 */
/*0290*/ DADD R8, R4, R8 ; /* 0x0000000004087229 */
/* 0x001e140000000008 */
/*02a0*/ F2F.F32.F64 R9, R8 ; /* 0x0000000800097310 */
/* 0x001e240000301000 */
/*02b0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x001fe2000c101904 */
/*02c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02d0*/ BRA 0x2d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12axpy_kernel2fPfS_
.globl _Z12axpy_kernel2fPfS_
.p2align 8
.type _Z12axpy_kernel2fPfS_,@function
_Z12axpy_kernel2fPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x24
v_bfe_u32 v6, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_lshr_b32 s3, s4, 16
s_add_i32 s2, s2, s14
s_and_b32 s4, s4, 0xffff
v_mad_u64_u32 v[1:2], null, s2, s3, v[6:7]
v_and_b32_e32 v7, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s4, v[7:8]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s1, 0x3ff19999
global_load_b32 v8, v[0:1], off
global_load_b32 v9, v[2:3], off
s_mov_b32 s0, 0x9999999a
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v8, v9
v_cmp_lt_u32_e32 vcc_lo, 7, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[2:3], v2
v_add_f64 v[4:5], v[2:3], s[0:1]
v_cvt_f64_f32_e32 v[2:3], v8
v_cmp_gt_u32_e64 s0, 5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
s_and_b32 s0, vcc_lo, s0
v_cvt_f32_f64_e32 v8, v[4:5]
v_cvt_f64_f32_e32 v[4:5], v9
s_and_saveexec_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s1
s_cbranch_execz .LBB0_2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ldexp_f64 v[6:7], v[4:5], -2
s_mov_b32 s3, 0x3feccccc
s_mov_b32 s2, 0xcccccccd
v_fma_f64 v[6:7], v[2:3], 0.5, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[6:7], 1.0
v_cvt_f32_f64_e32 v9, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[6:7], v9
v_mul_f64 v[6:7], v[6:7], s[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v6, v[6:7]
v_dual_mul_f32 v7, v8, v9 :: v_dual_add_f32 v8, v9, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f64_f32_e32 v[6:7], v7
v_cvt_f64_f32_e32 v[8:9], v8
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[6:7], v[6:7], 0.5, v[8:9]
.LBB0_2:
s_and_not1_saveexec_b32 s0, s0
s_delay_alu instid0(VALU_DEP_2)
v_cvt_f64_f32_e32 v[6:7], v8
s_mov_b32 s3, 0x400921ca
s_mov_b32 s2, 0xc083126f
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_fma_f64 v[6:7], v[6:7], s[2:3], 1.0
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v6, v[6:7]
s_mov_b32 s1, 0x3ffab851
s_mov_b32 s0, 0xeb851eb8
v_cvt_f64_f32_e32 v[6:7], v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[4:5], s[0:1], v[6:7]
v_add_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12axpy_kernel2fPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12axpy_kernel2fPfS_, .Lfunc_end0-_Z12axpy_kernel2fPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z12axpy_kernel1fPfS_
.globl _Z12axpy_kernel1fPfS_
.p2align 8
.type _Z12axpy_kernel1fPfS_,@function
_Z12axpy_kernel1fPfS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s15
s_lshr_b32 s4, s3, 16
s_add_i32 s2, s2, s14
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s2, s4, v[1:2]
s_and_b32 s2, s3, 0xffff
s_load_b128 s[4:7], s[0:1], 0x8
s_mov_b32 s3, 0x3fd33333
v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
s_mov_b32 s2, 0x33333333
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_load_b32 v2, v[4:5], off
v_cmp_gt_i32_e32 vcc_lo, 3, v3
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[4:5], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[4:5], v[4:5], s[2:3]
v_cvt_f32_f64_e32 v2, v[4:5]
global_store_b32 v[0:1], v2, off
s_and_saveexec_b32 s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB1_2
s_load_b32 s0, s[0:1], 0x0
s_mov_b32 s1, 0x3feccccc
s_waitcnt lgkmcnt(0)
v_cvt_f64_f32_e32 v[3:4], s0
s_mov_b32 s0, 0xcccccccd
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mul_f64 v[3:4], v[3:4], s[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v3, v[3:4]
v_add_f32_e32 v3, 0x4479c000, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v3, v3, v2
.LBB1_2:
s_and_not1_saveexec_b32 s0, s2
v_add_f32_e32 v3, 0x42c60000, v2
s_or_b32 exec_lo, exec_lo, s0
global_store_b32 v[0:1], v3, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12axpy_kernel1fPfS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z12axpy_kernel1fPfS_, .Lfunc_end1-_Z12axpy_kernel1fPfS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12axpy_kernel2fPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12axpy_kernel2fPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12axpy_kernel1fPfS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12axpy_kernel1fPfS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006f632_00000000-6_axpy.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3689:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3689:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6foo_CCf
.type _Z6foo_CCf, @function
_Z6foo_CCf:
.LFB3682:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3682:
.size _Z6foo_CCf, .-_Z6foo_CCf
.globl _Z6foo_DDf
.type _Z6foo_DDf, @function
_Z6foo_DDf:
.LFB3683:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3683:
.size _Z6foo_DDf, .-_Z6foo_DDf
.globl _Z6foo_BBf
.type _Z6foo_BBf, @function
_Z6foo_BBf:
.LFB3684:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3684:
.size _Z6foo_BBf, .-_Z6foo_BBf
.globl _Z6foo_AAff
.type _Z6foo_AAff, @function
_Z6foo_AAff:
.LFB3685:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3685:
.size _Z6foo_AAff, .-_Z6foo_AAff
.globl _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
.type _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_, @function
_Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_:
.LFB3711:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movss %xmm0, 28(%rsp)
movq %rdi, 16(%rsp)
movq %rsi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12axpy_kernel2fPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3711:
.size _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_, .-_Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
.globl _Z12axpy_kernel2fPfS_
.type _Z12axpy_kernel2fPfS_, @function
_Z12axpy_kernel2fPfS_:
.LFB3712:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3712:
.size _Z12axpy_kernel2fPfS_, .-_Z12axpy_kernel2fPfS_
.globl _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
.type _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_, @function
_Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_:
.LFB3713:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movss %xmm0, 28(%rsp)
movq %rdi, 16(%rsp)
movq %rsi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L23
.L19:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L24
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12axpy_kernel1fPfS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L19
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3713:
.size _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_, .-_Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
.globl _Z12axpy_kernel1fPfS_
.type _Z12axpy_kernel1fPfS_, @function
_Z12axpy_kernel1fPfS_:
.LFB3714:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3714:
.size _Z12axpy_kernel1fPfS_, .-_Z12axpy_kernel1fPfS_
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "launching kernel...\n"
.LC3:
.string "CUDA error: %s\n"
.LC4:
.string "y["
.LC5:
.string "] = "
.LC6:
.string "\n"
.section .rodata.str1.8
.align 8
.LC7:
.string "\n\n[TOOL verify] There are a total of\t"
.section .rodata.str1.1
.LC8:
.string " incorrect numbers."
.LC9:
.string "[TOOL verify] passed!"
.text
.globl main
.type main, @function
main:
.LFB3686:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movl %edi, %ebp
movq %rsi, %rbx
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $0, %edi
call cudaSetDevice@PLT
cmpl $5, %ebp
jne .L51
movq 8(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r15
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movq %rax, 24(%rsp)
movq 32(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rdi
movq %rax, 16(%rsp)
movl %r15d, %ebx
imull %r14d, %ebx
movl %ebx, %eax
imull %ebp, %eax
imull %edi, %eax
movl %eax, %ebx
movl $524288000, %esi
movl $2, %edi
call cudaDeviceSetLimit@PLT
movl %ebx, 12(%rsp)
movslq %ebx, %r13
leaq 0(,%r13,4), %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
movq %rbp, %rdi
call malloc@PLT
movq %rax, %r12
cmpl $0, 12(%rsp)
jle .L29
movl $0, %eax
.L30:
movl %eax, %ecx
sarl $31, %ecx
shrl $29, %ecx
leal (%rcx,%rax), %edx
andl $7, %edx
subl %ecx, %edx
pxor %xmm0, %xmm0
cvtsi2ssl %edx, %xmm0
movss %xmm0, (%rbx,%rax,4)
movq %rax, %rcx
addq $1, %rax
cmpq %rax, %r13
jne .L30
movl $0, %edx
.L31:
movslq %edx, %rax
imulq $1717986919, %rax, %rax
sarq $33, %rax
movl %edx, %esi
sarl $31, %esi
subl %esi, %eax
leal (%rax,%rax,4), %esi
movl %edx, %eax
subl %esi, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, (%r12,%rdx,4)
movq %rdx, %rax
addq $1, %rdx
cmpq %rcx, %rax
jne .L31
.L29:
leaq 32(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 18(%rbp), %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %rbx, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r12, %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %r14d, 48(%rsp)
movl %r15d, 52(%rsp)
movl $1, 56(%rsp)
movl 24(%rsp), %eax
movl %eax, 60(%rsp)
movl 16(%rsp), %eax
movl %eax, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC1(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L52
.L32:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L53
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L54
.L34:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L55
movl $2, %ecx
movq %rbp, %rdx
movq 40(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $0, %ebx
leaq .LC4(%rip), %r15
leaq _ZSt4cout(%rip), %r14
.L36:
movl $2, %edx
movq %r15, %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbp
movl $4, %edx
leaq .LC5(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %rbp, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
leaq .LC6(%rip), %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $8, %rbx
jne .L36
cmpl $0, 12(%rsp)
jle .L37
movl $0, %edx
movl $0, %ebx
jmp .L40
.L51:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L52:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
movss .LC2(%rip), %xmm0
call _Z35__device_stub__Z12axpy_kernel1fPfS_fPfS_
jmp .L32
.L53:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L54:
movq 40(%rsp), %rsi
movq 32(%rsp), %rdi
movss .LC2(%rip), %xmm0
call _Z35__device_stub__Z12axpy_kernel2fPfS_fPfS_
jmp .L34
.L55:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L38:
addq $1, %rdx
cmpq %rdx, %r13
je .L56
.L40:
movslq %edx, %rax
imulq $1717986919, %rax, %rax
sarq $33, %rax
movl %edx, %ecx
sarl $31, %ecx
subl %ecx, %eax
leal (%rax,%rax,4), %ecx
movl %edx, %eax
subl %ecx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
ucomiss (%r12,%rdx,4), %xmm0
jp .L38
jne .L38
addl $1, %ebx
jmp .L38
.L56:
leaq .LC7(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC8(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
testl %ebx, %ebx
je .L42
.L41:
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
call cudaDeviceReset@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L57
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
leaq .LC7(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $0, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC8(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L42:
leaq .LC9(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
jmp .L41
.L57:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3686:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z12axpy_kernel1fPfS_"
.LC11:
.string "_Z12axpy_kernel2fPfS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3716:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z12axpy_kernel1fPfS_(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z12axpy_kernel2fPfS_(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3716:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1073741824
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "axpy.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__axpy_kernel2fPfS_ # -- Begin function _Z27__device_stub__axpy_kernel2fPfS_
.p2align 4, 0x90
.type _Z27__device_stub__axpy_kernel2fPfS_,@function
_Z27__device_stub__axpy_kernel2fPfS_: # @_Z27__device_stub__axpy_kernel2fPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movss %xmm0, 12(%rsp)
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12axpy_kernel2fPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z27__device_stub__axpy_kernel2fPfS_, .Lfunc_end0-_Z27__device_stub__axpy_kernel2fPfS_
.cfi_endproc
# -- End function
.globl _Z27__device_stub__axpy_kernel1fPfS_ # -- Begin function _Z27__device_stub__axpy_kernel1fPfS_
.p2align 4, 0x90
.type _Z27__device_stub__axpy_kernel1fPfS_,@function
_Z27__device_stub__axpy_kernel1fPfS_: # @_Z27__device_stub__axpy_kernel1fPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movss %xmm0, 12(%rsp)
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12axpy_kernel1fPfS_, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z27__device_stub__axpy_kernel1fPfS_, .Lfunc_end1-_Z27__device_stub__axpy_kernel1fPfS_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
xorl %edi, %edi
callq hipSetDevice
cmpl $5, %ebp
jne .LBB2_34
# %bb.1:
movq 8(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r13
movq 32(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbp
movl %r15d, %eax
movq %r14, 136(%rsp) # 8-byte Spill
imull %r14d, %eax
movl %ebp, %r12d
movq %r13, 128(%rsp) # 8-byte Spill
imull %r13d, %r12d
imull %eax, %r12d
movl $524288000, %esi # imm = 0x1F400000
movl $2, %edi
callq hipDeviceSetLimit
movslq %r12d, %r14
leaq (,%r14,4), %rbx
movq %rbx, %rdi
callq malloc
movq %rax, %r13
movq %rbx, 144(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, %rbx
movl %r12d, 20(%rsp) # 4-byte Spill
movl %r12d, %r12d
testl %r14d, %r14d
jle .LBB2_4
# %bb.2: # %.lr.ph.preheader
xorl %eax, %eax
.p2align 4, 0x90
.LBB2_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %eax, %ecx
andl $7, %ecx
xorps %xmm0, %xmm0
cvtsi2ss %ecx, %xmm0
movss %xmm0, (%r13,%rax,4)
incq %rax
cmpq %rax, %r12
jne .LBB2_3
.LBB2_4: # %.preheader102
cmpl $0, 20(%rsp) # 4-byte Folded Reload
jle .LBB2_7
# %bb.5: # %.lr.ph105.preheader
xorl %eax, %eax
movl $3435973837, %ecx # imm = 0xCCCCCCCD
.p2align 4, 0x90
.LBB2_6: # %.lr.ph105
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
imulq %rcx, %rdx
shrq $34, %rdx
leal (%rdx,%rdx,4), %edx
movl %eax, %esi
subl %edx, %esi
xorps %xmm0, %xmm0
cvtsi2ss %esi, %xmm0
movss %xmm0, (%rbx,%rax,4)
incq %rax
cmpq %rax, %r12
jne .LBB2_6
.LBB2_7: # %._crit_edge
leaq 24(%rsp), %rdi
movq 144(%rsp), %r14 # 8-byte Reload
movq %r14, %rsi
callq hipMalloc
leaq 18(%r14), %rsi
leaq 8(%rsp), %rdi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r13, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
movl 136(%rsp), %eax # 4-byte Reload
shlq $32, %r15
orq %rax, %r15
movl 128(%rsp), %eax # 4-byte Reload
shlq $32, %rbp
orq %rax, %rbp
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $20, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq %r15, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8:
movq 24(%rsp), %rax
movq 8(%rsp), %rcx
movl $1073741824, 4(%rsp) # imm = 0x40000000
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z12axpy_kernel1fPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB2_35
# %bb.10:
movq %r15, %rdi
movl $1, %esi
movq %rbp, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_12
# %bb.11:
movq 24(%rsp), %rax
movq 8(%rsp), %rcx
movl $1073741824, 4(%rsp) # imm = 0x40000000
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z12axpy_kernel2fPfS_, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_12:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB2_35
# %bb.13:
movq 8(%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB2_14: # =>This Inner Loop Header: Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movq %rax, %r15
movl $.L.str.4, %esi
movl $4, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movss (%rbx,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movq %r15, %rdi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.5, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r14
cmpq $8, %r14
jne .LBB2_14
# %bb.15: # %.preheader
cmpl $0, 20(%rsp) # 4-byte Folded Reload
jle .LBB2_16
# %bb.25: # %.lr.ph109.preheader
shlq $2, %r12
xorl %eax, %eax
movl $3435973837, %ecx # imm = 0xCCCCCCCD
xorl %edx, %edx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB2_26: # %.lr.ph109
# =>This Inner Loop Header: Depth=1
movl %eax, %esi
imulq %rcx, %rsi
shrq $34, %rsi
leal (%rsi,%rsi,4), %esi
movl %eax, %edi
subl %esi, %edi
xorps %xmm0, %xmm0
cvtsi2ss %edi, %xmm0
cmpeqss (%rbx,%rdx), %xmm0
movd %xmm0, %esi
subl %esi, %ebp
addq $4, %rdx
incl %eax
cmpq %rdx, %r12
jne .LBB2_26
jmp .LBB2_17
.LBB2_16:
xorl %ebp, %ebp
.LBB2_17: # %._crit_edge110
movl $_ZSt4cout, %edi
movl $.L.str.6, %esi
movl $37, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %ebp, %esi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.7, %esi
movl $19, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r14
testq %r14, %r14
je .LBB2_36
# %bb.18: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB2_20
# %bb.19:
movzbl 67(%r14), %eax
jmp .LBB2_21
.LBB2_20:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_21: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
testl %ebp, %ebp
jne .LBB2_33
# %bb.22:
movl $_ZSt4cout, %edi
movl $.L.str.8, %esi
movl $21, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB2_36
# %bb.23: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i87
cmpb $0, 56(%rbx)
je .LBB2_27
# %bb.24:
movzbl 67(%rbx), %eax
jmp .LBB2_28
.LBB2_27:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_28: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit90
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_36
# %bb.29: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i92
cmpb $0, 56(%rbx)
je .LBB2_31
# %bb.30:
movzbl 67(%rbx), %ecx
jmp .LBB2_32
.LBB2_31:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_32: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit95
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
.LBB2_33:
movq 24(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
callq hipDeviceReset
xorl %eax, %eax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_35:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.LBB2_36:
callq _ZSt16__throw_bad_castv
.LBB2_34:
movl $.Lstr, %edi
callq puts@PLT
movl $1, %edi
callq exit
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12axpy_kernel2fPfS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12axpy_kernel1fPfS_, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12axpy_kernel2fPfS_,@object # @_Z12axpy_kernel2fPfS_
.section .rodata,"a",@progbits
.globl _Z12axpy_kernel2fPfS_
.p2align 3, 0x0
_Z12axpy_kernel2fPfS_:
.quad _Z27__device_stub__axpy_kernel2fPfS_
.size _Z12axpy_kernel2fPfS_, 8
.type _Z12axpy_kernel1fPfS_,@object # @_Z12axpy_kernel1fPfS_
.globl _Z12axpy_kernel1fPfS_
.p2align 3, 0x0
_Z12axpy_kernel1fPfS_:
.quad _Z27__device_stub__axpy_kernel1fPfS_
.size _Z12axpy_kernel1fPfS_, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "launching kernel...\n"
.size .L.str.1, 21
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "CUDA error: %s\n"
.size .L.str.2, 16
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "y["
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "] = "
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\n"
.size .L.str.5, 2
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "\n\n[TOOL verify] There are a total of\t"
.size .L.str.6, 38
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " incorrect numbers."
.size .L.str.7, 20
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "[TOOL verify] passed!"
.size .L.str.8, 22
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12axpy_kernel2fPfS_"
.size .L__unnamed_1, 22
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z12axpy_kernel1fPfS_"
.size .L__unnamed_2, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "usage: ./axpy [blocks_x] [blocks_y] [threads_x] [threads_y]"
.size .Lstr, 60
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__axpy_kernel2fPfS_
.addrsig_sym _Z27__device_stub__axpy_kernel1fPfS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12axpy_kernel2fPfS_
.addrsig_sym _Z12axpy_kernel1fPfS_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. |
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
cudaError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
cudaError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
cudaError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = cudaSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(float), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
cudaFree(dev_b);
return cudaStatus;
} | code for sm_80
Function : _Z5hDistPKiS0_Pfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0030*/ IMAD R0, R0, 0x6, RZ ; /* 0x0000000600007824 */
/* 0x001fca00078e02ff */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fca00078e00ff */
/*0070*/ IADD3 R2, -R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a10 */
/* 0x000fe40007ffe1ff */
/*0080*/ LOP3.LUT R3, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff037212 */
/* 0x000fe400078e33ff */
/*0090*/ LOP3.LUT P1, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fe2000782c0ff */
/*00a0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0000 */
/*00b0*/ IADD3 R3, R3, c[0x0][0x178], RZ ; /* 0x00005e0003037a10 */
/* 0x000fc80007ffe0ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fce0003f06070 */
/*00d0*/ @!P1 BRA 0x140 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*00e0*/ ISETP.NE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fe40003f25270 */
/*00f0*/ IADD3 R2, R0, 0x1, RZ ; /* 0x0000000100027810 */
/* 0x000fe40007ffe0ff */
/*0100*/ ISETP.NE.AND P2, PT, R4, 0x2, P1 ; /* 0x000000020400780c */
/* 0x000fd20000f45270 */
/*0110*/ @P1 IADD3 R3, R0, 0x2, RZ ; /* 0x0000000200031810 */
/* 0x000fc80007ffe0ff */
/*0120*/ @P2 IADD3 R3, R0, 0x3, RZ ; /* 0x0000000300032810 */
/* 0x000fca0007ffe0ff */
/*0130*/ @P1 IMAD.MOV.U32 R2, RZ, RZ, R3 ; /* 0x000000ffff021224 */
/* 0x000fc800078e0003 */
/*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ; /* 0x000000ffff007224 */
/* 0x000fe200078e0002 */
/*0150*/ @!P0 BRA 0x70 ; /* 0xffffff1000008947 */
/* 0x000fea000383ffff */
/*0160*/ IADD3 R0, -R2, c[0x0][0x178], RZ ; /* 0x00005e0002007a10 */
/* 0x000fe40007ffe1ff */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0f070 */
/*0180*/ ISETP.GT.AND P1, PT, R0, 0xc, PT ; /* 0x0000000c0000780c */
/* 0x000fe20003f24270 */
/*0190*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ; /* 0x000000ffff007224 */
/* 0x000fd800078e0002 */
/*01a0*/ @!P1 BRA 0x210 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*01b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*01c0*/ ULDC UR4, c[0x0][0x178] ; /* 0x00005e0000047ab9 */
/* 0x000fe40000000800 */
/*01d0*/ UIADD3 UR4, UR4, -0xc, URZ ; /* 0xfffffff404047890 */
/* 0x000fe4000fffe03f */
/*01e0*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */
/* 0x000fc80007ffe0ff */
/*01f0*/ ISETP.GE.AND P1, PT, R0, UR4, PT ; /* 0x0000000400007c0c */
/* 0x000fda000bf26270 */
/*0200*/ @!P1 BRA 0x1e0 ; /* 0xffffffd000009947 */
/* 0x000fea000383ffff */
/*0210*/ IADD3 R2, -R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a10 */
/* 0x000fc80007ffe1ff */
/*0220*/ ISETP.GT.AND P1, PT, R2, 0x4, PT ; /* 0x000000040200780c */
/* 0x000fda0003f24270 */
/*0230*/ @P1 PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000181c */
/* 0x000fe40003f0e170 */
/*0240*/ @P1 IADD3 R0, R0, 0x8, RZ ; /* 0x0000000800001810 */
/* 0x000fd60007ffe0ff */
/*0250*/ ISETP.LT.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000701670 */
/*0260*/ @!P0 BRA 0x70 ; /* 0xfffffe0000008947 */
/* 0x000fea000383ffff */
/*0270*/ IADD3 R0, R0, 0x4, RZ ; /* 0x0000000400007810 */
/* 0x000fe20007ffe0ff */
/*0280*/ BRA 0x70 ; /* 0xfffffde000007947 */
/* 0x000fea000383ffff */
/*0290*/ BRA 0x290; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. |
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
cudaError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
cudaError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
cudaError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = cudaSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(float), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
cudaFree(dev_b);
return cudaStatus;
} | .file "tmpxft_0017a323_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6871:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6871:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9euclideanPiS_
.type _Z9euclideanPiS_, @function
_Z9euclideanPiS_:
.LFB6866:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE6866:
.size _Z9euclideanPiS_, .-_Z9euclideanPiS_
.globl _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
.type _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii, @function
_Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii:
.LFB6893:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z5hDistPKiS0_Pfii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6893:
.size _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii, .-_Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
.globl _Z5hDistPKiS0_Pfii
.type _Z5hDistPKiS0_Pfii, @function
_Z5hDistPKiS0_Pfii:
.LFB6894:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6894:
.size _Z5hDistPKiS0_Pfii, .-_Z5hDistPKiS0_Pfii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Got size: "
.LC1:
.string "INVALID BPG TPB"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?"
.section .rodata.str1.1
.LC3:
.string "cudaMalloc failed!"
.LC4:
.string "cudaMemcpy failed!"
.LC5:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC6:
.string "cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
.text
.globl _Z11addWithCudaPKiS0_Pfjjj
.type _Z11addWithCudaPKiS0_Pfjjj, @function
_Z11addWithCudaPKiS0_Pfjjj:
.LFB6868:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $104, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 8(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, %r13d
movl %r8d, %r14d
movl %r9d, %ebp
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
movl $10, %edx
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebp, %r15d
movq %r15, %rsi
movq %rbx, %rdi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r12
testq %r12, %r12
je .L32
cmpb $0, 56(%r12)
je .L16
movzbl 67(%r12), %esi
.L17:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq $0, 40(%rsp)
movq $0, 48(%rsp)
movq $0, 56(%rsp)
movl %r13d, %eax
imull %r14d, %eax
cmpl %ebp, %eax
je .L18
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
jmp .L13
.L32:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L33
call _ZSt16__throw_bad_castv@PLT
.L33:
call __stack_chk_fail@PLT
.L16:
movq %r12, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r12), %rax
movl $10, %esi
movq %r12, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L17
.L18:
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L34
salq $2, %r15
leaq 56(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L35
leaq 40(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L36
leaq 48(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L37
movl $1, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L38
movl $1, %ecx
movq %r15, %rdx
movq 16(%rsp), %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L39
movl %r14d, 76(%rsp)
movl $1, 80(%rsp)
movl %r13d, 64(%rsp)
movl $1, 68(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L40
.L27:
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L41
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L42
movl $2, %ecx
movq %r15, %rdx
movq 56(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
je .L21
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L34:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L21:
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
.L13:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L43
movl %ebx, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L36:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L37:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L38:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L39:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L40:
movl $1, %r8d
movl $1, %ecx
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
jmp .L27
.L41:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L42:
movl %eax, %ecx
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6868:
.size _Z11addWithCudaPKiS0_Pfjjj, .-_Z11addWithCudaPKiS0_Pfjjj
.section .rodata.str1.1
.LC7:
.string "addWithCuda failed!"
.LC8:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB6867:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $160, %rsp
.cfi_def_cfa_offset 208
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
movl $1, (%rsp)
movl $2, 4(%rsp)
movl $3, 8(%rsp)
movl $4, 12(%rsp)
movl $5, 16(%rsp)
movl $6, 20(%rsp)
movl $7, 24(%rsp)
movl $8, 28(%rsp)
movl $9, 32(%rsp)
movl $10, 48(%rsp)
movl $20, 52(%rsp)
movl $30, 56(%rsp)
movl $40, 60(%rsp)
movl $50, 64(%rsp)
movl $60, 68(%rsp)
movl $70, 72(%rsp)
movl $80, 76(%rsp)
movl $90, 80(%rsp)
movl $100, 84(%rsp)
movl $110, 88(%rsp)
movl $120, 92(%rsp)
pxor %xmm0, %xmm0
movaps %xmm0, 96(%rsp)
movaps %xmm0, 112(%rsp)
movaps %xmm0, 128(%rsp)
leaq 96(%rsp), %rdx
leaq 48(%rsp), %rsi
movq %rsp, %rdi
movl $12, %r9d
movl $6, %r8d
movl $2, %ecx
call _Z11addWithCudaPKiS0_Pfjjj
leaq 96(%rsp), %r12
leaq 144(%rsp), %r14
leaq _ZSt4cout(%rip), %r13
testl %eax, %eax
je .L51
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %eax
jmp .L44
.L59:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L57
call _ZSt16__throw_bad_castv@PLT
.L57:
call __stack_chk_fail@PLT
.L49:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
.L50:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r12, %r14
je .L58
.L51:
pxor %xmm0, %xmm0
cvtss2sd (%r12), %xmm0
movq %r13, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L59
cmpb $0, 56(%rbp)
je .L49
movzbl 67(%rbp), %esi
jmp .L50
.L58:
call cudaDeviceReset@PLT
movl %eax, %edx
movl $0, %eax
testl %edx, %edx
jne .L60
.L44:
movq 152(%rsp), %rdx
subq %fs:40, %rdx
jne .L61
addq $160, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L60:
.cfi_restore_state
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
call __fprintf_chk@PLT
movl $1, %eax
jmp .L44
.L61:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6867:
.size main, .-main
.section .rodata.str1.1
.LC9:
.string "_Z5hDistPKiS0_Pfii"
.section .rodata.str1.8
.align 8
.LC10:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std3__419piecewise_constructE"
.align 8
.LC11:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std6ranges3__45__cpo4swapE"
.align 8
.LC12:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std6ranges3__45__cpo9iter_moveE"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6896:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z5hDistPKiS0_Pfii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6896:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.weak _ZN4cuda3std3__419piecewise_constructE
.section .rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
.type _ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
.size _ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
.zero 1
.weak _ZN4cuda3std6ranges3__45__cpo9iter_moveE
.section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
.type _ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
.size _ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
.zero 1
.weak _ZN4cuda3std6ranges3__45__cpo4swapE
.section .rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
.type _ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
.size _ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
.zero 1
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. |
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include "cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
cudaError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
cudaError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = cudaDeviceReset();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
cudaError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = cudaSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = cudaSetDevice(0);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = cudaGetLastError();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = cudaDeviceSynchronize();
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(float), cudaMemcpyDeviceToHost);
if (cudaStatus != cudaSuccess) {
fprintf(stderr, "cudaMemcpy failed!");
goto Error;
}
Error:
cudaFree(dev_c);
cudaFree(dev_a);
cudaFree(dev_b);
return cudaStatus;
} |
#include "hip/hip_runtime.h"
#include "hip/hip_cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
hipError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
hipError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
hipError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = hipSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
cudaStatus = hipMemcpy(dev_b, b, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(c, dev_c, size * sizeof(float), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
hipFree(dev_b);
return cudaStatus;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. |
#include "hip/hip_runtime.h"
#include "hip/hip_cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
hipError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
hipError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
hipError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = hipSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
cudaStatus = hipMemcpy(dev_b, b, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(c, dev_c, size * sizeof(float), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
hipFree(dev_b);
return cudaStatus;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5hDistPKiS0_Pfii
.globl _Z5hDistPKiS0_Pfii
.p2align 8
.type _Z5hDistPKiS0_Pfii,@function
_Z5hDistPKiS0_Pfii:
s_load_b32 s3, s[0:1], 0x1c
s_mul_i32 s4, s15, 6
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cmp_ge_i32 s4, s3
s_cbranch_scc1 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x449a4000
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5hDistPKiS0_Pfii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 32
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5hDistPKiS0_Pfii, .Lfunc_end0-_Z5hDistPKiS0_Pfii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 32
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5hDistPKiS0_Pfii
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z5hDistPKiS0_Pfii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. |
#include "hip/hip_runtime.h"
#include "hip/hip_cooperative_groups.h"
#include <stdio.h>
#include <iostream>
#define CHUNKSIZE 6 // number of vectors of B residing in local shared memory
#define PDIM 3 // vector space dimension
hipError_t addWithCuda(const int *a, const int *b, float *c, unsigned int BPG, unsigned int TPB, unsigned int size);
__device__ float euclidean(int* a, int* b)
{
float d = 0.0;
for (int idx = 0; idx < PDIM; idx++)
{
d += ((a[idx] - b[idx]) * (a[idx] - b[idx]));
}
return sqrtf(d);
}
// A and B are arrays holding integer coordinate vectors of dimensionality PDIM
// layout e.g. A[v1[0], v1[1], v1[2], v2[0], v2[1], v2[2], v3[0], v3[1], v3[2], ...]
__global__ void hDist(const int* A, const int* B, float* dists, const int cardA, const int cardB)
{
// shared cache for CHUNKSIZE point vectors of input matrix B
// shared memory is accessible on a per-block basis
__shared__ int chunk_cache_B[CHUNKSIZE * PDIM];
int trdix = threadIdx.x;
int blkix = blockIdx.x;
// populate block-local shared cache with vectors from B
for (int vecB_ix = 0; vecB_ix < CHUNKSIZE; vecB_ix++) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
chunk_cache_B[(vecB_ix * PDIM) + dim_idx + trdix] = B[((blkix * CHUNKSIZE) + vecB_ix) * PDIM + dim_idx + trdix];
}
}
__syncthreads();
int vecA_ix = 0;
int vector_cache_A[PDIM] = { 0 };
float dist_cache[CHUNKSIZE] = { 0.0 };
while ((blkix * CHUNKSIZE) < cardB) {
while (vecA_ix < cardA) {
for (int dim_idx = 0; dim_idx < PDIM; dim_idx++) {
vector_cache_A[dim_idx] = A[vecA_ix * dim_idx];
}
dist_cache[trdix] = euclidean(vector_cache_A, &chunk_cache_B[trdix * PDIM]);
vecA_ix += 1;
}
dists[blkix] = 1234;
}
// dists[trix] = sqrtf( (A[trix] + B[trix]) * (A[trix] + B[trix]));
}
int main()
{
const int pointdim = 3;
const int ca = 3;
const int cb = 4;
const int a[ca * pointdim] = { 1,2,3, 4,5,6, 7,8,9 };
const int b[cb * pointdim] = { 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120 };
float dsts[ca * cb] = { 0.0 };
// Add vectors in parallel.
hipError_t cudaStatus = addWithCuda(a, b, dsts, 2, 6, ca * cb);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addWithCuda failed!");
return 1;
}
for (int i = 0; i < ca*cb; i++) {
std::cout << dsts[i] << std::endl;
}
// cudaDeviceReset must be called before exiting in order for profiling and
// tracing tools such as Nsight and Visual Profiler to show complete traces.
cudaStatus = hipDeviceReset();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceReset failed!");
return 1;
}
return 0;
}
// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(const int* a, const int* b, float* c, unsigned int BPG, unsigned int TPB, unsigned int size)
{
std::cout << "Got size: " << size << std::endl;
int *dev_a = 0;
int *dev_b = 0;
float *dev_c = 0;
hipError_t cudaStatus;
if ((BPG * TPB) != size) {
fprintf(stderr, "INVALID BPG TPB");
cudaStatus = hipSetDevice(0);
return cudaStatus;
}
// Choose which GPU to run on, change this on a multi-GPU system.
cudaStatus = hipSetDevice(0);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipSetDevice failed! Do you have a CUDA-capable GPU installed?");
goto Error;
}
// Allocate GPU buffers for three vectors (two input, one output) .
cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(float));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
cudaStatus = hipMalloc((void**)&dev_b, size * sizeof(int));
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMalloc failed!");
goto Error;
}
// Copy input vectors from host memory to GPU buffers.
cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
cudaStatus = hipMemcpy(dev_b, b, size * sizeof(int), hipMemcpyHostToDevice);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
// Launch a kernel on the GPU with one thread for each element.
hDist<<<BPG, TPB>>>(dev_a, dev_b, dev_c, 1, 1);
// Check for any errors launching the kernel
cudaStatus = hipGetLastError();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
goto Error;
}
// cudaDeviceSynchronize waits for the kernel to finish, and returns
// any errors encountered during the launch.
cudaStatus = hipDeviceSynchronize();
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
goto Error;
}
// Copy output vector from GPU buffer to host memory.
cudaStatus = hipMemcpy(c, dev_c, size * sizeof(float), hipMemcpyDeviceToHost);
if (cudaStatus != hipSuccess) {
fprintf(stderr, "hipMemcpy failed!");
goto Error;
}
Error:
hipFree(dev_c);
hipFree(dev_a);
hipFree(dev_b);
return cudaStatus;
} | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__hDistPKiS0_Pfii # -- Begin function _Z20__device_stub__hDistPKiS0_Pfii
.p2align 4, 0x90
.type _Z20__device_stub__hDistPKiS0_Pfii,@function
_Z20__device_stub__hDistPKiS0_Pfii: # @_Z20__device_stub__hDistPKiS0_Pfii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z5hDistPKiS0_Pfii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z20__device_stub__hDistPKiS0_Pfii, .Lfunc_end0-_Z20__device_stub__hDistPKiS0_Pfii
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 2 # 0x2
.long 3 # 0x3
.long 4 # 0x4
.LCPI1_1:
.long 5 # 0x5
.long 6 # 0x6
.long 7 # 0x7
.long 8 # 0x8
.LCPI1_2:
.long 10 # 0xa
.long 20 # 0x14
.long 30 # 0x1e
.long 40 # 0x28
.LCPI1_3:
.long 50 # 0x32
.long 60 # 0x3c
.long 70 # 0x46
.long 80 # 0x50
.LCPI1_4:
.long 90 # 0x5a
.long 100 # 0x64
.long 110 # 0x6e
.long 120 # 0x78
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $144, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,2,3,4]
movaps %xmm0, (%rsp)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [5,6,7,8]
movaps %xmm0, 16(%rsp)
movl $9, 32(%rsp)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [10,20,30,40]
movaps %xmm0, 96(%rsp)
movaps .LCPI1_3(%rip), %xmm0 # xmm0 = [50,60,70,80]
movaps %xmm0, 112(%rsp)
movaps .LCPI1_4(%rip), %xmm0 # xmm0 = [90,100,110,120]
movaps %xmm0, 128(%rsp)
xorps %xmm0, %xmm0
movaps %xmm0, 80(%rsp)
movaps %xmm0, 64(%rsp)
movaps %xmm0, 48(%rsp)
movq %rsp, %rdi
leaq 96(%rsp), %rsi
leaq 48(%rsp), %rdx
movl $2, %ecx
movl $6, %r8d
movl $12, %r9d
callq _Z11addWithCudaPKiS0_Pfjjj
testl %eax, %eax
jne .LBB1_4
# %bb.1: # %.preheader.preheader
xorl %r14d, %r14d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_7: # in Loop: Header=BB1_2 Depth=1
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB1_8: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB1_2 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r14
cmpq $12, %r14
je .LBB1_9
.LBB1_2: # %.preheader
# =>This Inner Loop Header: Depth=1
movss 48(%rsp,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_3
# %bb.5: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB1_2 Depth=1
cmpb $0, 56(%rbx)
je .LBB1_7
# %bb.6: # in Loop: Header=BB1_2 Depth=1
movzbl 67(%rbx), %ecx
jmp .LBB1_8
.LBB1_9:
callq hipDeviceReset
movl %eax, %ecx
xorl %eax, %eax
testl %ecx, %ecx
jne .LBB1_10
.LBB1_12:
addq $144, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB1_4:
.cfi_def_cfa_offset 176
movq stderr(%rip), %rcx
movl $.L.str, %edi
movl $19, %esi
jmp .LBB1_11
.LBB1_10:
movq stderr(%rip), %rcx
movl $.L.str.1, %edi
movl $22, %esi
.LBB1_11:
movl $1, %edx
callq fwrite@PLT
movl $1, %eax
jmp .LBB1_12
.LBB1_3:
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z11addWithCudaPKiS0_Pfjjj # -- Begin function _Z11addWithCudaPKiS0_Pfjjj
.p2align 4, 0x90
.type _Z11addWithCudaPKiS0_Pfjjj,@function
_Z11addWithCudaPKiS0_Pfjjj: # @_Z11addWithCudaPKiS0_Pfjjj
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, %ebx
movl %r8d, %ebp
movl %ecx, %r15d
movq %rdx, 32(%rsp) # 8-byte Spill
movq %rsi, 40(%rsp) # 8-byte Spill
movq %rdi, 48(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $10, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl %ebx, %r14d
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertImEERSoT_
movq %rax, %r12
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %r13
testq %r13, %r13
je .LBB2_27
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r13)
je .LBB2_3
# %bb.2:
movzbl 67(%r13), %eax
jmp .LBB2_4
.LBB2_3:
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r13), %rax
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %r12, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq $0, 16(%rsp)
movq $0, 8(%rsp)
movq $0, (%rsp)
movl %ebp, %eax
imull %r15d, %eax
cmpl %ebx, %eax
jne .LBB2_23
# %bb.5:
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB2_24
# %bb.6:
shlq $2, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.7:
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.8:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.9:
movq 16(%rsp), %rdi
movq 48(%rsp), %rsi # 8-byte Reload
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_18
# %bb.10:
movq 8(%rsp), %rdi
movq 40(%rsp), %rsi # 8-byte Reload
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_18
# %bb.11:
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_13
# %bb.12:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl $1, 28(%rsp)
movl $1, 24(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 28(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z5hDistPKiS0_Pfii, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_13:
callq hipGetLastError
testl %eax, %eax
jne .LBB2_25
# %bb.14:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB2_26
# %bb.15:
movq (%rsp), %rsi
movq 32(%rsp), %rdi # 8-byte Reload
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
testl %eax, %eax
je .LBB2_22
# %bb.16:
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
movl $1, %edx
movl %eax, %ebx
jmp .LBB2_21
.LBB2_17:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.5, %edi
jmp .LBB2_19
.LBB2_18:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
.LBB2_19:
movl $17, %esi
.LBB2_20:
movl $1, %edx
.LBB2_21:
callq fwrite@PLT
.LBB2_22:
movq (%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_23:
.cfi_def_cfa_offset 224
movq stderr(%rip), %rcx
movl $.L.str.3, %edi
movl $15, %esi
movl $1, %edx
callq fwrite@PLT
xorl %edi, %edi
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp hipSetDevice # TAILCALL
.LBB2_24:
.cfi_def_cfa_offset 224
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.4, %edi
movl $63, %esi
jmp .LBB2_20
.LBB2_25:
movq stderr(%rip), %r14
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %r14, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB2_22
.LBB2_26:
movq stderr(%rip), %rdi
movl $.L.str.8, %esi
movl %eax, %ebx
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB2_22
.LBB2_27:
callq _ZSt16__throw_bad_castv
.Lfunc_end2:
.size _Z11addWithCudaPKiS0_Pfjjj, .Lfunc_end2-_Z11addWithCudaPKiS0_Pfjjj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5hDistPKiS0_Pfii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5hDistPKiS0_Pfii,@object # @_Z5hDistPKiS0_Pfii
.section .rodata,"a",@progbits
.globl _Z5hDistPKiS0_Pfii
.p2align 3, 0x0
_Z5hDistPKiS0_Pfii:
.quad _Z20__device_stub__hDistPKiS0_Pfii
.size _Z5hDistPKiS0_Pfii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "addWithCuda failed!"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "hipDeviceReset failed!"
.size .L.str.1, 23
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Got size: "
.size .L.str.2, 11
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "INVALID BPG TPB"
.size .L.str.3, 16
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipSetDevice failed! Do you have a CUDA-capable GPU installed?"
.size .L.str.4, 64
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "hipMalloc failed!"
.size .L.str.5, 18
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "hipMemcpy failed!"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launching addKernel!\n"
.size .L.str.8, 72
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z5hDistPKiS0_Pfii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__hDistPKiS0_Pfii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5hDistPKiS0_Pfii
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5hDistPKiS0_Pfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0030*/ IMAD R0, R0, 0x6, RZ ; /* 0x0000000600007824 */
/* 0x001fca00078e02ff */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */
/* 0x000fca00078e00ff */
/*0070*/ IADD3 R2, -R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a10 */
/* 0x000fe40007ffe1ff */
/*0080*/ LOP3.LUT R3, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff037212 */
/* 0x000fe400078e33ff */
/*0090*/ LOP3.LUT P1, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fe2000782c0ff */
/*00a0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0000 */
/*00b0*/ IADD3 R3, R3, c[0x0][0x178], RZ ; /* 0x00005e0003037a10 */
/* 0x000fc80007ffe0ff */
/*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fce0003f06070 */
/*00d0*/ @!P1 BRA 0x140 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*00e0*/ ISETP.NE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fe40003f25270 */
/*00f0*/ IADD3 R2, R0, 0x1, RZ ; /* 0x0000000100027810 */
/* 0x000fe40007ffe0ff */
/*0100*/ ISETP.NE.AND P2, PT, R4, 0x2, P1 ; /* 0x000000020400780c */
/* 0x000fd20000f45270 */
/*0110*/ @P1 IADD3 R3, R0, 0x2, RZ ; /* 0x0000000200031810 */
/* 0x000fc80007ffe0ff */
/*0120*/ @P2 IADD3 R3, R0, 0x3, RZ ; /* 0x0000000300032810 */
/* 0x000fca0007ffe0ff */
/*0130*/ @P1 IMAD.MOV.U32 R2, RZ, RZ, R3 ; /* 0x000000ffff021224 */
/* 0x000fc800078e0003 */
/*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ; /* 0x000000ffff007224 */
/* 0x000fe200078e0002 */
/*0150*/ @!P0 BRA 0x70 ; /* 0xffffff1000008947 */
/* 0x000fea000383ffff */
/*0160*/ IADD3 R0, -R2, c[0x0][0x178], RZ ; /* 0x00005e0002007a10 */
/* 0x000fe40007ffe1ff */
/*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0f070 */
/*0180*/ ISETP.GT.AND P1, PT, R0, 0xc, PT ; /* 0x0000000c0000780c */
/* 0x000fe20003f24270 */
/*0190*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ; /* 0x000000ffff007224 */
/* 0x000fd800078e0002 */
/*01a0*/ @!P1 BRA 0x210 ; /* 0x0000006000009947 */
/* 0x000fea0003800000 */
/*01b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*01c0*/ ULDC UR4, c[0x0][0x178] ; /* 0x00005e0000047ab9 */
/* 0x000fe40000000800 */
/*01d0*/ UIADD3 UR4, UR4, -0xc, URZ ; /* 0xfffffff404047890 */
/* 0x000fe4000fffe03f */
/*01e0*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */
/* 0x000fc80007ffe0ff */
/*01f0*/ ISETP.GE.AND P1, PT, R0, UR4, PT ; /* 0x0000000400007c0c */
/* 0x000fda000bf26270 */
/*0200*/ @!P1 BRA 0x1e0 ; /* 0xffffffd000009947 */
/* 0x000fea000383ffff */
/*0210*/ IADD3 R2, -R0, c[0x0][0x178], RZ ; /* 0x00005e0000027a10 */
/* 0x000fc80007ffe1ff */
/*0220*/ ISETP.GT.AND P1, PT, R2, 0x4, PT ; /* 0x000000040200780c */
/* 0x000fda0003f24270 */
/*0230*/ @P1 PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000181c */
/* 0x000fe40003f0e170 */
/*0240*/ @P1 IADD3 R0, R0, 0x8, RZ ; /* 0x0000000800001810 */
/* 0x000fd60007ffe0ff */
/*0250*/ ISETP.LT.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000701670 */
/*0260*/ @!P0 BRA 0x70 ; /* 0xfffffe0000008947 */
/* 0x000fea000383ffff */
/*0270*/ IADD3 R0, R0, 0x4, RZ ; /* 0x0000000400007810 */
/* 0x000fe20007ffe0ff */
/*0280*/ BRA 0x70 ; /* 0xfffffde000007947 */
/* 0x000fea000383ffff */
/*0290*/ BRA 0x290; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5hDistPKiS0_Pfii
.globl _Z5hDistPKiS0_Pfii
.p2align 8
.type _Z5hDistPKiS0_Pfii,@function
_Z5hDistPKiS0_Pfii:
s_load_b32 s3, s[0:1], 0x1c
s_mul_i32 s4, s15, 6
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cmp_ge_i32 s4, s3
s_cbranch_scc1 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, s15
s_ashr_i32 s3, s15, 31
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x449a4000
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v1, s[0:1]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5hDistPKiS0_Pfii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 32
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 2
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5hDistPKiS0_Pfii, .Lfunc_end0-_Z5hDistPKiS0_Pfii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 32
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5hDistPKiS0_Pfii
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z5hDistPKiS0_Pfii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 2
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017a323_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6871:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6871:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9euclideanPiS_
.type _Z9euclideanPiS_, @function
_Z9euclideanPiS_:
.LFB6866:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE6866:
.size _Z9euclideanPiS_, .-_Z9euclideanPiS_
.globl _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
.type _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii, @function
_Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii:
.LFB6893:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z5hDistPKiS0_Pfii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6893:
.size _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii, .-_Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
.globl _Z5hDistPKiS0_Pfii
.type _Z5hDistPKiS0_Pfii, @function
_Z5hDistPKiS0_Pfii:
.LFB6894:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6894:
.size _Z5hDistPKiS0_Pfii, .-_Z5hDistPKiS0_Pfii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Got size: "
.LC1:
.string "INVALID BPG TPB"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "cudaSetDevice failed! Do you have a CUDA-capable GPU installed?"
.section .rodata.str1.1
.LC3:
.string "cudaMalloc failed!"
.LC4:
.string "cudaMemcpy failed!"
.LC5:
.string "addKernel launch failed: %s\n"
.section .rodata.str1.8
.align 8
.LC6:
.string "cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
.text
.globl _Z11addWithCudaPKiS0_Pfjjj
.type _Z11addWithCudaPKiS0_Pfjjj, @function
_Z11addWithCudaPKiS0_Pfjjj:
.LFB6868:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $104, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 8(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, %r13d
movl %r8d, %r14d
movl %r9d, %ebp
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
movl $10, %edx
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebp, %r15d
movq %r15, %rsi
movq %rbx, %rdi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r12
testq %r12, %r12
je .L32
cmpb $0, 56(%r12)
je .L16
movzbl 67(%r12), %esi
.L17:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq $0, 40(%rsp)
movq $0, 48(%rsp)
movq $0, 56(%rsp)
movl %r13d, %eax
imull %r14d, %eax
cmpl %ebp, %eax
je .L18
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
jmp .L13
.L32:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L33
call _ZSt16__throw_bad_castv@PLT
.L33:
call __stack_chk_fail@PLT
.L16:
movq %r12, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r12), %rax
movl $10, %esi
movq %r12, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L17
.L18:
movl $0, %edi
call cudaSetDevice@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L34
salq $2, %r15
leaq 56(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L35
leaq 40(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L36
leaq 48(%rsp), %rdi
movq %r15, %rsi
call cudaMalloc@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L37
movl $1, %ecx
movq %r15, %rdx
movq 8(%rsp), %rsi
movq 40(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L38
movl $1, %ecx
movq %r15, %rdx
movq 16(%rsp), %rsi
movq 48(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L39
movl %r14d, 76(%rsp)
movl $1, 80(%rsp)
movl %r13d, 64(%rsp)
movl $1, 68(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L40
.L27:
call cudaGetLastError@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L41
call cudaDeviceSynchronize@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L42
movl $2, %ecx
movq %r15, %rdx
movq 56(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ebx
testl %eax, %eax
je .L21
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L34:
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L21:
movq 56(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq 48(%rsp), %rdi
call cudaFree@PLT
.L13:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L43
movl %ebx, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L36:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L37:
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L38:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L39:
leaq .LC4(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L40:
movl $1, %r8d
movl $1, %ecx
movq 56(%rsp), %rdx
movq 48(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z32__device_stub__Z5hDistPKiS0_PfiiPKiS0_Pfii
jmp .L27
.L41:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L42:
movl %eax, %ecx
leaq .LC6(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L21
.L43:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6868:
.size _Z11addWithCudaPKiS0_Pfjjj, .-_Z11addWithCudaPKiS0_Pfjjj
.section .rodata.str1.1
.LC7:
.string "addWithCuda failed!"
.LC8:
.string "cudaDeviceReset failed!"
.text
.globl main
.type main, @function
main:
.LFB6867:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $160, %rsp
.cfi_def_cfa_offset 208
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
movl $1, (%rsp)
movl $2, 4(%rsp)
movl $3, 8(%rsp)
movl $4, 12(%rsp)
movl $5, 16(%rsp)
movl $6, 20(%rsp)
movl $7, 24(%rsp)
movl $8, 28(%rsp)
movl $9, 32(%rsp)
movl $10, 48(%rsp)
movl $20, 52(%rsp)
movl $30, 56(%rsp)
movl $40, 60(%rsp)
movl $50, 64(%rsp)
movl $60, 68(%rsp)
movl $70, 72(%rsp)
movl $80, 76(%rsp)
movl $90, 80(%rsp)
movl $100, 84(%rsp)
movl $110, 88(%rsp)
movl $120, 92(%rsp)
pxor %xmm0, %xmm0
movaps %xmm0, 96(%rsp)
movaps %xmm0, 112(%rsp)
movaps %xmm0, 128(%rsp)
leaq 96(%rsp), %rdx
leaq 48(%rsp), %rsi
movq %rsp, %rdi
movl $12, %r9d
movl $6, %r8d
movl $2, %ecx
call _Z11addWithCudaPKiS0_Pfjjj
leaq 96(%rsp), %r12
leaq 144(%rsp), %r14
leaq _ZSt4cout(%rip), %r13
testl %eax, %eax
je .L51
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %eax
jmp .L44
.L59:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L57
call _ZSt16__throw_bad_castv@PLT
.L57:
call __stack_chk_fail@PLT
.L49:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
.L50:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r12, %r14
je .L58
.L51:
pxor %xmm0, %xmm0
cvtss2sd (%r12), %xmm0
movq %r13, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L59
cmpb $0, 56(%rbp)
je .L49
movzbl 67(%rbp), %esi
jmp .L50
.L58:
call cudaDeviceReset@PLT
movl %eax, %edx
movl $0, %eax
testl %edx, %edx
jne .L60
.L44:
movq 152(%rsp), %rdx
subq %fs:40, %rdx
jne .L61
addq $160, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L60:
.cfi_restore_state
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
call __fprintf_chk@PLT
movl $1, %eax
jmp .L44
.L61:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE6867:
.size main, .-main
.section .rodata.str1.1
.LC9:
.string "_Z5hDistPKiS0_Pfii"
.section .rodata.str1.8
.align 8
.LC10:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std3__419piecewise_constructE"
.align 8
.LC11:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std6ranges3__45__cpo4swapE"
.align 8
.LC12:
.string "_ZN39_INTERNAL_ba769554_9_kernel_cu_95ca1f654cuda3std6ranges3__45__cpo9iter_moveE"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6896:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z5hDistPKiS0_Pfii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $1, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE6896:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.weak _ZN4cuda3std3__419piecewise_constructE
.section .rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
.type _ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
.size _ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
.zero 1
.weak _ZN4cuda3std6ranges3__45__cpo9iter_moveE
.section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
.type _ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
.size _ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
.zero 1
.weak _ZN4cuda3std6ranges3__45__cpo4swapE
.section .rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
.type _ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
.size _ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
.zero 1
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__hDistPKiS0_Pfii # -- Begin function _Z20__device_stub__hDistPKiS0_Pfii
.p2align 4, 0x90
.type _Z20__device_stub__hDistPKiS0_Pfii,@function
_Z20__device_stub__hDistPKiS0_Pfii: # @_Z20__device_stub__hDistPKiS0_Pfii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z5hDistPKiS0_Pfii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z20__device_stub__hDistPKiS0_Pfii, .Lfunc_end0-_Z20__device_stub__hDistPKiS0_Pfii
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI1_0:
.long 1 # 0x1
.long 2 # 0x2
.long 3 # 0x3
.long 4 # 0x4
.LCPI1_1:
.long 5 # 0x5
.long 6 # 0x6
.long 7 # 0x7
.long 8 # 0x8
.LCPI1_2:
.long 10 # 0xa
.long 20 # 0x14
.long 30 # 0x1e
.long 40 # 0x28
.LCPI1_3:
.long 50 # 0x32
.long 60 # 0x3c
.long 70 # 0x46
.long 80 # 0x50
.LCPI1_4:
.long 90 # 0x5a
.long 100 # 0x64
.long 110 # 0x6e
.long 120 # 0x78
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $144, %rsp
.cfi_def_cfa_offset 176
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1,2,3,4]
movaps %xmm0, (%rsp)
movaps .LCPI1_1(%rip), %xmm0 # xmm0 = [5,6,7,8]
movaps %xmm0, 16(%rsp)
movl $9, 32(%rsp)
movaps .LCPI1_2(%rip), %xmm0 # xmm0 = [10,20,30,40]
movaps %xmm0, 96(%rsp)
movaps .LCPI1_3(%rip), %xmm0 # xmm0 = [50,60,70,80]
movaps %xmm0, 112(%rsp)
movaps .LCPI1_4(%rip), %xmm0 # xmm0 = [90,100,110,120]
movaps %xmm0, 128(%rsp)
xorps %xmm0, %xmm0
movaps %xmm0, 80(%rsp)
movaps %xmm0, 64(%rsp)
movaps %xmm0, 48(%rsp)
movq %rsp, %rdi
leaq 96(%rsp), %rsi
leaq 48(%rsp), %rdx
movl $2, %ecx
movl $6, %r8d
movl $12, %r9d
callq _Z11addWithCudaPKiS0_Pfjjj
testl %eax, %eax
jne .LBB1_4
# %bb.1: # %.preheader.preheader
xorl %r14d, %r14d
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_7: # in Loop: Header=BB1_2 Depth=1
movq %rbx, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB1_8: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB1_2 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r14
cmpq $12, %r14
je .LBB1_9
.LBB1_2: # %.preheader
# =>This Inner Loop Header: Depth=1
movss 48(%rsp,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_3
# %bb.5: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB1_2 Depth=1
cmpb $0, 56(%rbx)
je .LBB1_7
# %bb.6: # in Loop: Header=BB1_2 Depth=1
movzbl 67(%rbx), %ecx
jmp .LBB1_8
.LBB1_9:
callq hipDeviceReset
movl %eax, %ecx
xorl %eax, %eax
testl %ecx, %ecx
jne .LBB1_10
.LBB1_12:
addq $144, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB1_4:
.cfi_def_cfa_offset 176
movq stderr(%rip), %rcx
movl $.L.str, %edi
movl $19, %esi
jmp .LBB1_11
.LBB1_10:
movq stderr(%rip), %rcx
movl $.L.str.1, %edi
movl $22, %esi
.LBB1_11:
movl $1, %edx
callq fwrite@PLT
movl $1, %eax
jmp .LBB1_12
.LBB1_3:
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z11addWithCudaPKiS0_Pfjjj # -- Begin function _Z11addWithCudaPKiS0_Pfjjj
.p2align 4, 0x90
.type _Z11addWithCudaPKiS0_Pfjjj,@function
_Z11addWithCudaPKiS0_Pfjjj: # @_Z11addWithCudaPKiS0_Pfjjj
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, %ebx
movl %r8d, %ebp
movl %ecx, %r15d
movq %rdx, 32(%rsp) # 8-byte Spill
movq %rsi, 40(%rsp) # 8-byte Spill
movq %rdi, 48(%rsp) # 8-byte Spill
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $10, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl %ebx, %r14d
movl $_ZSt4cout, %edi
movq %r14, %rsi
callq _ZNSo9_M_insertImEERSoT_
movq %rax, %r12
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %r13
testq %r13, %r13
je .LBB2_27
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r13)
je .LBB2_3
# %bb.2:
movzbl 67(%r13), %eax
jmp .LBB2_4
.LBB2_3:
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r13), %rax
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movq %r12, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq $0, 16(%rsp)
movq $0, 8(%rsp)
movq $0, (%rsp)
movl %ebp, %eax
imull %r15d, %eax
cmpl %ebx, %eax
jne .LBB2_23
# %bb.5:
xorl %edi, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB2_24
# %bb.6:
shlq $2, %r14
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.7:
leaq 16(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.8:
leaq 8(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_17
# %bb.9:
movq 16(%rsp), %rdi
movq 48(%rsp), %rsi # 8-byte Reload
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_18
# %bb.10:
movq 8(%rsp), %rdi
movq 40(%rsp), %rsi # 8-byte Reload
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_18
# %bb.11:
movl %r15d, %edi
movabsq $4294967296, %rax # imm = 0x100000000
orq %rax, %rdi
movl %ebp, %edx
orq %rax, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_13
# %bb.12:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl $1, 28(%rsp)
movl $1, 24(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 28(%rsp), %rax
movq %rax, 152(%rsp)
leaq 24(%rsp), %rax
movq %rax, 160(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z5hDistPKiS0_Pfii, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_13:
callq hipGetLastError
testl %eax, %eax
jne .LBB2_25
# %bb.14:
callq hipDeviceSynchronize
testl %eax, %eax
jne .LBB2_26
# %bb.15:
movq (%rsp), %rsi
movq 32(%rsp), %rdi # 8-byte Reload
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
testl %eax, %eax
je .LBB2_22
# %bb.16:
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
movl $17, %esi
movl $1, %edx
movl %eax, %ebx
jmp .LBB2_21
.LBB2_17:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.5, %edi
jmp .LBB2_19
.LBB2_18:
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.6, %edi
.LBB2_19:
movl $17, %esi
.LBB2_20:
movl $1, %edx
.LBB2_21:
callq fwrite@PLT
.LBB2_22:
movq (%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movl %ebx, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_23:
.cfi_def_cfa_offset 224
movq stderr(%rip), %rcx
movl $.L.str.3, %edi
movl $15, %esi
movl $1, %edx
callq fwrite@PLT
xorl %edi, %edi
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp hipSetDevice # TAILCALL
.LBB2_24:
.cfi_def_cfa_offset 224
movl %eax, %ebx
movq stderr(%rip), %rcx
movl $.L.str.4, %edi
movl $63, %esi
jmp .LBB2_20
.LBB2_25:
movq stderr(%rip), %r14
movl %eax, %ebx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.7, %esi
movq %r14, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
jmp .LBB2_22
.LBB2_26:
movq stderr(%rip), %rdi
movl $.L.str.8, %esi
movl %eax, %ebx
movl %eax, %edx
xorl %eax, %eax
callq fprintf
jmp .LBB2_22
.LBB2_27:
callq _ZSt16__throw_bad_castv
.Lfunc_end2:
.size _Z11addWithCudaPKiS0_Pfjjj, .Lfunc_end2-_Z11addWithCudaPKiS0_Pfjjj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5hDistPKiS0_Pfii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5hDistPKiS0_Pfii,@object # @_Z5hDistPKiS0_Pfii
.section .rodata,"a",@progbits
.globl _Z5hDistPKiS0_Pfii
.p2align 3, 0x0
_Z5hDistPKiS0_Pfii:
.quad _Z20__device_stub__hDistPKiS0_Pfii
.size _Z5hDistPKiS0_Pfii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "addWithCuda failed!"
.size .L.str, 20
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "hipDeviceReset failed!"
.size .L.str.1, 23
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Got size: "
.size .L.str.2, 11
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "INVALID BPG TPB"
.size .L.str.3, 16
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipSetDevice failed! Do you have a CUDA-capable GPU installed?"
.size .L.str.4, 64
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "hipMalloc failed!"
.size .L.str.5, 18
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "hipMemcpy failed!"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "addKernel launch failed: %s\n"
.size .L.str.7, 29
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "hipDeviceSynchronize returned error code %d after launching addKernel!\n"
.size .L.str.8, 72
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z5hDistPKiS0_Pfii"
.size .L__unnamed_1, 19
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__hDistPKiS0_Pfii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5hDistPKiS0_Pfii
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
cudaMalloc((void**)&GA, N * sizeof(float));
cudaMalloc((void**)&GB, N * sizeof(float));
cudaMemcpy(GA, A, N * sizeof(float), cudaMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
cudaMemcpy(B, GB, N * sizeof(float), cudaMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
cudaFree(A);
printf("from cuda");
return (int) sum;
} | code for sm_80
Function : _Z3gpuPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R4, R4, c[0x0][0x0], R3 ; /* 0x0000000004047a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */
/* 0x000fcc00078e0205 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fc800078e0205 */
/*00b0*/ FMUL R7, R2, R2 ; /* 0x0000000202077220 */
/* 0x004fca0000400000 */
/*00c0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
cudaMalloc((void**)&GA, N * sizeof(float));
cudaMalloc((void**)&GB, N * sizeof(float));
cudaMemcpy(GA, A, N * sizeof(float), cudaMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
cudaMemcpy(B, GB, N * sizeof(float), cudaMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
cudaFree(A);
printf("from cuda");
return (int) sum;
} | .file "tmpxft_0014a8e4_00000000-6_foo.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl get_global
.type get_global, @function
get_global:
.LFB2057:
.cfi_startproc
endbr64
movl global_i(%rip), %eax
ret
.cfi_endproc
.LFE2057:
.size get_global, .-get_global
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.text
.globl array_trans_i
.type array_trans_i, @function
array_trans_i:
.LFB2058:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L9
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC0(%rip), %rbp
.L6:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
sall (%rbx)
addq $4, %rbx
cmpq %r12, %rbx
jne .L6
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2058:
.size array_trans_i, .-array_trans_i
.section .rodata.str1.1
.LC1:
.string "%ld\n"
.text
.globl array_trans_l
.type array_trans_l, @function
array_trans_l:
.LFB2059:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L17
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,8), %r12
leaq .LC1(%rip), %rbp
.L14:
movq (%rbx), %rdx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
salq (%rbx)
addq $8, %rbx
cmpq %r12, %rbx
jne .L14
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2059:
.size array_trans_l, .-array_trans_l
.section .rodata.str1.1
.LC2:
.string "%.1f\n"
.text
.globl array_trans_f
.type array_trans_f, @function
array_trans_f:
.LFB2060:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L25
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC2(%rip), %rbp
.L22:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movss (%rbx), %xmm0
addss %xmm0, %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r12, %rbx
jne .L22
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2060:
.size array_trans_f, .-array_trans_f
.globl set_global
.type set_global, @function
set_global:
.LFB2061:
.cfi_startproc
endbr64
movl %edi, global_i(%rip)
movl $11, %eax
ret
.cfi_endproc
.LFE2061:
.size set_global, .-set_global
.globl _Z25__device_stub__Z3gpuPfS_iPfS_i
.type _Z25__device_stub__Z3gpuPfS_iPfS_i, @function
_Z25__device_stub__Z3gpuPfS_iPfS_i:
.LFB2087:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L33
.L29:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L34
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3gpuPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L29
.L34:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z25__device_stub__Z3gpuPfS_iPfS_i, .-_Z25__device_stub__Z3gpuPfS_iPfS_i
.globl _Z3gpuPfS_i
.type _Z3gpuPfS_i, @function
_Z3gpuPfS_i:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z25__device_stub__Z3gpuPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z3gpuPfS_i, .-_Z3gpuPfS_i
.section .rodata.str1.1
.LC4:
.string "from cuda"
.text
.globl foo
.type foo, @function
foo:
.LFB2062:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $160, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 64(%rsp), %rax
leaq 104(%rsp), %rdx
.L38:
pxor %xmm0, %xmm0
cvtsi2ssl %edi, %xmm0
movss %xmm0, (%rax)
addl $1, %edi
addq $4, %rax
cmpq %rdx, %rax
jne .L38
leaq 24(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $20, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L45
.L39:
leaq 112(%rsp), %rbx
movl $2, %ecx
movl $40, %edx
movq 32(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq %rbx, %rax
leaq 152(%rsp), %rdx
movl $0x00000000, 12(%rsp)
.L40:
movss 12(%rsp), %xmm1
addss (%rax), %xmm1
movss %xmm1, 12(%rsp)
addq $4, %rax
cmpq %rdx, %rax
jne .L40
leaq 64(%rsp), %rdi
call cudaFree@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cvttss2sil 12(%rsp), %eax
movq 152(%rsp), %rdx
subq %fs:40, %rdx
jne .L46
addq $160, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movl $10, %edx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z25__device_stub__Z3gpuPfS_iPfS_i
jmp .L39
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size foo, .-foo
.section .rodata.str1.1
.LC5:
.string "_Z3gpuPfS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z3gpuPfS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl global_i
.data
.align 4
.type global_i, @object
.size global_i, 4
global_i:
.long 2
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
cudaMalloc((void**)&GA, N * sizeof(float));
cudaMalloc((void**)&GB, N * sizeof(float));
cudaMemcpy(GA, A, N * sizeof(float), cudaMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
cudaMemcpy(B, GB, N * sizeof(float), cudaMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
cudaFree(A);
printf("from cuda");
return (int) sum;
} | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
hipMalloc((void**)&GA, N * sizeof(float));
hipMalloc((void**)&GB, N * sizeof(float));
hipMemcpy(GA, A, N * sizeof(float), hipMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
hipMemcpy(B, GB, N * sizeof(float), hipMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
hipFree(A);
printf("from cuda");
return (int) sum;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
hipMalloc((void**)&GA, N * sizeof(float));
hipMalloc((void**)&GB, N * sizeof(float));
hipMemcpy(GA, A, N * sizeof(float), hipMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
hipMemcpy(B, GB, N * sizeof(float), hipMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
hipFree(A);
printf("from cuda");
return (int) sum;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3gpuPfS_i
.globl _Z3gpuPfS_i
.p2align 8
.type _Z3gpuPfS_i,@function
_Z3gpuPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3gpuPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3gpuPfS_i, .Lfunc_end0-_Z3gpuPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3gpuPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3gpuPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
int global_i = 2;
extern "C" int foo(int);
extern "C" int get_global();
extern "C" int set_global(int);
extern "C" int array_trans_i(int* array, int n);
extern "C" int array_trans_l(long* array, int n);
extern "C" int array_trans_f(float* array, int n);
int get_global(){
return global_i;
}
int array_trans_i(int* array, int n){
for(int i = 0; i < n; i++){
printf("%d\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_l(long* array, int n){
for(int i = 0; i < n; i++){
printf("%ld\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int array_trans_f(float* array, int n){
for(int i = 0; i < n; i++){
printf("%.1f\n", array[i]);
array[i] = array[i] * 2;
}
return 0;
}
int set_global(int i){
global_i = i;
return (int) 11;
}
__global__ void gpu(float *A, float *B, int N){
int ib = blockDim.x * blockIdx.x + threadIdx.x;
if (ib < N){
B[ib] = A[ib] * A[ib];
}
}
int foo(int a){
int N = 10;
float A[N];
float B[N];
for(int i = 0; i < N; i++){
A[i] = a + i;
}
int threadsPerBlock = 20;
int blocksPerGrid = (N + threadsPerBlock - 1) / threadsPerBlock;
float *GA, *GB;
hipMalloc((void**)&GA, N * sizeof(float));
hipMalloc((void**)&GB, N * sizeof(float));
hipMemcpy(GA, A, N * sizeof(float), hipMemcpyHostToDevice);
gpu<<<blocksPerGrid, threadsPerBlock>>>(GA, GB, N);
hipMemcpy(B, GB, N * sizeof(float), hipMemcpyDeviceToHost);
float sum = 0;
for(int i = 0; i < N; i++){
sum += B[i];
}
hipFree(A);
printf("from cuda");
return (int) sum;
} | .text
.file "foo.hip"
.globl get_global # -- Begin function get_global
.p2align 4, 0x90
.type get_global,@function
get_global: # @get_global
.cfi_startproc
# %bb.0:
movl global_i(%rip), %eax
retq
.Lfunc_end0:
.size get_global, .Lfunc_end0-get_global
.cfi_endproc
# -- End function
.globl array_trans_i # -- Begin function array_trans_i
.p2align 4, 0x90
.type array_trans_i,@function
array_trans_i: # @array_trans_i
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
shll (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end1:
.size array_trans_i, .Lfunc_end1-array_trans_i
.cfi_endproc
# -- End function
.globl array_trans_l # -- Begin function array_trans_l
.p2align 4, 0x90
.type array_trans_l,@function
array_trans_l: # @array_trans_l
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq (%rbx,%r15,8), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
shlq (%rbx,%r15,8)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end2:
.size array_trans_l, .Lfunc_end2-array_trans_l
.cfi_endproc
# -- End function
.globl array_trans_f # -- Begin function array_trans_f
.p2align 4, 0x90
.type array_trans_f,@function
array_trans_f: # @array_trans_f
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %edi
movb $1, %al
callq printf
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss %xmm0, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB3_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB3_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end3:
.size array_trans_f, .Lfunc_end3-array_trans_f
.cfi_endproc
# -- End function
.globl set_global # -- Begin function set_global
.p2align 4, 0x90
.type set_global,@function
set_global: # @set_global
.cfi_startproc
# %bb.0:
movl %edi, global_i(%rip)
movl $11, %eax
retq
.Lfunc_end4:
.size set_global, .Lfunc_end4-set_global
.cfi_endproc
# -- End function
.globl _Z18__device_stub__gpuPfS_i # -- Begin function _Z18__device_stub__gpuPfS_i
.p2align 4, 0x90
.type _Z18__device_stub__gpuPfS_i,@function
_Z18__device_stub__gpuPfS_i: # @_Z18__device_stub__gpuPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3gpuPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end5:
.size _Z18__device_stub__gpuPfS_i, .Lfunc_end5-_Z18__device_stub__gpuPfS_i
.cfi_endproc
# -- End function
.globl foo # -- Begin function foo
.p2align 4, 0x90
.type foo,@function
foo: # @foo
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movl %edi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB6_1: # =>This Inner Loop Header: Depth=1
leal (%rax,%rcx), %edx
xorps %xmm0, %xmm0
cvtsi2ss %edx, %xmm0
movss %xmm0, 128(%rsp,%rcx,4)
incq %rcx
cmpq $10, %rcx
jne .LBB6_1
# %bb.2:
leaq 24(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq 24(%rsp), %rdi
leaq 128(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 19(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_4
# %bb.3:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $10, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3gpuPfS_i, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_4:
movq 16(%rsp), %rsi
leaq 176(%rsp), %rdi
movl $40, %edx
movl $2, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB6_5: # =>This Inner Loop Header: Depth=1
addss 176(%rsp,%rax,4), %xmm0
incq %rax
cmpq $10, %rax
jne .LBB6_5
# %bb.6:
leaq 128(%rsp), %rdi
movss %xmm0, 8(%rsp) # 4-byte Spill
callq hipFree
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
cvttss2si 8(%rsp), %eax # 4-byte Folded Reload
addq $216, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size foo, .Lfunc_end6-foo
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3gpuPfS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type global_i,@object # @global_i
.data
.globl global_i
.p2align 2, 0x0
global_i:
.long 2 # 0x2
.size global_i, 4
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d\n"
.size .L.str, 4
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%ld\n"
.size .L.str.1, 5
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%.1f\n"
.size .L.str.2, 6
.type _Z3gpuPfS_i,@object # @_Z3gpuPfS_i
.section .rodata,"a",@progbits
.globl _Z3gpuPfS_i
.p2align 3, 0x0
_Z3gpuPfS_i:
.quad _Z18__device_stub__gpuPfS_i
.size _Z3gpuPfS_i, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "from cuda"
.size .L.str.3, 10
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3gpuPfS_i"
.size .L__unnamed_1, 12
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__gpuPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3gpuPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3gpuPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R4, R4, c[0x0][0x0], R3 ; /* 0x0000000004047a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */
/* 0x000fcc00078e0205 */
/*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */
/* 0x000fc800078e0205 */
/*00b0*/ FMUL R7, R2, R2 ; /* 0x0000000202077220 */
/* 0x004fca0000400000 */
/*00c0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */
/* 0x000fe2000c101904 */
/*00d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3gpuPfS_i
.globl _Z3gpuPfS_i
.p2align 8
.type _Z3gpuPfS_i,@function
_Z3gpuPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3gpuPfS_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3gpuPfS_i, .Lfunc_end0-_Z3gpuPfS_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3gpuPfS_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3gpuPfS_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014a8e4_00000000-6_foo.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2065:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2065:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl get_global
.type get_global, @function
get_global:
.LFB2057:
.cfi_startproc
endbr64
movl global_i(%rip), %eax
ret
.cfi_endproc
.LFE2057:
.size get_global, .-get_global
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.text
.globl array_trans_i
.type array_trans_i, @function
array_trans_i:
.LFB2058:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L9
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC0(%rip), %rbp
.L6:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
sall (%rbx)
addq $4, %rbx
cmpq %r12, %rbx
jne .L6
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2058:
.size array_trans_i, .-array_trans_i
.section .rodata.str1.1
.LC1:
.string "%ld\n"
.text
.globl array_trans_l
.type array_trans_l, @function
array_trans_l:
.LFB2059:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L17
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,8), %r12
leaq .LC1(%rip), %rbp
.L14:
movq (%rbx), %rdx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
salq (%rbx)
addq $8, %rbx
cmpq %r12, %rbx
jne .L14
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2059:
.size array_trans_l, .-array_trans_l
.section .rodata.str1.1
.LC2:
.string "%.1f\n"
.text
.globl array_trans_f
.type array_trans_f, @function
array_trans_f:
.LFB2060:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L25
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r12
leaq .LC2(%rip), %rbp
.L22:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %rbp, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movss (%rbx), %xmm0
addss %xmm0, %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r12, %rbx
jne .L22
movl $0, %eax
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
movl $0, %eax
ret
.cfi_endproc
.LFE2060:
.size array_trans_f, .-array_trans_f
.globl set_global
.type set_global, @function
set_global:
.LFB2061:
.cfi_startproc
endbr64
movl %edi, global_i(%rip)
movl $11, %eax
ret
.cfi_endproc
.LFE2061:
.size set_global, .-set_global
.globl _Z25__device_stub__Z3gpuPfS_iPfS_i
.type _Z25__device_stub__Z3gpuPfS_iPfS_i, @function
_Z25__device_stub__Z3gpuPfS_iPfS_i:
.LFB2087:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L33
.L29:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L34
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3gpuPfS_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L29
.L34:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2087:
.size _Z25__device_stub__Z3gpuPfS_iPfS_i, .-_Z25__device_stub__Z3gpuPfS_iPfS_i
.globl _Z3gpuPfS_i
.type _Z3gpuPfS_i, @function
_Z3gpuPfS_i:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z25__device_stub__Z3gpuPfS_iPfS_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _Z3gpuPfS_i, .-_Z3gpuPfS_i
.section .rodata.str1.1
.LC4:
.string "from cuda"
.text
.globl foo
.type foo, @function
foo:
.LFB2062:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $160, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 64(%rsp), %rax
leaq 104(%rsp), %rdx
.L38:
pxor %xmm0, %xmm0
cvtsi2ssl %edi, %xmm0
movss %xmm0, (%rax)
addl $1, %edi
addq $4, %rax
cmpq %rdx, %rax
jne .L38
leaq 24(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 64(%rsp), %rsi
movl $1, %ecx
movl $40, %edx
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $20, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 52(%rsp), %rdx
movl $1, %ecx
movq 40(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L45
.L39:
leaq 112(%rsp), %rbx
movl $2, %ecx
movl $40, %edx
movq 32(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq %rbx, %rax
leaq 152(%rsp), %rdx
movl $0x00000000, 12(%rsp)
.L40:
movss 12(%rsp), %xmm1
addss (%rax), %xmm1
movss %xmm1, 12(%rsp)
addq $4, %rax
cmpq %rdx, %rax
jne .L40
leaq 64(%rsp), %rdi
call cudaFree@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cvttss2sil 12(%rsp), %eax
movq 152(%rsp), %rdx
subq %fs:40, %rdx
jne .L46
addq $160, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movl $10, %edx
movq 32(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z25__device_stub__Z3gpuPfS_iPfS_i
jmp .L39
.L46:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2062:
.size foo, .-foo
.section .rodata.str1.1
.LC5:
.string "_Z3gpuPfS_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z3gpuPfS_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2090:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl global_i
.data
.align 4
.type global_i, @object
.size global_i, 4
global_i:
.long 2
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "foo.hip"
.globl get_global # -- Begin function get_global
.p2align 4, 0x90
.type get_global,@function
get_global: # @get_global
.cfi_startproc
# %bb.0:
movl global_i(%rip), %eax
retq
.Lfunc_end0:
.size get_global, .Lfunc_end0-get_global
.cfi_endproc
# -- End function
.globl array_trans_i # -- Begin function array_trans_i
.p2align 4, 0x90
.type array_trans_i,@function
array_trans_i: # @array_trans_i
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB1_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r15,4), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
shll (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB1_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB1_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end1:
.size array_trans_i, .Lfunc_end1-array_trans_i
.cfi_endproc
# -- End function
.globl array_trans_l # -- Begin function array_trans_l
.p2align 4, 0x90
.type array_trans_l,@function
array_trans_l: # @array_trans_l
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq (%rbx,%r15,8), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
shlq (%rbx,%r15,8)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end2:
.size array_trans_l, .Lfunc_end2-array_trans_l
.cfi_endproc
# -- End function
.globl array_trans_f # -- Begin function array_trans_f
.p2align 4, 0x90
.type array_trans_f,@function
array_trans_f: # @array_trans_f
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB3_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %edi
movb $1, %al
callq printf
movss (%rbx,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss %xmm0, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB3_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB3_4: # %._crit_edge
xorl %eax, %eax
retq
.Lfunc_end3:
.size array_trans_f, .Lfunc_end3-array_trans_f
.cfi_endproc
# -- End function
.globl set_global # -- Begin function set_global
.p2align 4, 0x90
.type set_global,@function
set_global: # @set_global
.cfi_startproc
# %bb.0:
movl %edi, global_i(%rip)
movl $11, %eax
retq
.Lfunc_end4:
.size set_global, .Lfunc_end4-set_global
.cfi_endproc
# -- End function
.globl _Z18__device_stub__gpuPfS_i # -- Begin function _Z18__device_stub__gpuPfS_i
.p2align 4, 0x90
.type _Z18__device_stub__gpuPfS_i,@function
_Z18__device_stub__gpuPfS_i: # @_Z18__device_stub__gpuPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z3gpuPfS_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end5:
.size _Z18__device_stub__gpuPfS_i, .Lfunc_end5-_Z18__device_stub__gpuPfS_i
.cfi_endproc
# -- End function
.globl foo # -- Begin function foo
.p2align 4, 0x90
.type foo,@function
foo: # @foo
.cfi_startproc
# %bb.0:
subq $216, %rsp
.cfi_def_cfa_offset 224
movl %edi, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB6_1: # =>This Inner Loop Header: Depth=1
leal (%rax,%rcx), %edx
xorps %xmm0, %xmm0
cvtsi2ss %edx, %xmm0
movss %xmm0, 128(%rsp,%rcx,4)
incq %rcx
cmpq $10, %rcx
jne .LBB6_1
# %bb.2:
leaq 24(%rsp), %rdi
movl $40, %esi
callq hipMalloc
leaq 16(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq 24(%rsp), %rdi
leaq 128(%rsp), %rsi
movl $40, %edx
movl $1, %ecx
callq hipMemcpy
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 19(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB6_4
# %bb.3:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl $10, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3gpuPfS_i, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB6_4:
movq 16(%rsp), %rsi
leaq 176(%rsp), %rdi
movl $40, %edx
movl $2, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB6_5: # =>This Inner Loop Header: Depth=1
addss 176(%rsp,%rax,4), %xmm0
incq %rax
cmpq $10, %rax
jne .LBB6_5
# %bb.6:
leaq 128(%rsp), %rdi
movss %xmm0, 8(%rsp) # 4-byte Spill
callq hipFree
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
cvttss2si 8(%rsp), %eax # 4-byte Folded Reload
addq $216, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size foo, .Lfunc_end6-foo
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB7_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB7_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3gpuPfS_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end7:
.size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB8_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB8_2:
retq
.Lfunc_end8:
.size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor
.cfi_endproc
# -- End function
.type global_i,@object # @global_i
.data
.globl global_i
.p2align 2, 0x0
global_i:
.long 2 # 0x2
.size global_i, 4
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d\n"
.size .L.str, 4
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%ld\n"
.size .L.str.1, 5
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%.1f\n"
.size .L.str.2, 6
.type _Z3gpuPfS_i,@object # @_Z3gpuPfS_i
.section .rodata,"a",@progbits
.globl _Z3gpuPfS_i
.p2align 3, 0x0
_Z3gpuPfS_i:
.quad _Z18__device_stub__gpuPfS_i
.size _Z3gpuPfS_i, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "from cuda"
.size .L.str.3, 10
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3gpuPfS_i"
.size .L__unnamed_1, 12
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__gpuPfS_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3gpuPfS_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#define ErrorCheck(ans) { CheckFun((ans), __FILE__, __LINE__); }
inline void CheckFun(cudaError_t code, const char *file, int line) {
if (code != cudaSuccess) {
fprintf(stderr, "ERROR: %s %s %d\n", cudaGetErrorString(code), file, line);
exit(0);
}
}
__constant__ double3 centerClusters[32];
__device__ inline double calculateDistance(uchar4 &A, double3 &B) {
return sqrt((double)(A.x - B.x)*(A.x - B.x) + (A.y - B.y)*(A.y - B.y) + (A.z - B.z)*(A.z - B.z));
}
__global__ void KMeans(uchar4 * __restrict__ img, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint32_t idx = threadIdx.x + blockIdx.x * blockDim.x;
uint32_t idy = threadIdx.y + blockIdx.y * blockDim.y;
uint32_t offsetx = blockDim.x * gridDim.x;
uint32_t offsety = blockDim.y * gridDim.y;
for (uint32_t i = idx; i < w; i += offsetx) {
for (uint32_t j = idy; j < h; j += offsety) {
double distanceMin = calculateDistance(img[j * w + i], centerClusters[0]);
uint32_t clusterNumber = 0;
for (uint32_t k = 1; k < nc; ++k) {
double distanceTmp = calculateDistance(img[j * w + i], centerClusters[k]);
if (distanceTmp < distanceMin) {
distanceMin = distanceTmp;
clusterNumber = k;
}
}
img[j * w + i].w = clusterNumber;
}
}
}
__host__ bool updateClusters(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint64_t countElementOnCluster[32] = { 0 };
ulonglong3 sumElementOnCluster[32] = { make_ulonglong3(0, 0, 0) };
bool notEqual = false;
for (uint32_t i = 0; i < w*h; ++i) {
if (imgNew[i].w != img[i].w) notEqual = true;
countElementOnCluster[imgNew[i].w]++;
sumElementOnCluster[imgNew[i].w].x += imgNew[i].x;
sumElementOnCluster[imgNew[i].w].y += imgNew[i].y;
sumElementOnCluster[imgNew[i].w].z += imgNew[i].z;
}
for (uint32_t i = 0; i < nc; ++i) {
centerClustersHost[i].x = (double)sumElementOnCluster[i].x / (double)countElementOnCluster[i];
centerClustersHost[i].y = (double)sumElementOnCluster[i].y / (double)countElementOnCluster[i];
centerClustersHost[i].z = (double)sumElementOnCluster[i].z / (double)countElementOnCluster[i];
}
return notEqual;
}
__host__ void KMeans(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uchar4 *imgDev;
ErrorCheck(cudaMalloc(&imgDev, sizeof(uchar4) * w * h));
ErrorCheck(cudaMemcpy(imgDev, img, sizeof(uchar4) * w * h, cudaMemcpyHostToDevice));
bool flag = true;
while (flag) {
ErrorCheck(cudaMemcpyToSymbol(centerClusters, centerClustersHost, sizeof(double3) * 32));
KMeans <<<dim3(32,32), dim3(32, 32)>>> (imgDev, w, h, nc);
ErrorCheck(cudaGetLastError());
ErrorCheck(cudaMemcpy(imgNew, imgDev, sizeof(uchar4) * w * h, cudaMemcpyDeviceToHost));
flag = updateClusters(img, imgNew, centerClustersHost, w, h, nc);
uchar4 * imgTmp = imgNew;
imgNew = img;
img = imgTmp;
}
ErrorCheck(cudaFree(imgDev));
}
int main() {
char inputFileName[256], outFileName[256];
uint32_t w, h, nc;
double3 centerClustersHost[32];
scanf("%s", inputFileName);
scanf("%s", outFileName);
FILE *hFile = fopen(inputFileName, "rb");
fread(&w, sizeof(uint32_t), 1, hFile);
fread(&h, sizeof(uint32_t), 1, hFile);
uchar4 *img = (uchar4*)malloc(sizeof(uchar4) * h * w);
uchar4 *imgNew = (uchar4*)malloc(sizeof(uchar4) * w * h);
fread(img, sizeof(uchar4), h * w, hFile);
fclose(hFile);
scanf("%" SCNu32, &nc);
for (uint32_t i = 0; i < nc; ++i) {
int x, y;
scanf("%" SCNu32 "%" SCNu32, &x, &y);
centerClustersHost[i].x = img[w * y + x].x;
centerClustersHost[i].y = img[w * y + x].y;
centerClustersHost[i].z = img[w * y + x].z;
}
KMeans(img,imgNew, centerClustersHost, w, h, nc);
hFile = fopen(outFileName, "wb");
fwrite(&w, sizeof(uint32_t), 1, hFile);
fwrite(&h, sizeof(uint32_t), 1, hFile);
fwrite(img, sizeof(uchar4), w * h, hFile);
fclose(hFile);
free(imgNew);
free(img);
return 0;
} | .file "tmpxft_000c5021_00000000-6_lab3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z14updateClustersP6uchar4S0_P7double3jjj
.type _Z14updateClustersP6uchar4S0_P7double3jjj, @function
_Z14updateClustersP6uchar4S0_P7double3jjj:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1040, %rsp
.cfi_def_cfa_offset 1072
movq %rdi, %r11
movq %rdx, %r10
movl %ecx, %edx
movq %fs:40, %rax
movq %rax, 1032(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $32, %ecx
rep stosq
leaq 256(%rsp), %rdi
movl $96, %ecx
rep stosq
imull %edx, %r8d
testl %r8d, %r8d
je .L18
movq %rsi, %rdx
leaq 3(%r11), %rdi
movl %r8d, %r8d
leaq (%rsi,%r8,4), %r11
movl $0, %esi
movl $1, %r8d
.L6:
movzbl 3(%rdx), %eax
cmpb (%rdi), %al
cmovne %r8d, %esi
movzbl %al, %eax
addq $1, (%rsp,%rax,8)
leaq (%rax,%rax), %rbx
leaq (%rbx,%rax), %rbp
movzbl (%rdx), %ecx
addq 256(%rsp,%rbp,8), %rcx
movq %rcx, 256(%rsp,%rbp,8)
movzbl 1(%rdx), %ecx
addq 264(%rsp,%rbp,8), %rcx
movq %rcx, 264(%rsp,%rbp,8)
movzbl 2(%rdx), %ecx
addq 272(%rsp,%rbp,8), %rcx
movq %rcx, 272(%rsp,%rbp,8)
addq $4, %rdx
addq $4, %rdi
cmpq %r11, %rdx
jne .L6
.L4:
testl %r9d, %r9d
je .L3
leaq 256(%rsp), %r8
movq %rsp, %rdx
movq %r10, %rdi
movl %r9d, %r9d
leaq (%rdx,%r9,8), %r9
jmp .L16
.L18:
movl $0, %esi
jmp .L4
.L8:
movq %rax, %rcx
shrq %rcx
andl $1, %eax
orq %rax, %rcx
pxor %xmm1, %xmm1
cvtsi2sdq %rcx, %xmm1
addsd %xmm1, %xmm1
jmp .L9
.L10:
movq %rax, %r11
shrq %r11
andl $1, %eax
orq %rax, %r11
pxor %xmm0, %xmm0
cvtsi2sdq %r11, %xmm0
addsd %xmm0, %xmm0
jmp .L11
.L12:
movq %rax, %r11
shrq %r11
andl $1, %eax
orq %rax, %r11
pxor %xmm0, %xmm0
cvtsi2sdq %r11, %xmm0
addsd %xmm0, %xmm0
jmp .L13
.L14:
movq %rax, %r10
shrq %r10
andl $1, %eax
orq %rax, %r10
pxor %xmm0, %xmm0
cvtsi2sdq %r10, %xmm0
addsd %xmm0, %xmm0
.L15:
divsd %xmm1, %xmm0
movsd %xmm0, 16(%rcx)
addq $24, %r8
addq $8, %rdx
addq $24, %rdi
cmpq %r9, %rdx
je .L3
.L16:
movq %r8, %r10
movq (%rdx), %rax
testq %rax, %rax
js .L8
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
.L9:
movq %rdi, %rcx
movq (%r10), %rax
testq %rax, %rax
js .L10
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L11:
divsd %xmm1, %xmm0
movsd %xmm0, (%rcx)
movq 8(%r10), %rax
testq %rax, %rax
js .L12
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L13:
divsd %xmm1, %xmm0
movsd %xmm0, 8(%rcx)
movq 16(%r10), %rax
testq %rax, %rax
js .L14
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L15
.L3:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L23
movl %esi, %eax
addq $1040, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z14updateClustersP6uchar4S0_P7double3jjj, .-_Z14updateClustersP6uchar4S0_P7double3jjj
.globl _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
.type _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj, @function
_Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj:
.LFB2086:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %esi, 12(%rsp)
movl %edx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movq %rdi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6KMeansP6uchar4jjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj, .-_Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
.globl _Z6KMeansP6uchar4jjj
.type _Z6KMeansP6uchar4jjj, @function
_Z6KMeansP6uchar4jjj:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z6KMeansP6uchar4jjj, .-_Z6KMeansP6uchar4jjj
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/MrCoppelius/CUDA/master/PGP3/PGP3/lab3.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "ERROR: %s %s %d\n"
.text
.globl _Z6KMeansP6uchar4S0_P7double3jjj
.type _Z6KMeansP6uchar4S0_P7double3jjj, @function
_Z6KMeansP6uchar4S0_P7double3jjj:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r12
movq %rsi, %r13
movq %rdx, %r14
movl %ecx, 8(%rsp)
movl %r8d, %ebp
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %ebx
movl %r8d, %eax
imulq %rax, %rbx
salq $2, %rbx
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L44
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
leaq _ZL14centerClusters(%rip), %r15
testl %eax, %eax
jne .L45
.L34:
movl $1, %r8d
movl $0, %ecx
movl $768, %edx
movq %r14, %rsi
movq %r15, %rdi
call cudaMemcpyToSymbol@PLT
testl %eax, %eax
jne .L46
movl $32, 44(%rsp)
movl $32, 48(%rsp)
movl $32, 32(%rsp)
movl $32, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L47
.L36:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L48
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L49
movl 12(%rsp), %r9d
movl %ebp, %r8d
movl 8(%rsp), %ecx
movq %r14, %rdx
movq %r13, %rsi
movq %r12, %rdi
call _Z14updateClustersP6uchar4S0_P7double3jjj
movq %r13, %rdx
movq %r12, %r13
testb %al, %al
je .L50
movq %rdx, %r12
jmp .L34
.L44:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $69, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L45:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $70, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L46:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $73, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L47:
movl 12(%rsp), %ecx
movl %ebp, %edx
movl 8(%rsp), %esi
movq 24(%rsp), %rdi
call _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
jmp .L36
.L48:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $75, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L49:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $76, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L50:
movq 24(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L51
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L52
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L51:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $82, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L52:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z6KMeansP6uchar4S0_P7double3jjj, .-_Z6KMeansP6uchar4S0_P7double3jjj
.section .rodata.str1.1
.LC2:
.string "%s"
.LC3:
.string "rb"
.LC4:
.string "%u"
.LC5:
.string "%u%u"
.LC6:
.string "wb"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1328, %rsp
.cfi_def_cfa_offset 1376
movq %fs:40, %rax
movq %rax, 1320(%rsp)
xorl %eax, %eax
leaq 800(%rsp), %rbx
movq %rbx, %rsi
leaq .LC2(%rip), %rbp
movq %rbp, %rdi
call __isoc23_scanf@PLT
leaq 1056(%rsp), %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call fopen@PLT
movq %rax, %rbx
leaq 12(%rsp), %rdi
movq %rax, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 16(%rsp), %rdi
movq %rbx, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
movl 16(%rsp), %ebp
movl 12(%rsp), %eax
imulq %rax, %rbp
leaq 0(,%rbp,4), %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %r14
movl %ebp, %ecx
movq %rbx, %r8
movl $4, %edx
movq %r13, %rsi
movq %r12, %rdi
call __fread_chk@PLT
movq %rbx, %rdi
call fclose@PLT
leaq 20(%rsp), %rsi
leaq .LC4(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 20(%rsp), %r9d
testl %r9d, %r9d
je .L54
leaq 32(%rsp), %rbx
movl $0, %ebp
leaq .LC5(%rip), %r13
.L55:
leaq 28(%rsp), %rdx
leaq 24(%rsp), %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 12(%rsp), %eax
imull 28(%rsp), %eax
addl 24(%rsp), %eax
leaq (%r12,%rax,4), %rax
movzbl (%rax), %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, (%rbx)
movzbl 1(%rax), %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, 8(%rbx)
movzbl 2(%rax), %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, 16(%rbx)
addl $1, %ebp
movl 20(%rsp), %r9d
addq $24, %rbx
cmpl %r9d, %ebp
jb .L55
.L54:
leaq 32(%rsp), %rdx
movl 16(%rsp), %r8d
movl 12(%rsp), %ecx
movq %r14, %rsi
movq %r12, %rdi
call _Z6KMeansP6uchar4S0_P7double3jjj
leaq 1056(%rsp), %rdi
leaq .LC6(%rip), %rsi
call fopen@PLT
movq %rax, %rbx
leaq 12(%rsp), %rdi
movq %rax, %rcx
movl $1, %edx
movl $4, %esi
call fwrite@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rcx
movl $1, %edx
movl $4, %esi
call fwrite@PLT
movl 12(%rsp), %edx
imull 16(%rsp), %edx
movq %rbx, %rcx
movl $4, %esi
movq %r12, %rdi
call fwrite@PLT
movq %rbx, %rdi
call fclose@PLT
movq %r14, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 1320(%rsp), %rax
subq %fs:40, %rax
jne .L59
movl $0, %eax
addq $1328, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z6KMeansP6uchar4jjj"
.LC8:
.string "centerClusters"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z6KMeansP6uchar4jjj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $768, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL14centerClusters(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL14centerClusters
.comm _ZL14centerClusters,768,32
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#define ErrorCheck(ans) { CheckFun((ans), __FILE__, __LINE__); }
inline void CheckFun(cudaError_t code, const char *file, int line) {
if (code != cudaSuccess) {
fprintf(stderr, "ERROR: %s %s %d\n", cudaGetErrorString(code), file, line);
exit(0);
}
}
__constant__ double3 centerClusters[32];
__device__ inline double calculateDistance(uchar4 &A, double3 &B) {
return sqrt((double)(A.x - B.x)*(A.x - B.x) + (A.y - B.y)*(A.y - B.y) + (A.z - B.z)*(A.z - B.z));
}
__global__ void KMeans(uchar4 * __restrict__ img, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint32_t idx = threadIdx.x + blockIdx.x * blockDim.x;
uint32_t idy = threadIdx.y + blockIdx.y * blockDim.y;
uint32_t offsetx = blockDim.x * gridDim.x;
uint32_t offsety = blockDim.y * gridDim.y;
for (uint32_t i = idx; i < w; i += offsetx) {
for (uint32_t j = idy; j < h; j += offsety) {
double distanceMin = calculateDistance(img[j * w + i], centerClusters[0]);
uint32_t clusterNumber = 0;
for (uint32_t k = 1; k < nc; ++k) {
double distanceTmp = calculateDistance(img[j * w + i], centerClusters[k]);
if (distanceTmp < distanceMin) {
distanceMin = distanceTmp;
clusterNumber = k;
}
}
img[j * w + i].w = clusterNumber;
}
}
}
__host__ bool updateClusters(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint64_t countElementOnCluster[32] = { 0 };
ulonglong3 sumElementOnCluster[32] = { make_ulonglong3(0, 0, 0) };
bool notEqual = false;
for (uint32_t i = 0; i < w*h; ++i) {
if (imgNew[i].w != img[i].w) notEqual = true;
countElementOnCluster[imgNew[i].w]++;
sumElementOnCluster[imgNew[i].w].x += imgNew[i].x;
sumElementOnCluster[imgNew[i].w].y += imgNew[i].y;
sumElementOnCluster[imgNew[i].w].z += imgNew[i].z;
}
for (uint32_t i = 0; i < nc; ++i) {
centerClustersHost[i].x = (double)sumElementOnCluster[i].x / (double)countElementOnCluster[i];
centerClustersHost[i].y = (double)sumElementOnCluster[i].y / (double)countElementOnCluster[i];
centerClustersHost[i].z = (double)sumElementOnCluster[i].z / (double)countElementOnCluster[i];
}
return notEqual;
}
__host__ void KMeans(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uchar4 *imgDev;
ErrorCheck(cudaMalloc(&imgDev, sizeof(uchar4) * w * h));
ErrorCheck(cudaMemcpy(imgDev, img, sizeof(uchar4) * w * h, cudaMemcpyHostToDevice));
bool flag = true;
while (flag) {
ErrorCheck(cudaMemcpyToSymbol(centerClusters, centerClustersHost, sizeof(double3) * 32));
KMeans <<<dim3(32,32), dim3(32, 32)>>> (imgDev, w, h, nc);
ErrorCheck(cudaGetLastError());
ErrorCheck(cudaMemcpy(imgNew, imgDev, sizeof(uchar4) * w * h, cudaMemcpyDeviceToHost));
flag = updateClusters(img, imgNew, centerClustersHost, w, h, nc);
uchar4 * imgTmp = imgNew;
imgNew = img;
img = imgTmp;
}
ErrorCheck(cudaFree(imgDev));
}
int main() {
char inputFileName[256], outFileName[256];
uint32_t w, h, nc;
double3 centerClustersHost[32];
scanf("%s", inputFileName);
scanf("%s", outFileName);
FILE *hFile = fopen(inputFileName, "rb");
fread(&w, sizeof(uint32_t), 1, hFile);
fread(&h, sizeof(uint32_t), 1, hFile);
uchar4 *img = (uchar4*)malloc(sizeof(uchar4) * h * w);
uchar4 *imgNew = (uchar4*)malloc(sizeof(uchar4) * w * h);
fread(img, sizeof(uchar4), h * w, hFile);
fclose(hFile);
scanf("%" SCNu32, &nc);
for (uint32_t i = 0; i < nc; ++i) {
int x, y;
scanf("%" SCNu32 "%" SCNu32, &x, &y);
centerClustersHost[i].x = img[w * y + x].x;
centerClustersHost[i].y = img[w * y + x].y;
centerClustersHost[i].z = img[w * y + x].z;
}
KMeans(img,imgNew, centerClustersHost, w, h, nc);
hFile = fopen(outFileName, "wb");
fwrite(&w, sizeof(uint32_t), 1, hFile);
fwrite(&h, sizeof(uint32_t), 1, hFile);
fwrite(img, sizeof(uchar4), w * h, hFile);
fclose(hFile);
free(imgNew);
free(img);
return 0;
} | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#define ErrorCheck(ans) { CheckFun((ans), __FILE__, __LINE__); }
inline void CheckFun(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "ERROR: %s %s %d\n", hipGetErrorString(code), file, line);
exit(0);
}
}
__constant__ double3 centerClusters[32];
__device__ inline double calculateDistance(uchar4 &A, double3 &B) {
return sqrt((double)(A.x - B.x)*(A.x - B.x) + (A.y - B.y)*(A.y - B.y) + (A.z - B.z)*(A.z - B.z));
}
__global__ void KMeans(uchar4 * __restrict__ img, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint32_t idx = threadIdx.x + blockIdx.x * blockDim.x;
uint32_t idy = threadIdx.y + blockIdx.y * blockDim.y;
uint32_t offsetx = blockDim.x * gridDim.x;
uint32_t offsety = blockDim.y * gridDim.y;
for (uint32_t i = idx; i < w; i += offsetx) {
for (uint32_t j = idy; j < h; j += offsety) {
double distanceMin = calculateDistance(img[j * w + i], centerClusters[0]);
uint32_t clusterNumber = 0;
for (uint32_t k = 1; k < nc; ++k) {
double distanceTmp = calculateDistance(img[j * w + i], centerClusters[k]);
if (distanceTmp < distanceMin) {
distanceMin = distanceTmp;
clusterNumber = k;
}
}
img[j * w + i].w = clusterNumber;
}
}
}
__host__ bool updateClusters(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint64_t countElementOnCluster[32] = { 0 };
ulonglong3 sumElementOnCluster[32] = { make_ulonglong3(0, 0, 0) };
bool notEqual = false;
for (uint32_t i = 0; i < w*h; ++i) {
if (imgNew[i].w != img[i].w) notEqual = true;
countElementOnCluster[imgNew[i].w]++;
sumElementOnCluster[imgNew[i].w].x += imgNew[i].x;
sumElementOnCluster[imgNew[i].w].y += imgNew[i].y;
sumElementOnCluster[imgNew[i].w].z += imgNew[i].z;
}
for (uint32_t i = 0; i < nc; ++i) {
centerClustersHost[i].x = (double)sumElementOnCluster[i].x / (double)countElementOnCluster[i];
centerClustersHost[i].y = (double)sumElementOnCluster[i].y / (double)countElementOnCluster[i];
centerClustersHost[i].z = (double)sumElementOnCluster[i].z / (double)countElementOnCluster[i];
}
return notEqual;
}
__host__ void KMeans(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uchar4 *imgDev;
ErrorCheck(hipMalloc(&imgDev, sizeof(uchar4) * w * h));
ErrorCheck(hipMemcpy(imgDev, img, sizeof(uchar4) * w * h, hipMemcpyHostToDevice));
bool flag = true;
while (flag) {
ErrorCheck(hipMemcpyToSymbol(HIP_SYMBOL(centerClusters), centerClustersHost, sizeof(double3) * 32));
KMeans <<<dim3(32,32), dim3(32, 32)>>> (imgDev, w, h, nc);
ErrorCheck(hipGetLastError());
ErrorCheck(hipMemcpy(imgNew, imgDev, sizeof(uchar4) * w * h, hipMemcpyDeviceToHost));
flag = updateClusters(img, imgNew, centerClustersHost, w, h, nc);
uchar4 * imgTmp = imgNew;
imgNew = img;
img = imgTmp;
}
ErrorCheck(hipFree(imgDev));
}
int main() {
char inputFileName[256], outFileName[256];
uint32_t w, h, nc;
double3 centerClustersHost[32];
scanf("%s", inputFileName);
scanf("%s", outFileName);
FILE *hFile = fopen(inputFileName, "rb");
fread(&w, sizeof(uint32_t), 1, hFile);
fread(&h, sizeof(uint32_t), 1, hFile);
uchar4 *img = (uchar4*)malloc(sizeof(uchar4) * h * w);
uchar4 *imgNew = (uchar4*)malloc(sizeof(uchar4) * w * h);
fread(img, sizeof(uchar4), h * w, hFile);
fclose(hFile);
scanf("%" SCNu32, &nc);
for (uint32_t i = 0; i < nc; ++i) {
int x, y;
scanf("%" SCNu32 "%" SCNu32, &x, &y);
centerClustersHost[i].x = img[w * y + x].x;
centerClustersHost[i].y = img[w * y + x].y;
centerClustersHost[i].z = img[w * y + x].z;
}
KMeans(img,imgNew, centerClustersHost, w, h, nc);
hFile = fopen(outFileName, "wb");
fwrite(&w, sizeof(uint32_t), 1, hFile);
fwrite(&h, sizeof(uint32_t), 1, hFile);
fwrite(img, sizeof(uchar4), w * h, hFile);
fclose(hFile);
free(imgNew);
free(img);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#define ErrorCheck(ans) { CheckFun((ans), __FILE__, __LINE__); }
inline void CheckFun(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "ERROR: %s %s %d\n", hipGetErrorString(code), file, line);
exit(0);
}
}
__constant__ double3 centerClusters[32];
__device__ inline double calculateDistance(uchar4 &A, double3 &B) {
return sqrt((double)(A.x - B.x)*(A.x - B.x) + (A.y - B.y)*(A.y - B.y) + (A.z - B.z)*(A.z - B.z));
}
__global__ void KMeans(uchar4 * __restrict__ img, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint32_t idx = threadIdx.x + blockIdx.x * blockDim.x;
uint32_t idy = threadIdx.y + blockIdx.y * blockDim.y;
uint32_t offsetx = blockDim.x * gridDim.x;
uint32_t offsety = blockDim.y * gridDim.y;
for (uint32_t i = idx; i < w; i += offsetx) {
for (uint32_t j = idy; j < h; j += offsety) {
double distanceMin = calculateDistance(img[j * w + i], centerClusters[0]);
uint32_t clusterNumber = 0;
for (uint32_t k = 1; k < nc; ++k) {
double distanceTmp = calculateDistance(img[j * w + i], centerClusters[k]);
if (distanceTmp < distanceMin) {
distanceMin = distanceTmp;
clusterNumber = k;
}
}
img[j * w + i].w = clusterNumber;
}
}
}
__host__ bool updateClusters(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint64_t countElementOnCluster[32] = { 0 };
ulonglong3 sumElementOnCluster[32] = { make_ulonglong3(0, 0, 0) };
bool notEqual = false;
for (uint32_t i = 0; i < w*h; ++i) {
if (imgNew[i].w != img[i].w) notEqual = true;
countElementOnCluster[imgNew[i].w]++;
sumElementOnCluster[imgNew[i].w].x += imgNew[i].x;
sumElementOnCluster[imgNew[i].w].y += imgNew[i].y;
sumElementOnCluster[imgNew[i].w].z += imgNew[i].z;
}
for (uint32_t i = 0; i < nc; ++i) {
centerClustersHost[i].x = (double)sumElementOnCluster[i].x / (double)countElementOnCluster[i];
centerClustersHost[i].y = (double)sumElementOnCluster[i].y / (double)countElementOnCluster[i];
centerClustersHost[i].z = (double)sumElementOnCluster[i].z / (double)countElementOnCluster[i];
}
return notEqual;
}
__host__ void KMeans(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uchar4 *imgDev;
ErrorCheck(hipMalloc(&imgDev, sizeof(uchar4) * w * h));
ErrorCheck(hipMemcpy(imgDev, img, sizeof(uchar4) * w * h, hipMemcpyHostToDevice));
bool flag = true;
while (flag) {
ErrorCheck(hipMemcpyToSymbol(HIP_SYMBOL(centerClusters), centerClustersHost, sizeof(double3) * 32));
KMeans <<<dim3(32,32), dim3(32, 32)>>> (imgDev, w, h, nc);
ErrorCheck(hipGetLastError());
ErrorCheck(hipMemcpy(imgNew, imgDev, sizeof(uchar4) * w * h, hipMemcpyDeviceToHost));
flag = updateClusters(img, imgNew, centerClustersHost, w, h, nc);
uchar4 * imgTmp = imgNew;
imgNew = img;
img = imgTmp;
}
ErrorCheck(hipFree(imgDev));
}
int main() {
char inputFileName[256], outFileName[256];
uint32_t w, h, nc;
double3 centerClustersHost[32];
scanf("%s", inputFileName);
scanf("%s", outFileName);
FILE *hFile = fopen(inputFileName, "rb");
fread(&w, sizeof(uint32_t), 1, hFile);
fread(&h, sizeof(uint32_t), 1, hFile);
uchar4 *img = (uchar4*)malloc(sizeof(uchar4) * h * w);
uchar4 *imgNew = (uchar4*)malloc(sizeof(uchar4) * w * h);
fread(img, sizeof(uchar4), h * w, hFile);
fclose(hFile);
scanf("%" SCNu32, &nc);
for (uint32_t i = 0; i < nc; ++i) {
int x, y;
scanf("%" SCNu32 "%" SCNu32, &x, &y);
centerClustersHost[i].x = img[w * y + x].x;
centerClustersHost[i].y = img[w * y + x].y;
centerClustersHost[i].z = img[w * y + x].z;
}
KMeans(img,imgNew, centerClustersHost, w, h, nc);
hFile = fopen(outFileName, "wb");
fwrite(&w, sizeof(uint32_t), 1, hFile);
fwrite(&h, sizeof(uint32_t), 1, hFile);
fwrite(img, sizeof(uchar4), w * h, hFile);
fclose(hFile);
free(imgNew);
free(img);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.globl _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.p2align 8
.type _Z6KMeansP15HIP_vector_typeIhLj4EEjjj,@function
_Z6KMeansP15HIP_vector_typeIhLj4EEjjj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s16, s[0:1], 0x8
v_and_b32_e32 v3, 0x3ff, v0
s_add_u32 s4, s0, 24
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s12, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s16, v1
s_cbranch_execz .LBB0_9
s_load_b32 s13, s[4:5], 0xc
s_load_b64 s[2:3], s[0:1], 0xc
s_getpc_b64 s[6:7]
s_add_u32 s6, s6, centerClusters@rel32@lo+4
s_addc_u32 s7, s7, centerClusters@rel32@hi+12
s_getpc_b64 s[8:9]
s_add_u32 s8, s8, centerClusters@rel32@lo+12
s_addc_u32 s9, s9, centerClusters@rel32@hi+20
s_getpc_b64 s[10:11]
s_add_u32 s10, s10, centerClusters@rel32@lo+20
s_addc_u32 s11, s11, centerClusters@rel32@hi+28
s_load_b64 s[18:19], s[4:5], 0x0
s_load_b64 s[4:5], s[0:1], 0x0
s_clause 0x2
s_load_b64 s[6:7], s[6:7], 0x0
s_load_b64 s[8:9], s[8:9], 0x0
s_load_b64 s[10:11], s[10:11], 0x0
v_bfe_u32 v0, v0, 10, 10
s_mov_b32 s17, 0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s13, s13, 16
s_cmp_gt_u32 s3, 1
v_mad_u64_u32 v[2:3], null, s15, s13, v[0:1]
v_mov_b32_e32 v0, 0
s_cselect_b32 s1, -1, 0
s_mul_i32 s14, s18, s12
s_mul_i32 s15, s19, s13
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_u32_e64 s0, s2, v2
s_branch .LBB0_3
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s18
v_add_nc_u32_e32 v1, s14, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_u32_e32 vcc_lo, s16, v1
s_or_b32 s17, vcc_lo, s17
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execz .LBB0_9
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s18, s0
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v13, v2
s_mov_b32 s19, 0
s_branch .LBB0_6
.LBB0_5:
v_add_nc_u32_e32 v13, s15, v13
global_store_b8 v[3:4], v14, off offset:3
v_cmp_le_u32_e32 vcc_lo, s2, v13
s_or_b32 s19, vcc_lo, s19
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s19
s_cbranch_execz .LBB0_2
.LBB0_6:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, v13, s16, v[1:2]
v_mov_b32_e32 v4, v0
v_mov_b32_e32 v14, 0
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_5
s_clause 0x2
global_load_u8 v5, v[3:4], off offset:1
global_load_u8 v7, v[3:4], off
global_load_u8 v9, v[3:4], off offset:2
s_mov_b32 s20, 1
s_getpc_b64 s[12:13]
s_add_u32 s12, s12, centerClusters@rel32@lo+44
s_addc_u32 s13, s13, centerClusters@rel32@hi+52
s_waitcnt vmcnt(2)
v_cvt_f64_u32_e32 v[5:6], v5
s_waitcnt vmcnt(1)
v_cvt_f64_u32_e32 v[7:8], v7
s_waitcnt vmcnt(0)
v_cvt_f64_u32_e32 v[9:10], v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[11:12], v[5:6], -s[8:9]
v_add_f64 v[14:15], v[7:8], -s[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[16:17], v[9:10], -s[10:11]
v_mul_f64 v[11:12], v[11:12], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], v[14:15], v[14:15], v[11:12]
v_fma_f64 v[11:12], v[16:17], v[16:17], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[11:12]
v_cndmask_b32_e64 v14, 0, 1, vcc_lo
v_lshlrev_b32_e32 v14, 8, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[11:12], v[11:12], v14
v_rsq_f64_e32 v[14:15], v[11:12]
s_waitcnt_depctr 0xfff
v_mul_f64 v[16:17], v[11:12], v[14:15]
v_mul_f64 v[14:15], v[14:15], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[18:19], -v[14:15], v[16:17], 0.5
v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[18:19], -v[16:17], v[16:17], v[11:12]
v_fma_f64 v[16:17], v[18:19], v[14:15], v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[18:19], -v[16:17], v[16:17], v[11:12]
v_fma_f64 v[14:15], v[18:19], v[14:15], v[16:17]
v_cndmask_b32_e64 v16, 0, 0xffffff80, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[11:12], 0x260
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[14:15], v[14:15], v16
v_dual_cndmask_b32 v12, v15, v12 :: v_dual_cndmask_b32 v11, v14, v11
v_mov_b32_e32 v14, 0
.LBB0_8:
s_add_u32 s22, s12, -16
s_addc_u32 s23, s13, -1
s_add_u32 s24, s12, -8
s_addc_u32 s25, s13, -1
s_clause 0x2
s_load_b64 s[22:23], s[22:23], 0x0
s_load_b64 s[24:25], s[24:25], 0x0
s_load_b64 s[26:27], s[12:13], 0x0
s_waitcnt lgkmcnt(0)
v_add_f64 v[17:18], v[7:8], -s[22:23]
v_add_f64 v[15:16], v[5:6], -s[24:25]
v_add_f64 v[19:20], v[9:10], -s[26:27]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[15:16], v[15:16], v[15:16]
v_fma_f64 v[15:16], v[17:18], v[17:18], v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[15:16], v[19:20], v[19:20], v[15:16]
v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[15:16]
v_cndmask_b32_e64 v17, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v17, 8, v17
v_ldexp_f64 v[15:16], v[15:16], v17
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_rsq_f64_e32 v[17:18], v[15:16]
s_waitcnt_depctr 0xfff
v_mul_f64 v[19:20], v[15:16], v[17:18]
v_mul_f64 v[17:18], v[17:18], 0.5
v_fma_f64 v[21:22], -v[17:18], v[19:20], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
v_fma_f64 v[17:18], v[17:18], v[21:22], v[17:18]
v_fma_f64 v[21:22], -v[19:20], v[19:20], v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[19:20], v[21:22], v[17:18], v[19:20]
v_fma_f64 v[21:22], -v[19:20], v[19:20], v[15:16]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_fma_f64 v[17:18], v[21:22], v[17:18], v[19:20]
v_cndmask_b32_e64 v19, 0, 0xffffff80, vcc_lo
v_cmp_class_f64_e64 vcc_lo, v[15:16], 0x260
v_ldexp_f64 v[17:18], v[17:18], v19
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v16, v18, v16 :: v_dual_cndmask_b32 v15, v17, v15
v_cmp_lt_f64_e32 vcc_lo, v[15:16], v[11:12]
v_dual_cndmask_b32 v12, v12, v16 :: v_dual_cndmask_b32 v11, v11, v15
v_cndmask_b32_e64 v14, v14, s20, vcc_lo
s_add_i32 s20, s20, 1
s_add_u32 s12, s12, 24
s_addc_u32 s13, s13, 0
s_cmp_eq_u32 s3, s20
s_cbranch_scc0 .LBB0_8
s_branch .LBB0_5
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 23
.amdhsa_next_free_sgpr 28
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6KMeansP15HIP_vector_typeIhLj4EEjjj, .Lfunc_end0-_Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected centerClusters
.type centerClusters,@object
.section .bss,"aw",@nobits
.globl centerClusters
.p2align 4, 0x0
centerClusters:
.zero 768
.size centerClusters, 768
.type __hip_cuid_,@object
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym centerClusters
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.private_segment_fixed_size: 0
.sgpr_count: 30
.sgpr_spill_count: 0
.symbol: _Z6KMeansP15HIP_vector_typeIhLj4EEjjj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 23
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#define ErrorCheck(ans) { CheckFun((ans), __FILE__, __LINE__); }
inline void CheckFun(hipError_t code, const char *file, int line) {
if (code != hipSuccess) {
fprintf(stderr, "ERROR: %s %s %d\n", hipGetErrorString(code), file, line);
exit(0);
}
}
__constant__ double3 centerClusters[32];
__device__ inline double calculateDistance(uchar4 &A, double3 &B) {
return sqrt((double)(A.x - B.x)*(A.x - B.x) + (A.y - B.y)*(A.y - B.y) + (A.z - B.z)*(A.z - B.z));
}
__global__ void KMeans(uchar4 * __restrict__ img, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint32_t idx = threadIdx.x + blockIdx.x * blockDim.x;
uint32_t idy = threadIdx.y + blockIdx.y * blockDim.y;
uint32_t offsetx = blockDim.x * gridDim.x;
uint32_t offsety = blockDim.y * gridDim.y;
for (uint32_t i = idx; i < w; i += offsetx) {
for (uint32_t j = idy; j < h; j += offsety) {
double distanceMin = calculateDistance(img[j * w + i], centerClusters[0]);
uint32_t clusterNumber = 0;
for (uint32_t k = 1; k < nc; ++k) {
double distanceTmp = calculateDistance(img[j * w + i], centerClusters[k]);
if (distanceTmp < distanceMin) {
distanceMin = distanceTmp;
clusterNumber = k;
}
}
img[j * w + i].w = clusterNumber;
}
}
}
__host__ bool updateClusters(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uint64_t countElementOnCluster[32] = { 0 };
ulonglong3 sumElementOnCluster[32] = { make_ulonglong3(0, 0, 0) };
bool notEqual = false;
for (uint32_t i = 0; i < w*h; ++i) {
if (imgNew[i].w != img[i].w) notEqual = true;
countElementOnCluster[imgNew[i].w]++;
sumElementOnCluster[imgNew[i].w].x += imgNew[i].x;
sumElementOnCluster[imgNew[i].w].y += imgNew[i].y;
sumElementOnCluster[imgNew[i].w].z += imgNew[i].z;
}
for (uint32_t i = 0; i < nc; ++i) {
centerClustersHost[i].x = (double)sumElementOnCluster[i].x / (double)countElementOnCluster[i];
centerClustersHost[i].y = (double)sumElementOnCluster[i].y / (double)countElementOnCluster[i];
centerClustersHost[i].z = (double)sumElementOnCluster[i].z / (double)countElementOnCluster[i];
}
return notEqual;
}
__host__ void KMeans(uchar4 * __restrict__ img, uchar4 * __restrict__ imgNew,
double3 * __restrict__ centerClustersHost, const uint32_t w, const uint32_t h, const uint32_t nc) {
uchar4 *imgDev;
ErrorCheck(hipMalloc(&imgDev, sizeof(uchar4) * w * h));
ErrorCheck(hipMemcpy(imgDev, img, sizeof(uchar4) * w * h, hipMemcpyHostToDevice));
bool flag = true;
while (flag) {
ErrorCheck(hipMemcpyToSymbol(HIP_SYMBOL(centerClusters), centerClustersHost, sizeof(double3) * 32));
KMeans <<<dim3(32,32), dim3(32, 32)>>> (imgDev, w, h, nc);
ErrorCheck(hipGetLastError());
ErrorCheck(hipMemcpy(imgNew, imgDev, sizeof(uchar4) * w * h, hipMemcpyDeviceToHost));
flag = updateClusters(img, imgNew, centerClustersHost, w, h, nc);
uchar4 * imgTmp = imgNew;
imgNew = img;
img = imgTmp;
}
ErrorCheck(hipFree(imgDev));
}
int main() {
char inputFileName[256], outFileName[256];
uint32_t w, h, nc;
double3 centerClustersHost[32];
scanf("%s", inputFileName);
scanf("%s", outFileName);
FILE *hFile = fopen(inputFileName, "rb");
fread(&w, sizeof(uint32_t), 1, hFile);
fread(&h, sizeof(uint32_t), 1, hFile);
uchar4 *img = (uchar4*)malloc(sizeof(uchar4) * h * w);
uchar4 *imgNew = (uchar4*)malloc(sizeof(uchar4) * w * h);
fread(img, sizeof(uchar4), h * w, hFile);
fclose(hFile);
scanf("%" SCNu32, &nc);
for (uint32_t i = 0; i < nc; ++i) {
int x, y;
scanf("%" SCNu32 "%" SCNu32, &x, &y);
centerClustersHost[i].x = img[w * y + x].x;
centerClustersHost[i].y = img[w * y + x].y;
centerClustersHost[i].z = img[w * y + x].z;
}
KMeans(img,imgNew, centerClustersHost, w, h, nc);
hFile = fopen(outFileName, "wb");
fwrite(&w, sizeof(uint32_t), 1, hFile);
fwrite(&h, sizeof(uint32_t), 1, hFile);
fwrite(img, sizeof(uchar4), w * h, hFile);
fclose(hFile);
free(imgNew);
free(img);
return 0;
} | .text
.file "lab3.hip"
.globl _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj # -- Begin function _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.p2align 4, 0x90
.type _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj,@function
_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj: # @_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj, .Lfunc_end0-_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.LCPI1_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI1_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.p2align 4, 0x90
.type _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj,@function
_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj: # @_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_startproc
# %bb.0: # %.preheader41
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1048, %rsp # imm = 0x418
.cfi_def_cfa_offset 1104
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 12(%rsp) # 4-byte Spill
movl %r8d, %r14d
movl %ecx, %r13d
movq %rdx, %rbx
movq %rsi, %r15
movq %rdi, %r12
xorpd %xmm0, %xmm0
movapd %xmm0, 256(%rsp)
movapd %xmm0, 240(%rsp)
movapd %xmm0, 224(%rsp)
movapd %xmm0, 208(%rsp)
movapd %xmm0, 192(%rsp)
movapd %xmm0, 176(%rsp)
movapd %xmm0, 160(%rsp)
movapd %xmm0, 144(%rsp)
movapd %xmm0, 128(%rsp)
movapd %xmm0, 112(%rsp)
movapd %xmm0, 96(%rsp)
movapd %xmm0, 80(%rsp)
movapd %xmm0, 64(%rsp)
movapd %xmm0, 48(%rsp)
movapd %xmm0, 32(%rsp)
movapd %xmm0, 16(%rsp)
leaq 272(%rsp), %rdi
xorl %ebp, %ebp
movl $768, %edx # imm = 0x300
xorl %esi, %esi
callq memset@PLT
imull %r14d, %r13d
testl %r13d, %r13d
je .LBB1_4
# %bb.1: # %.lr.ph.preheader
movl %r13d, %eax
xorl %ecx, %ecx
movl $1, %edx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movzbl 3(%r15,%rcx,4), %esi
cmpb 3(%r12,%rcx,4), %sil
movzbl %bpl, %ebp
cmovnel %edx, %ebp
incq 16(%rsp,%rsi,8)
movzbl (%r15,%rcx,4), %edi
leaq (%rsi,%rsi,2), %rsi
addq %rdi, 272(%rsp,%rsi,8)
movzbl 1(%r15,%rcx,4), %edi
addq %rdi, 280(%rsp,%rsi,8)
movzbl 2(%r15,%rcx,4), %edi
addq %rdi, 288(%rsp,%rsi,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_2
# %bb.3: # %.preheader.loopexit
andb $1, %bpl
.LBB1_4: # %.preheader
movl 12(%rsp), %eax # 4-byte Reload
testl %eax, %eax
je .LBB1_7
# %bb.5: # %.lr.ph45.preheader
movl %eax, %eax
shlq $3, %rax
leaq (%rax,%rax,2), %rax
leaq 16(%rsp), %rcx
xorl %edx, %edx
movapd .LCPI1_0(%rip), %xmm0 # xmm0 = [1127219200,1160773632,0,0]
movapd .LCPI1_1(%rip), %xmm1 # xmm1 = [4.503599627370496E+15,1.9342813113834067E+25]
.p2align 4, 0x90
.LBB1_6: # %.lr.ph45
# =>This Inner Loop Header: Depth=1
movsd 272(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
movsd (%rcx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm4
unpckhpd %xmm2, %xmm4 # xmm4 = xmm4[1],xmm2[1]
addsd %xmm2, %xmm4
divsd %xmm4, %xmm3
movsd %xmm3, (%rbx,%rdx)
movsd 280(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
divsd %xmm4, %xmm3
movsd %xmm3, 8(%rbx,%rdx)
movsd 288(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
divsd %xmm4, %xmm3
movsd %xmm3, 16(%rbx,%rdx)
addq $24, %rdx
addq $8, %rcx
cmpq %rdx, %rax
jne .LBB1_6
.LBB1_7: # %._crit_edge
movl %ebp, %eax
addq $1048, %rsp # imm = 0x418
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj, .Lfunc_end1-_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.LCPI2_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI2_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.p2align 4, 0x90
.type _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj,@function
_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj: # @_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1128, %rsp # imm = 0x468
.cfi_def_cfa_offset 1184
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 12(%rsp) # 4-byte Spill
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movl %ecx, 16(%rsp) # 4-byte Spill
movl %ecx, %eax
movl %r8d, 20(%rsp) # 4-byte Spill
movl %r8d, %ebp
imulq %rax, %rbp
shlq $2, %rbp
leaq 24(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_1
# %bb.3: # %_Z8CheckFun10hipError_tPKci.exit
movq 24(%rsp), %rdi
movq %rbx, %r14
movq %rbx, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_25
# %bb.4: # %_Z8CheckFun10hipError_tPKci.exit26.preheader
movl 20(%rsp), %eax # 4-byte Reload
movl %eax, %r13d
imull 16(%rsp), %r13d # 4-byte Folded Reload
movl 12(%rsp), %eax # 4-byte Reload
leaq (%rax,%rax,2), %rbx
movq %r14, %rax
movq %rbp, 48(%rsp) # 8-byte Spill
jmp .LBB2_5
.p2align 4, 0x90
.LBB2_19: # %_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj.exit
# in Loop: Header=BB2_5 Depth=1
movq %r12, %rax
movq %r14, %r12
testb %bpl, %bpl
movq 48(%rsp), %rbp # 8-byte Reload
je .LBB2_20
.LBB2_5: # =>This Loop Header: Depth=1
# Child Loop BB2_23 Depth 2
# Child Loop BB2_18 Depth 2
movq %rax, %r14
movl $centerClusters, %edi
movl $768, %edx # imm = 0x300
movq %r15, %rsi
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
testl %eax, %eax
jne .LBB2_6
# %bb.7: # %_Z8CheckFun10hipError_tPKci.exit28
# in Loop: Header=BB2_5 Depth=1
movabsq $137438953504, %rdi # imm = 0x2000000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8: # in Loop: Header=BB2_5 Depth=1
movq 24(%rsp), %rax
movq %rax, 88(%rsp)
movl 16(%rsp), %eax # 4-byte Reload
movl %eax, 44(%rsp)
movl 20(%rsp), %eax # 4-byte Reload
movl %eax, 40(%rsp)
movl 12(%rsp), %eax # 4-byte Reload
movl %eax, 36(%rsp)
leaq 88(%rsp), %rax
movq %rax, 352(%rsp)
leaq 44(%rsp), %rax
movq %rax, 360(%rsp)
leaq 40(%rsp), %rax
movq %rax, 368(%rsp)
leaq 36(%rsp), %rax
movq %rax, 376(%rsp)
leaq 96(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %edi
leaq 352(%rsp), %r9
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9: # in Loop: Header=BB2_5 Depth=1
callq hipGetLastError
testl %eax, %eax
jne .LBB2_10
# %bb.11: # %_Z8CheckFun10hipError_tPKci.exit30
# in Loop: Header=BB2_5 Depth=1
movq 24(%rsp), %rsi
movq %r12, %rdi
movq %rbp, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_12
# %bb.13: # %_Z8CheckFun10hipError_tPKci.exit32
# in Loop: Header=BB2_5 Depth=1
xorpd %xmm0, %xmm0
movapd %xmm0, 336(%rsp)
movapd %xmm0, 320(%rsp)
movapd %xmm0, 304(%rsp)
movapd %xmm0, 288(%rsp)
movapd %xmm0, 272(%rsp)
movapd %xmm0, 256(%rsp)
movapd %xmm0, 240(%rsp)
movapd %xmm0, 224(%rsp)
movapd %xmm0, 208(%rsp)
movapd %xmm0, 192(%rsp)
movapd %xmm0, 176(%rsp)
movapd %xmm0, 160(%rsp)
movapd %xmm0, 144(%rsp)
movapd %xmm0, 128(%rsp)
movapd %xmm0, 112(%rsp)
movapd %xmm0, 96(%rsp)
xorl %ebp, %ebp
movl $768, %edx # imm = 0x300
leaq 352(%rsp), %rdi
xorl %esi, %esi
callq memset@PLT
testq %r13, %r13
je .LBB2_14
# %bb.22: # %.lr.ph.i.preheader
# in Loop: Header=BB2_5 Depth=1
xorl %eax, %eax
xorl %ebp, %ebp
movl $1, %esi
movapd .LCPI2_0(%rip), %xmm3 # xmm3 = [1127219200,1160773632,0,0]
movapd .LCPI2_1(%rip), %xmm4 # xmm4 = [4.503599627370496E+15,1.9342813113834067E+25]
.p2align 4, 0x90
.LBB2_23: # %.lr.ph.i
# Parent Loop BB2_5 Depth=1
# => This Inner Loop Header: Depth=2
movzbl 3(%r12,%rax,4), %ecx
cmpb 3(%r14,%rax,4), %cl
movzbl %bpl, %ebp
cmovnel %esi, %ebp
incq 96(%rsp,%rcx,8)
movzbl (%r12,%rax,4), %edx
leaq (%rcx,%rcx,2), %rcx
addq %rdx, 352(%rsp,%rcx,8)
movzbl 1(%r12,%rax,4), %edx
addq %rdx, 360(%rsp,%rcx,8)
movzbl 2(%r12,%rax,4), %edx
addq %rdx, 368(%rsp,%rcx,8)
incq %rax
cmpq %rax, %r13
jne .LBB2_23
# %bb.15: # %.preheader.loopexit.i
# in Loop: Header=BB2_5 Depth=1
andb $1, %bpl
cmpl $0, 12(%rsp) # 4-byte Folded Reload
jne .LBB2_17
jmp .LBB2_19
.p2align 4, 0x90
.LBB2_14: # in Loop: Header=BB2_5 Depth=1
movapd .LCPI2_0(%rip), %xmm3 # xmm3 = [1127219200,1160773632,0,0]
movapd .LCPI2_1(%rip), %xmm4 # xmm4 = [4.503599627370496E+15,1.9342813113834067E+25]
cmpl $0, 12(%rsp) # 4-byte Folded Reload
je .LBB2_19
.LBB2_17: # %.lr.ph45.i.preheader
# in Loop: Header=BB2_5 Depth=1
leaq 96(%rsp), %rax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_18: # %.lr.ph45.i
# Parent Loop BB2_5 Depth=1
# => This Inner Loop Header: Depth=2
movsd 352(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
movsd (%rax), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm2
unpckhpd %xmm0, %xmm2 # xmm2 = xmm2[1],xmm0[1]
addsd %xmm0, %xmm2
divsd %xmm2, %xmm1
movsd %xmm1, (%r15,%rcx,8)
movsd 360(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movsd %xmm1, 8(%r15,%rcx,8)
movsd 368(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movsd %xmm1, 16(%r15,%rcx,8)
addq $3, %rcx
addq $8, %rax
cmpq %rcx, %rbx
jne .LBB2_18
jmp .LBB2_19
.LBB2_20:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB2_21
# %bb.24: # %_Z8CheckFun10hipError_tPKci.exit35
addq $1128, %rsp # imm = 0x468
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_12:
.cfi_def_cfa_offset 1184
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $76, %r8d
jmp .LBB2_2
.LBB2_10:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $75, %r8d
jmp .LBB2_2
.LBB2_6:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $73, %r8d
.LBB2_2:
xorl %eax, %eax
callq fprintf
xorl %edi, %edi
callq exit
.LBB2_1:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $69, %r8d
jmp .LBB2_2
.LBB2_25:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $70, %r8d
jmp .LBB2_2
.LBB2_21:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $82, %r8d
jmp .LBB2_2
.Lfunc_end2:
.size _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj, .Lfunc_end2-_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1336, %rsp # imm = 0x538
.cfi_def_cfa_offset 1392
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 304(%rsp), %rbx
movl $.L.str.1, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq __isoc23_scanf
leaq 48(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.2, %esi
movq %rbx, %rdi
callq fopen
movq %rax, %r13
leaq 16(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fread
leaq 12(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r13, %rcx
callq fread
movl 12(%rsp), %r15d
movl 16(%rsp), %r12d
movq %r15, %r14
imulq %r12, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movq %r14, %rdi
callq malloc
movq %rax, %r14
movl %r12d, %edx
imull %r15d, %edx
movl $4, %esi
movq %rbx, %rdi
movq %r13, %rcx
callq fread
movq %r13, %rdi
callq fclose
leaq 20(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 20(%rsp), %r9d
testl %r9d, %r9d
je .LBB3_4
# %bb.1: # %.lr.ph.preheader
movq %r15, 32(%rsp) # 8-byte Spill
movq %r14, 40(%rsp) # 8-byte Spill
leaq 576(%rsp), %r14
leaq 28(%rsp), %r13
leaq 24(%rsp), %rbp
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.4, %edi
movq %r13, %rsi
movq %rbp, %rdx
xorl %eax, %eax
callq __isoc23_scanf
movl 24(%rsp), %eax
imull %r12d, %eax
addl 28(%rsp), %eax
movzbl (%rbx,%rax,4), %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd %xmm0, -16(%r14)
movzbl 1(%rbx,%rax,4), %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd %xmm0, -8(%r14)
movzbl 2(%rbx,%rax,4), %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movsd %xmm0, (%r14)
incq %r15
movl 20(%rsp), %r9d
addq $24, %r14
cmpq %r9, %r15
jb .LBB3_2
# %bb.3:
movq 40(%rsp), %r14 # 8-byte Reload
movq 32(%rsp), %r15 # 8-byte Reload
.LBB3_4: # %._crit_edge
leaq 560(%rsp), %rdx
movq %rbx, %rdi
movq %r14, %rsi
movl %r12d, %ecx
movl %r15d, %r8d
# kill: def $r9d killed $r9d killed $r9
callq _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
leaq 48(%rsp), %rdi
movl $.L.str.5, %esi
callq fopen
movq %rax, %r15
leaq 16(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fwrite
leaq 12(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r15, %rcx
callq fwrite
movl 12(%rsp), %edx
imull 16(%rsp), %edx
movl $4, %esi
movq %rbx, %rdi
movq %r15, %rcx
callq fwrite
movq %r15, %rdi
callq fclose
movq %r14, %rdi
callq free
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $1336, %rsp # imm = 0x538
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $centerClusters, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $768, %r9d # imm = 0x300
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type centerClusters,@object # @centerClusters
.local centerClusters
.comm centerClusters,768,16
.type _Z6KMeansP15HIP_vector_typeIhLj4EEjjj,@object # @_Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.section .rodata,"a",@progbits
.globl _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.p2align 3, 0x0
_Z6KMeansP15HIP_vector_typeIhLj4EEjjj:
.quad _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.size _Z6KMeansP15HIP_vector_typeIhLj4EEjjj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/MrCoppelius/CUDA/master/PGP3/PGP3/lab3.hip"
.size .L.str, 100
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "rb"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%u"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%u%u"
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "wb"
.size .L.str.5, 3
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "ERROR: %s %s %d\n"
.size .L.str.6, 17
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6KMeansP15HIP_vector_typeIhLj4EEjjj"
.size .L__unnamed_1, 38
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "centerClusters"
.size .L__unnamed_2, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym centerClusters
.addrsig_sym _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c5021_00000000-6_lab3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z14updateClustersP6uchar4S0_P7double3jjj
.type _Z14updateClustersP6uchar4S0_P7double3jjj, @function
_Z14updateClustersP6uchar4S0_P7double3jjj:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1040, %rsp
.cfi_def_cfa_offset 1072
movq %rdi, %r11
movq %rdx, %r10
movl %ecx, %edx
movq %fs:40, %rax
movq %rax, 1032(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl $32, %ecx
rep stosq
leaq 256(%rsp), %rdi
movl $96, %ecx
rep stosq
imull %edx, %r8d
testl %r8d, %r8d
je .L18
movq %rsi, %rdx
leaq 3(%r11), %rdi
movl %r8d, %r8d
leaq (%rsi,%r8,4), %r11
movl $0, %esi
movl $1, %r8d
.L6:
movzbl 3(%rdx), %eax
cmpb (%rdi), %al
cmovne %r8d, %esi
movzbl %al, %eax
addq $1, (%rsp,%rax,8)
leaq (%rax,%rax), %rbx
leaq (%rbx,%rax), %rbp
movzbl (%rdx), %ecx
addq 256(%rsp,%rbp,8), %rcx
movq %rcx, 256(%rsp,%rbp,8)
movzbl 1(%rdx), %ecx
addq 264(%rsp,%rbp,8), %rcx
movq %rcx, 264(%rsp,%rbp,8)
movzbl 2(%rdx), %ecx
addq 272(%rsp,%rbp,8), %rcx
movq %rcx, 272(%rsp,%rbp,8)
addq $4, %rdx
addq $4, %rdi
cmpq %r11, %rdx
jne .L6
.L4:
testl %r9d, %r9d
je .L3
leaq 256(%rsp), %r8
movq %rsp, %rdx
movq %r10, %rdi
movl %r9d, %r9d
leaq (%rdx,%r9,8), %r9
jmp .L16
.L18:
movl $0, %esi
jmp .L4
.L8:
movq %rax, %rcx
shrq %rcx
andl $1, %eax
orq %rax, %rcx
pxor %xmm1, %xmm1
cvtsi2sdq %rcx, %xmm1
addsd %xmm1, %xmm1
jmp .L9
.L10:
movq %rax, %r11
shrq %r11
andl $1, %eax
orq %rax, %r11
pxor %xmm0, %xmm0
cvtsi2sdq %r11, %xmm0
addsd %xmm0, %xmm0
jmp .L11
.L12:
movq %rax, %r11
shrq %r11
andl $1, %eax
orq %rax, %r11
pxor %xmm0, %xmm0
cvtsi2sdq %r11, %xmm0
addsd %xmm0, %xmm0
jmp .L13
.L14:
movq %rax, %r10
shrq %r10
andl $1, %eax
orq %rax, %r10
pxor %xmm0, %xmm0
cvtsi2sdq %r10, %xmm0
addsd %xmm0, %xmm0
.L15:
divsd %xmm1, %xmm0
movsd %xmm0, 16(%rcx)
addq $24, %r8
addq $8, %rdx
addq $24, %rdi
cmpq %r9, %rdx
je .L3
.L16:
movq %r8, %r10
movq (%rdx), %rax
testq %rax, %rax
js .L8
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
.L9:
movq %rdi, %rcx
movq (%r10), %rax
testq %rax, %rax
js .L10
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L11:
divsd %xmm1, %xmm0
movsd %xmm0, (%rcx)
movq 8(%r10), %rax
testq %rax, %rax
js .L12
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L13:
divsd %xmm1, %xmm0
movsd %xmm0, 8(%rcx)
movq 16(%r10), %rax
testq %rax, %rax
js .L14
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L15
.L3:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L23
movl %esi, %eax
addq $1040, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z14updateClustersP6uchar4S0_P7double3jjj, .-_Z14updateClustersP6uchar4S0_P7double3jjj
.globl _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
.type _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj, @function
_Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj:
.LFB2086:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %esi, 12(%rsp)
movl %edx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movq %rdi, 24(%rsp)
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6KMeansP6uchar4jjj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj, .-_Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
.globl _Z6KMeansP6uchar4jjj
.type _Z6KMeansP6uchar4jjj, @function
_Z6KMeansP6uchar4jjj:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z6KMeansP6uchar4jjj, .-_Z6KMeansP6uchar4jjj
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "/home/ubuntu/Datasets/stackv2/train-structured/MrCoppelius/CUDA/master/PGP3/PGP3/lab3.cu"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "ERROR: %s %s %d\n"
.text
.globl _Z6KMeansP6uchar4S0_P7double3jjj
.type _Z6KMeansP6uchar4S0_P7double3jjj, @function
_Z6KMeansP6uchar4S0_P7double3jjj:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r12
movq %rsi, %r13
movq %rdx, %r14
movl %ecx, 8(%rsp)
movl %r8d, %ebp
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %ecx, %ebx
movl %r8d, %eax
imulq %rax, %rbx
salq $2, %rbx
leaq 24(%rsp), %rdi
movq %rbx, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L44
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
leaq _ZL14centerClusters(%rip), %r15
testl %eax, %eax
jne .L45
.L34:
movl $1, %r8d
movl $0, %ecx
movl $768, %edx
movq %r14, %rsi
movq %r15, %rdi
call cudaMemcpyToSymbol@PLT
testl %eax, %eax
jne .L46
movl $32, 44(%rsp)
movl $32, 48(%rsp)
movl $32, 32(%rsp)
movl $32, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L47
.L36:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L48
movl $2, %ecx
movq %rbx, %rdx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L49
movl 12(%rsp), %r9d
movl %ebp, %r8d
movl 8(%rsp), %ecx
movq %r14, %rdx
movq %r13, %rsi
movq %r12, %rdi
call _Z14updateClustersP6uchar4S0_P7double3jjj
movq %r13, %rdx
movq %r12, %r13
testb %al, %al
je .L50
movq %rdx, %r12
jmp .L34
.L44:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $69, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L45:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $70, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L46:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $73, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L47:
movl 12(%rsp), %ecx
movl %ebp, %edx
movl 8(%rsp), %esi
movq 24(%rsp), %rdi
call _Z34__device_stub__Z6KMeansP6uchar4jjjP6uchar4jjj
jmp .L36
.L48:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $75, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L49:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $76, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L50:
movq 24(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L51
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L52
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L51:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
movl $82, %r9d
leaq .LC0(%rip), %r8
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $0, %edi
call exit@PLT
.L52:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size _Z6KMeansP6uchar4S0_P7double3jjj, .-_Z6KMeansP6uchar4S0_P7double3jjj
.section .rodata.str1.1
.LC2:
.string "%s"
.LC3:
.string "rb"
.LC4:
.string "%u"
.LC5:
.string "%u%u"
.LC6:
.string "wb"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $1328, %rsp
.cfi_def_cfa_offset 1376
movq %fs:40, %rax
movq %rax, 1320(%rsp)
xorl %eax, %eax
leaq 800(%rsp), %rbx
movq %rbx, %rsi
leaq .LC2(%rip), %rbp
movq %rbp, %rdi
call __isoc23_scanf@PLT
leaq 1056(%rsp), %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
leaq .LC3(%rip), %rsi
movq %rbx, %rdi
call fopen@PLT
movq %rax, %rbx
leaq 12(%rsp), %rdi
movq %rax, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
leaq 16(%rsp), %rdi
movq %rbx, %r8
movl $1, %ecx
movl $4, %edx
movl $4, %esi
call __fread_chk@PLT
movl 16(%rsp), %ebp
movl 12(%rsp), %eax
imulq %rax, %rbp
leaq 0(,%rbp,4), %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %r14
movl %ebp, %ecx
movq %rbx, %r8
movl $4, %edx
movq %r13, %rsi
movq %r12, %rdi
call __fread_chk@PLT
movq %rbx, %rdi
call fclose@PLT
leaq 20(%rsp), %rsi
leaq .LC4(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 20(%rsp), %r9d
testl %r9d, %r9d
je .L54
leaq 32(%rsp), %rbx
movl $0, %ebp
leaq .LC5(%rip), %r13
.L55:
leaq 28(%rsp), %rdx
leaq 24(%rsp), %rsi
movq %r13, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 12(%rsp), %eax
imull 28(%rsp), %eax
addl 24(%rsp), %eax
leaq (%r12,%rax,4), %rax
movzbl (%rax), %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, (%rbx)
movzbl 1(%rax), %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
movsd %xmm0, 8(%rbx)
movzbl 2(%rax), %eax
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, 16(%rbx)
addl $1, %ebp
movl 20(%rsp), %r9d
addq $24, %rbx
cmpl %r9d, %ebp
jb .L55
.L54:
leaq 32(%rsp), %rdx
movl 16(%rsp), %r8d
movl 12(%rsp), %ecx
movq %r14, %rsi
movq %r12, %rdi
call _Z6KMeansP6uchar4S0_P7double3jjj
leaq 1056(%rsp), %rdi
leaq .LC6(%rip), %rsi
call fopen@PLT
movq %rax, %rbx
leaq 12(%rsp), %rdi
movq %rax, %rcx
movl $1, %edx
movl $4, %esi
call fwrite@PLT
leaq 16(%rsp), %rdi
movq %rbx, %rcx
movl $1, %edx
movl $4, %esi
call fwrite@PLT
movl 12(%rsp), %edx
imull 16(%rsp), %edx
movq %rbx, %rcx
movl $4, %esi
movq %r12, %rdi
call fwrite@PLT
movq %rbx, %rdi
call fclose@PLT
movq %r14, %rdi
call free@PLT
movq %r12, %rdi
call free@PLT
movq 1320(%rsp), %rax
subq %fs:40, %rax
jne .L59
movl $0, %eax
addq $1328, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z6KMeansP6uchar4jjj"
.LC8:
.string "centerClusters"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z6KMeansP6uchar4jjj(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $768, %r9d
movl $0, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _ZL14centerClusters(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL14centerClusters
.comm _ZL14centerClusters,768,32
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "lab3.hip"
.globl _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj # -- Begin function _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.p2align 4, 0x90
.type _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj,@function
_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj: # @_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj, .Lfunc_end0-_Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.LCPI1_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI1_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.p2align 4, 0x90
.type _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj,@function
_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj: # @_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_startproc
# %bb.0: # %.preheader41
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1048, %rsp # imm = 0x418
.cfi_def_cfa_offset 1104
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 12(%rsp) # 4-byte Spill
movl %r8d, %r14d
movl %ecx, %r13d
movq %rdx, %rbx
movq %rsi, %r15
movq %rdi, %r12
xorpd %xmm0, %xmm0
movapd %xmm0, 256(%rsp)
movapd %xmm0, 240(%rsp)
movapd %xmm0, 224(%rsp)
movapd %xmm0, 208(%rsp)
movapd %xmm0, 192(%rsp)
movapd %xmm0, 176(%rsp)
movapd %xmm0, 160(%rsp)
movapd %xmm0, 144(%rsp)
movapd %xmm0, 128(%rsp)
movapd %xmm0, 112(%rsp)
movapd %xmm0, 96(%rsp)
movapd %xmm0, 80(%rsp)
movapd %xmm0, 64(%rsp)
movapd %xmm0, 48(%rsp)
movapd %xmm0, 32(%rsp)
movapd %xmm0, 16(%rsp)
leaq 272(%rsp), %rdi
xorl %ebp, %ebp
movl $768, %edx # imm = 0x300
xorl %esi, %esi
callq memset@PLT
imull %r14d, %r13d
testl %r13d, %r13d
je .LBB1_4
# %bb.1: # %.lr.ph.preheader
movl %r13d, %eax
xorl %ecx, %ecx
movl $1, %edx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movzbl 3(%r15,%rcx,4), %esi
cmpb 3(%r12,%rcx,4), %sil
movzbl %bpl, %ebp
cmovnel %edx, %ebp
incq 16(%rsp,%rsi,8)
movzbl (%r15,%rcx,4), %edi
leaq (%rsi,%rsi,2), %rsi
addq %rdi, 272(%rsp,%rsi,8)
movzbl 1(%r15,%rcx,4), %edi
addq %rdi, 280(%rsp,%rsi,8)
movzbl 2(%r15,%rcx,4), %edi
addq %rdi, 288(%rsp,%rsi,8)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_2
# %bb.3: # %.preheader.loopexit
andb $1, %bpl
.LBB1_4: # %.preheader
movl 12(%rsp), %eax # 4-byte Reload
testl %eax, %eax
je .LBB1_7
# %bb.5: # %.lr.ph45.preheader
movl %eax, %eax
shlq $3, %rax
leaq (%rax,%rax,2), %rax
leaq 16(%rsp), %rcx
xorl %edx, %edx
movapd .LCPI1_0(%rip), %xmm0 # xmm0 = [1127219200,1160773632,0,0]
movapd .LCPI1_1(%rip), %xmm1 # xmm1 = [4.503599627370496E+15,1.9342813113834067E+25]
.p2align 4, 0x90
.LBB1_6: # %.lr.ph45
# =>This Inner Loop Header: Depth=1
movsd 272(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
movsd (%rcx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm4
unpckhpd %xmm2, %xmm4 # xmm4 = xmm4[1],xmm2[1]
addsd %xmm2, %xmm4
divsd %xmm4, %xmm3
movsd %xmm3, (%rbx,%rdx)
movsd 280(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
divsd %xmm4, %xmm3
movsd %xmm3, 8(%rbx,%rdx)
movsd 288(%rsp,%rdx), %xmm2 # xmm2 = mem[0],zero
unpcklps %xmm0, %xmm2 # xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
subpd %xmm1, %xmm2
movapd %xmm2, %xmm3
unpckhpd %xmm2, %xmm3 # xmm3 = xmm3[1],xmm2[1]
addsd %xmm2, %xmm3
divsd %xmm4, %xmm3
movsd %xmm3, 16(%rbx,%rdx)
addq $24, %rdx
addq $8, %rcx
cmpq %rdx, %rax
jne .LBB1_6
.LBB1_7: # %._crit_edge
movl %ebp, %eax
addq $1048, %rsp # imm = 0x418
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj, .Lfunc_end1-_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_endproc
# -- End function
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.LCPI2_0:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI2_1:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.p2align 4, 0x90
.type _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj,@function
_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj: # @_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1128, %rsp # imm = 0x468
.cfi_def_cfa_offset 1184
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %r9d, 12(%rsp) # 4-byte Spill
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movl %ecx, 16(%rsp) # 4-byte Spill
movl %ecx, %eax
movl %r8d, 20(%rsp) # 4-byte Spill
movl %r8d, %ebp
imulq %rax, %rbp
shlq $2, %rbp
leaq 24(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB2_1
# %bb.3: # %_Z8CheckFun10hipError_tPKci.exit
movq 24(%rsp), %rdi
movq %rbx, %r14
movq %rbx, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_25
# %bb.4: # %_Z8CheckFun10hipError_tPKci.exit26.preheader
movl 20(%rsp), %eax # 4-byte Reload
movl %eax, %r13d
imull 16(%rsp), %r13d # 4-byte Folded Reload
movl 12(%rsp), %eax # 4-byte Reload
leaq (%rax,%rax,2), %rbx
movq %r14, %rax
movq %rbp, 48(%rsp) # 8-byte Spill
jmp .LBB2_5
.p2align 4, 0x90
.LBB2_19: # %_Z14updateClustersP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj.exit
# in Loop: Header=BB2_5 Depth=1
movq %r12, %rax
movq %r14, %r12
testb %bpl, %bpl
movq 48(%rsp), %rbp # 8-byte Reload
je .LBB2_20
.LBB2_5: # =>This Loop Header: Depth=1
# Child Loop BB2_23 Depth 2
# Child Loop BB2_18 Depth 2
movq %rax, %r14
movl $centerClusters, %edi
movl $768, %edx # imm = 0x300
movq %r15, %rsi
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
testl %eax, %eax
jne .LBB2_6
# %bb.7: # %_Z8CheckFun10hipError_tPKci.exit28
# in Loop: Header=BB2_5 Depth=1
movabsq $137438953504, %rdi # imm = 0x2000000020
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_9
# %bb.8: # in Loop: Header=BB2_5 Depth=1
movq 24(%rsp), %rax
movq %rax, 88(%rsp)
movl 16(%rsp), %eax # 4-byte Reload
movl %eax, 44(%rsp)
movl 20(%rsp), %eax # 4-byte Reload
movl %eax, 40(%rsp)
movl 12(%rsp), %eax # 4-byte Reload
movl %eax, 36(%rsp)
leaq 88(%rsp), %rax
movq %rax, 352(%rsp)
leaq 44(%rsp), %rax
movq %rax, 360(%rsp)
leaq 40(%rsp), %rax
movq %rax, 368(%rsp)
leaq 36(%rsp), %rax
movq %rax, 376(%rsp)
leaq 96(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 96(%rsp), %rsi
movl 104(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %edi
leaq 352(%rsp), %r9
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_9: # in Loop: Header=BB2_5 Depth=1
callq hipGetLastError
testl %eax, %eax
jne .LBB2_10
# %bb.11: # %_Z8CheckFun10hipError_tPKci.exit30
# in Loop: Header=BB2_5 Depth=1
movq 24(%rsp), %rsi
movq %r12, %rdi
movq %rbp, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB2_12
# %bb.13: # %_Z8CheckFun10hipError_tPKci.exit32
# in Loop: Header=BB2_5 Depth=1
xorpd %xmm0, %xmm0
movapd %xmm0, 336(%rsp)
movapd %xmm0, 320(%rsp)
movapd %xmm0, 304(%rsp)
movapd %xmm0, 288(%rsp)
movapd %xmm0, 272(%rsp)
movapd %xmm0, 256(%rsp)
movapd %xmm0, 240(%rsp)
movapd %xmm0, 224(%rsp)
movapd %xmm0, 208(%rsp)
movapd %xmm0, 192(%rsp)
movapd %xmm0, 176(%rsp)
movapd %xmm0, 160(%rsp)
movapd %xmm0, 144(%rsp)
movapd %xmm0, 128(%rsp)
movapd %xmm0, 112(%rsp)
movapd %xmm0, 96(%rsp)
xorl %ebp, %ebp
movl $768, %edx # imm = 0x300
leaq 352(%rsp), %rdi
xorl %esi, %esi
callq memset@PLT
testq %r13, %r13
je .LBB2_14
# %bb.22: # %.lr.ph.i.preheader
# in Loop: Header=BB2_5 Depth=1
xorl %eax, %eax
xorl %ebp, %ebp
movl $1, %esi
movapd .LCPI2_0(%rip), %xmm3 # xmm3 = [1127219200,1160773632,0,0]
movapd .LCPI2_1(%rip), %xmm4 # xmm4 = [4.503599627370496E+15,1.9342813113834067E+25]
.p2align 4, 0x90
.LBB2_23: # %.lr.ph.i
# Parent Loop BB2_5 Depth=1
# => This Inner Loop Header: Depth=2
movzbl 3(%r12,%rax,4), %ecx
cmpb 3(%r14,%rax,4), %cl
movzbl %bpl, %ebp
cmovnel %esi, %ebp
incq 96(%rsp,%rcx,8)
movzbl (%r12,%rax,4), %edx
leaq (%rcx,%rcx,2), %rcx
addq %rdx, 352(%rsp,%rcx,8)
movzbl 1(%r12,%rax,4), %edx
addq %rdx, 360(%rsp,%rcx,8)
movzbl 2(%r12,%rax,4), %edx
addq %rdx, 368(%rsp,%rcx,8)
incq %rax
cmpq %rax, %r13
jne .LBB2_23
# %bb.15: # %.preheader.loopexit.i
# in Loop: Header=BB2_5 Depth=1
andb $1, %bpl
cmpl $0, 12(%rsp) # 4-byte Folded Reload
jne .LBB2_17
jmp .LBB2_19
.p2align 4, 0x90
.LBB2_14: # in Loop: Header=BB2_5 Depth=1
movapd .LCPI2_0(%rip), %xmm3 # xmm3 = [1127219200,1160773632,0,0]
movapd .LCPI2_1(%rip), %xmm4 # xmm4 = [4.503599627370496E+15,1.9342813113834067E+25]
cmpl $0, 12(%rsp) # 4-byte Folded Reload
je .LBB2_19
.LBB2_17: # %.lr.ph45.i.preheader
# in Loop: Header=BB2_5 Depth=1
leaq 96(%rsp), %rax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_18: # %.lr.ph45.i
# Parent Loop BB2_5 Depth=1
# => This Inner Loop Header: Depth=2
movsd 352(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
movsd (%rax), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm2
unpckhpd %xmm0, %xmm2 # xmm2 = xmm2[1],xmm0[1]
addsd %xmm0, %xmm2
divsd %xmm2, %xmm1
movsd %xmm1, (%r15,%rcx,8)
movsd 360(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movsd %xmm1, 8(%r15,%rcx,8)
movsd 368(%rsp,%rcx,8), %xmm0 # xmm0 = mem[0],zero
unpcklps %xmm3, %xmm0 # xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
subpd %xmm4, %xmm0
movapd %xmm0, %xmm1
unpckhpd %xmm0, %xmm1 # xmm1 = xmm1[1],xmm0[1]
addsd %xmm0, %xmm1
divsd %xmm2, %xmm1
movsd %xmm1, 16(%r15,%rcx,8)
addq $3, %rcx
addq $8, %rax
cmpq %rcx, %rbx
jne .LBB2_18
jmp .LBB2_19
.LBB2_20:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB2_21
# %bb.24: # %_Z8CheckFun10hipError_tPKci.exit35
addq $1128, %rsp # imm = 0x468
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB2_12:
.cfi_def_cfa_offset 1184
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $76, %r8d
jmp .LBB2_2
.LBB2_10:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $75, %r8d
jmp .LBB2_2
.LBB2_6:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $73, %r8d
.LBB2_2:
xorl %eax, %eax
callq fprintf
xorl %edi, %edi
callq exit
.LBB2_1:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $69, %r8d
jmp .LBB2_2
.LBB2_25:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $70, %r8d
jmp .LBB2_2
.LBB2_21:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.6, %esi
movl $.L.str, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $82, %r8d
jmp .LBB2_2
.Lfunc_end2:
.size _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj, .Lfunc_end2-_Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1336, %rsp # imm = 0x538
.cfi_def_cfa_offset 1392
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 304(%rsp), %rbx
movl $.L.str.1, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq __isoc23_scanf
leaq 48(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl $.L.str.2, %esi
movq %rbx, %rdi
callq fopen
movq %rax, %r13
leaq 16(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fread
leaq 12(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r13, %rcx
callq fread
movl 12(%rsp), %r15d
movl 16(%rsp), %r12d
movq %r15, %r14
imulq %r12, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movq %r14, %rdi
callq malloc
movq %rax, %r14
movl %r12d, %edx
imull %r15d, %edx
movl $4, %esi
movq %rbx, %rdi
movq %r13, %rcx
callq fread
movq %r13, %rdi
callq fclose
leaq 20(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 20(%rsp), %r9d
testl %r9d, %r9d
je .LBB3_4
# %bb.1: # %.lr.ph.preheader
movq %r15, 32(%rsp) # 8-byte Spill
movq %r14, 40(%rsp) # 8-byte Spill
leaq 576(%rsp), %r14
leaq 28(%rsp), %r13
leaq 24(%rsp), %rbp
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $.L.str.4, %edi
movq %r13, %rsi
movq %rbp, %rdx
xorl %eax, %eax
callq __isoc23_scanf
movl 24(%rsp), %eax
imull %r12d, %eax
addl 28(%rsp), %eax
movzbl (%rbx,%rax,4), %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd %xmm0, -16(%r14)
movzbl 1(%rbx,%rax,4), %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd %xmm0, -8(%r14)
movzbl 2(%rbx,%rax,4), %eax
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movsd %xmm0, (%r14)
incq %r15
movl 20(%rsp), %r9d
addq $24, %r14
cmpq %r9, %r15
jb .LBB3_2
# %bb.3:
movq 40(%rsp), %r14 # 8-byte Reload
movq 32(%rsp), %r15 # 8-byte Reload
.LBB3_4: # %._crit_edge
leaq 560(%rsp), %rdx
movq %rbx, %rdi
movq %r14, %rsi
movl %r12d, %ecx
movl %r15d, %r8d
# kill: def $r9d killed $r9d killed $r9
callq _Z6KMeansP15HIP_vector_typeIhLj4EES1_PS_IdLj3EEjjj
leaq 48(%rsp), %rdi
movl $.L.str.5, %esi
callq fopen
movq %rax, %r15
leaq 16(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %rax, %rcx
callq fwrite
leaq 12(%rsp), %rdi
movl $4, %esi
movl $1, %edx
movq %r15, %rcx
callq fwrite
movl 12(%rsp), %edx
imull 16(%rsp), %edx
movl $4, %esi
movq %rbx, %rdi
movq %r15, %rcx
callq fwrite
movq %r15, %rdi
callq fclose
movq %r14, %rdi
callq free
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $1336, %rsp # imm = 0x538
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6KMeansP15HIP_vector_typeIhLj4EEjjj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $centerClusters, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movl $768, %r9d # imm = 0x300
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type centerClusters,@object # @centerClusters
.local centerClusters
.comm centerClusters,768,16
.type _Z6KMeansP15HIP_vector_typeIhLj4EEjjj,@object # @_Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.section .rodata,"a",@progbits
.globl _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.p2align 3, 0x0
_Z6KMeansP15HIP_vector_typeIhLj4EEjjj:
.quad _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.size _Z6KMeansP15HIP_vector_typeIhLj4EEjjj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/MrCoppelius/CUDA/master/PGP3/PGP3/lab3.hip"
.size .L.str, 100
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "rb"
.size .L.str.2, 3
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "%u"
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%u%u"
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "wb"
.size .L.str.5, 3
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "ERROR: %s %s %d\n"
.size .L.str.6, 17
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6KMeansP15HIP_vector_typeIhLj4EEjjj"
.size .L__unnamed_1, 38
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "centerClusters"
.size .L__unnamed_2, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__KMeansP15HIP_vector_typeIhLj4EEjjj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym centerClusters
.addrsig_sym _Z6KMeansP15HIP_vector_typeIhLj4EEjjj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include <time.h>
#include <curand.h>
#include <curand_kernel.h>
#define BLOCK_SIZE 768
//-------- Save values to dat file --------//
void saveFrequenciesToFile(int *array, int size){
FILE *filePointer = fopen("freq.dat", "w");
for (int i = 0; i < 10; i++) {
fprintf(filePointer, "0.%d, %f\n", i, (float)array[i]/(size*2));
}
}
////-------- Random initialization --------//
__global__ void initRand(unsigned int seed, curandState_t *states) {
curand_init(seed, threadIdx.x, 0, &states[threadIdx.x]);
}
//-------- Calculate random --------//
__global__ void calculateRandomNumbers(curandState_t *states, int *frequencies, int *result, int size){
__shared__ int partialCount;
if (threadIdx.x == 0) {
partialCount = 0.0;
}
__syncthreads();
if (threadIdx.x < size) {
float rand1 = curand_uniform(&states[threadIdx.x]);
float rand2 = curand_uniform(&states[threadIdx.x]);
if ((rand1*rand1) + (rand2*rand2) <= 1) {
atomicAdd(&partialCount, 1);
}
atomicAdd(&frequencies[(int)(rand1 * 10)], 1);
atomicAdd(&frequencies[(int)(rand2 * 10)], 1);
__syncthreads();
if (threadIdx.x == 0) {
atomicAdd(&result[0], partialCount);
}
__syncthreads();
}
}
int main (int argc, char *argv[]) {
//-------- Testing parameters --------//
if (argc != 2){
printf("Incorrect number of parameters :(\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
int size = atoi(argv[1]);
if(size < 0){
printf("Negative parameter not allowed. :P\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
//--Initializing variables
int *frequencies, *dev_frequencies;
int *result, *dev_result;
int memorySize = 10*sizeof(int);
srand48(time(NULL));
frequencies = (int *)malloc(memorySize);
result = (int *)malloc(sizeof(int));
result[0] = 0.0;
//--Initializing CUDA memory
cudaMalloc((void **)&dev_frequencies, memorySize);
cudaMalloc((void **)&dev_result, sizeof(int));
cudaMemcpy(dev_frequencies, frequencies, memorySize, cudaMemcpyHostToDevice);
cudaMemcpy(dev_result, result, sizeof(int), cudaMemcpyHostToDevice);
int blockNumber = ceil((float)size/BLOCK_SIZE);
//--Initializing Random States
curandState_t *states;
cudaMalloc((void**) &states, size*sizeof(curandState_t));
initRand<<<blockNumber, BLOCK_SIZE>>>(time(NULL), states);
//--Calculate Pi
calculateRandomNumbers<<<blockNumber, BLOCK_SIZE>>>(states, dev_frequencies, dev_result, size);
cudaThreadSynchronize();
cudaMemcpy(frequencies, dev_frequencies, memorySize, cudaMemcpyDeviceToHost);
cudaMemcpy(result, dev_result, sizeof(float), cudaMemcpyDeviceToHost);
float pi = (((float)result[0] / (float)size)*4);
printf("Pi approximated value is: %f\n", pi);
cudaFree(frequencies); cudaFree(dev_result);
//-- Saving matrices to file
saveFrequenciesToFile(frequencies, size);
free(frequencies); free(result);
exit(0);
} | .file "tmpxft_0008d87c_00000000-6_MCPi.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2275:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2275:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "freq.dat"
.LC2:
.string "0.%d, %f\n"
.text
.globl _Z21saveFrequenciesToFilePii
.type _Z21saveFrequenciesToFilePii, @function
_Z21saveFrequenciesToFilePii:
.LFB2271:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $24, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r12
movl %esi, %ebx
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
addl %ebx, %ebx
pxor %xmm2, %xmm2
cvtsi2ssl %ebx, %xmm2
movss %xmm2, 12(%rsp)
movl $0, %ebx
leaq .LC2(%rip), %r13
.L4:
pxor %xmm0, %xmm0
cvtsi2ssl (%r12,%rbx,4), %xmm0
divss 12(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl %ebx, %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $1, %eax
call __fprintf_chk@PLT
addq $1, %rbx
cmpq $10, %rbx
jne .L4
addq $24, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2271:
.size _Z21saveFrequenciesToFilePii, .-_Z21saveFrequenciesToFilePii
.globl _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
.type _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW, @function
_Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW:
.LFB2297:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 12(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8initRandjP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2297:
.size _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW, .-_Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
.globl _Z8initRandjP17curandStateXORWOW
.type _Z8initRandjP17curandStateXORWOW, @function
_Z8initRandjP17curandStateXORWOW:
.LFB2298:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2298:
.size _Z8initRandjP17curandStateXORWOW, .-_Z8initRandjP17curandStateXORWOW
.globl _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
.type _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i, @function
_Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i:
.LFB2299:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L19
.L15:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L20
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L15
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2299:
.size _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i, .-_Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
.globl _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i
.type _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i, @function
_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i:
.LFB2300:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2300:
.size _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i, .-_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "Incorrect number of parameters :(\n"
.align 8
.LC4:
.string "Try: \"./MatrixMult <MATRIX SIZE>\"\n"
.align 8
.LC5:
.string "Negative parameter not allowed. :P\n"
.section .rodata.str1.1
.LC8:
.string "Pi approximated value is: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2272:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $80, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
cmpl $2, %edi
je .L24
leaq .LC3(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L24:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbx
movl %eax, %r13d
testl %eax, %eax
js .L30
movl $0, %edi
call time@PLT
movq %rax, %rdi
call srand48@PLT
movl $40, %edi
call malloc@PLT
movq %rax, %r12
movl $4, %edi
call malloc@PLT
movq %rax, %rbp
movl $0, (%rax)
leaq 24(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $40, %edx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4, %edx
movq %rbp, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm1, %xmm1
cvtsi2ssl %ebx, %xmm1
movss %xmm1, 8(%rsp)
movaps %xmm1, %xmm0
divss .LC6(%rip), %xmm0
call ceilf@PLT
movss %xmm0, 12(%rsp)
movslq %ebx, %rsi
imulq $48, %rsi, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $768, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
cvttss2sil 12(%rsp), %ebx
movl %ebx, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L26:
movl $768, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl %ebx, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L32
.L27:
call cudaThreadSynchronize@PLT
movl $2, %ecx
movl $40, %edx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4, %edx
movq 32(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2ssl 0(%rbp), %xmm0
divss 8(%rsp), %xmm0
mulss .LC7(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r12, %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movl %r13d, %esi
movq %r12, %rdi
call _Z21saveFrequenciesToFilePii
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movl $0, %edi
call exit@PLT
.L30:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L31:
movq 40(%rsp), %r14
movl $0, %edi
call time@PLT
movq %r14, %rsi
movl %eax, %edi
call _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
jmp .L26
.L32:
movl %r13d, %ecx
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
jmp .L27
.cfi_endproc
.LFE2272:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC9:
.string "_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i"
.align 8
.LC10:
.string "_Z8initRandjP17curandStateXORWOW"
.section .rodata.str1.1
.LC11:
.string "precalc_xorwow_matrix"
.LC12:
.string "precalc_xorwow_offset_matrix"
.LC13:
.string "mrg32k3aM1"
.LC14:
.string "mrg32k3aM2"
.LC15:
.string "mrg32k3aM1SubSeq"
.LC16:
.string "mrg32k3aM2SubSeq"
.LC17:
.string "mrg32k3aM1Seq"
.LC18:
.string "mrg32k3aM2Seq"
.LC19:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2302:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z8initRandjP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC16(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC17(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC18(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2302:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1145044992
.align 4
.LC7:
.long 1082130432
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include <time.h>
#include <curand.h>
#include <curand_kernel.h>
#define BLOCK_SIZE 768
//-------- Save values to dat file --------//
void saveFrequenciesToFile(int *array, int size){
FILE *filePointer = fopen("freq.dat", "w");
for (int i = 0; i < 10; i++) {
fprintf(filePointer, "0.%d, %f\n", i, (float)array[i]/(size*2));
}
}
////-------- Random initialization --------//
__global__ void initRand(unsigned int seed, curandState_t *states) {
curand_init(seed, threadIdx.x, 0, &states[threadIdx.x]);
}
//-------- Calculate random --------//
__global__ void calculateRandomNumbers(curandState_t *states, int *frequencies, int *result, int size){
__shared__ int partialCount;
if (threadIdx.x == 0) {
partialCount = 0.0;
}
__syncthreads();
if (threadIdx.x < size) {
float rand1 = curand_uniform(&states[threadIdx.x]);
float rand2 = curand_uniform(&states[threadIdx.x]);
if ((rand1*rand1) + (rand2*rand2) <= 1) {
atomicAdd(&partialCount, 1);
}
atomicAdd(&frequencies[(int)(rand1 * 10)], 1);
atomicAdd(&frequencies[(int)(rand2 * 10)], 1);
__syncthreads();
if (threadIdx.x == 0) {
atomicAdd(&result[0], partialCount);
}
__syncthreads();
}
}
int main (int argc, char *argv[]) {
//-------- Testing parameters --------//
if (argc != 2){
printf("Incorrect number of parameters :(\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
int size = atoi(argv[1]);
if(size < 0){
printf("Negative parameter not allowed. :P\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
//--Initializing variables
int *frequencies, *dev_frequencies;
int *result, *dev_result;
int memorySize = 10*sizeof(int);
srand48(time(NULL));
frequencies = (int *)malloc(memorySize);
result = (int *)malloc(sizeof(int));
result[0] = 0.0;
//--Initializing CUDA memory
cudaMalloc((void **)&dev_frequencies, memorySize);
cudaMalloc((void **)&dev_result, sizeof(int));
cudaMemcpy(dev_frequencies, frequencies, memorySize, cudaMemcpyHostToDevice);
cudaMemcpy(dev_result, result, sizeof(int), cudaMemcpyHostToDevice);
int blockNumber = ceil((float)size/BLOCK_SIZE);
//--Initializing Random States
curandState_t *states;
cudaMalloc((void**) &states, size*sizeof(curandState_t));
initRand<<<blockNumber, BLOCK_SIZE>>>(time(NULL), states);
//--Calculate Pi
calculateRandomNumbers<<<blockNumber, BLOCK_SIZE>>>(states, dev_frequencies, dev_result, size);
cudaThreadSynchronize();
cudaMemcpy(frequencies, dev_frequencies, memorySize, cudaMemcpyDeviceToHost);
cudaMemcpy(result, dev_result, sizeof(float), cudaMemcpyDeviceToHost);
float pi = (((float)result[0] / (float)size)*4);
printf("Pi approximated value is: %f\n", pi);
cudaFree(frequencies); cudaFree(dev_result);
//-- Saving matrices to file
saveFrequenciesToFile(frequencies, size);
free(frequencies); free(result);
exit(0);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include <time.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#define BLOCK_SIZE 768
//-------- Save values to dat file --------//
void saveFrequenciesToFile(int *array, int size){
FILE *filePointer = fopen("freq.dat", "w");
for (int i = 0; i < 10; i++) {
fprintf(filePointer, "0.%d, %f\n", i, (float)array[i]/(size*2));
}
}
////-------- Random initialization --------//
__global__ void initRand(unsigned int seed, hiprandState_t *states) {
hiprand_init(seed, threadIdx.x, 0, &states[threadIdx.x]);
}
//-------- Calculate random --------//
__global__ void calculateRandomNumbers(hiprandState_t *states, int *frequencies, int *result, int size){
__shared__ int partialCount;
if (threadIdx.x == 0) {
partialCount = 0.0;
}
__syncthreads();
if (threadIdx.x < size) {
float rand1 = hiprand_uniform(&states[threadIdx.x]);
float rand2 = hiprand_uniform(&states[threadIdx.x]);
if ((rand1*rand1) + (rand2*rand2) <= 1) {
atomicAdd(&partialCount, 1);
}
atomicAdd(&frequencies[(int)(rand1 * 10)], 1);
atomicAdd(&frequencies[(int)(rand2 * 10)], 1);
__syncthreads();
if (threadIdx.x == 0) {
atomicAdd(&result[0], partialCount);
}
__syncthreads();
}
}
int main (int argc, char *argv[]) {
//-------- Testing parameters --------//
if (argc != 2){
printf("Incorrect number of parameters :(\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
int size = atoi(argv[1]);
if(size < 0){
printf("Negative parameter not allowed. :P\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
//--Initializing variables
int *frequencies, *dev_frequencies;
int *result, *dev_result;
int memorySize = 10*sizeof(int);
srand48(time(NULL));
frequencies = (int *)malloc(memorySize);
result = (int *)malloc(sizeof(int));
result[0] = 0.0;
//--Initializing CUDA memory
hipMalloc((void **)&dev_frequencies, memorySize);
hipMalloc((void **)&dev_result, sizeof(int));
hipMemcpy(dev_frequencies, frequencies, memorySize, hipMemcpyHostToDevice);
hipMemcpy(dev_result, result, sizeof(int), hipMemcpyHostToDevice);
int blockNumber = ceil((float)size/BLOCK_SIZE);
//--Initializing Random States
hiprandState_t *states;
hipMalloc((void**) &states, size*sizeof(hiprandState_t));
initRand<<<blockNumber, BLOCK_SIZE>>>(time(NULL), states);
//--Calculate Pi
calculateRandomNumbers<<<blockNumber, BLOCK_SIZE>>>(states, dev_frequencies, dev_result, size);
hipDeviceSynchronize();
hipMemcpy(frequencies, dev_frequencies, memorySize, hipMemcpyDeviceToHost);
hipMemcpy(result, dev_result, sizeof(float), hipMemcpyDeviceToHost);
float pi = (((float)result[0] / (float)size)*4);
printf("Pi approximated value is: %f\n", pi);
hipFree(frequencies); hipFree(dev_result);
//-- Saving matrices to file
saveFrequenciesToFile(frequencies, size);
free(frequencies); free(result);
exit(0);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include <time.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#define BLOCK_SIZE 768
//-------- Save values to dat file --------//
void saveFrequenciesToFile(int *array, int size){
FILE *filePointer = fopen("freq.dat", "w");
for (int i = 0; i < 10; i++) {
fprintf(filePointer, "0.%d, %f\n", i, (float)array[i]/(size*2));
}
}
////-------- Random initialization --------//
__global__ void initRand(unsigned int seed, hiprandState_t *states) {
hiprand_init(seed, threadIdx.x, 0, &states[threadIdx.x]);
}
//-------- Calculate random --------//
__global__ void calculateRandomNumbers(hiprandState_t *states, int *frequencies, int *result, int size){
__shared__ int partialCount;
if (threadIdx.x == 0) {
partialCount = 0.0;
}
__syncthreads();
if (threadIdx.x < size) {
float rand1 = hiprand_uniform(&states[threadIdx.x]);
float rand2 = hiprand_uniform(&states[threadIdx.x]);
if ((rand1*rand1) + (rand2*rand2) <= 1) {
atomicAdd(&partialCount, 1);
}
atomicAdd(&frequencies[(int)(rand1 * 10)], 1);
atomicAdd(&frequencies[(int)(rand2 * 10)], 1);
__syncthreads();
if (threadIdx.x == 0) {
atomicAdd(&result[0], partialCount);
}
__syncthreads();
}
}
int main (int argc, char *argv[]) {
//-------- Testing parameters --------//
if (argc != 2){
printf("Incorrect number of parameters :(\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
int size = atoi(argv[1]);
if(size < 0){
printf("Negative parameter not allowed. :P\n");
printf("Try: \"./MatrixMult <MATRIX SIZE>\"\n");
exit(0);
}
//--Initializing variables
int *frequencies, *dev_frequencies;
int *result, *dev_result;
int memorySize = 10*sizeof(int);
srand48(time(NULL));
frequencies = (int *)malloc(memorySize);
result = (int *)malloc(sizeof(int));
result[0] = 0.0;
//--Initializing CUDA memory
hipMalloc((void **)&dev_frequencies, memorySize);
hipMalloc((void **)&dev_result, sizeof(int));
hipMemcpy(dev_frequencies, frequencies, memorySize, hipMemcpyHostToDevice);
hipMemcpy(dev_result, result, sizeof(int), hipMemcpyHostToDevice);
int blockNumber = ceil((float)size/BLOCK_SIZE);
//--Initializing Random States
hiprandState_t *states;
hipMalloc((void**) &states, size*sizeof(hiprandState_t));
initRand<<<blockNumber, BLOCK_SIZE>>>(time(NULL), states);
//--Calculate Pi
calculateRandomNumbers<<<blockNumber, BLOCK_SIZE>>>(states, dev_frequencies, dev_result, size);
hipDeviceSynchronize();
hipMemcpy(frequencies, dev_frequencies, memorySize, hipMemcpyDeviceToHost);
hipMemcpy(result, dev_result, sizeof(float), hipMemcpyDeviceToHost);
float pi = (((float)result[0] / (float)size)*4);
printf("Pi approximated value is: %f\n", pi);
hipFree(frequencies); hipFree(dev_result);
//-- Saving matrices to file
saveFrequenciesToFile(frequencies, size);
free(frequencies); free(result);
exit(0);
} | .text
.file "MCPi.hip"
.globl _Z21saveFrequenciesToFilePii # -- Begin function _Z21saveFrequenciesToFilePii
.p2align 4, 0x90
.type _Z21saveFrequenciesToFilePii,@function
_Z21saveFrequenciesToFilePii: # @_Z21saveFrequenciesToFilePii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r14
addl %ebp, %ebp
cvtsi2ss %ebp, %xmm0
movss %xmm0, 4(%rsp) # 4-byte Spill
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ssl (%rbx,%r15,4), %xmm0
divss 4(%rsp), %xmm0 # 4-byte Folded Reload
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %esi
movq %r14, %rdi
movl %r15d, %edx
movb $1, %al
callq fprintf
incq %r15
cmpq $10, %r15
jne .LBB0_1
# %bb.2:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z21saveFrequenciesToFilePii, .Lfunc_end0-_Z21saveFrequenciesToFilePii
.cfi_endproc
# -- End function
.globl _Z23__device_stub__initRandjP12hiprandState # -- Begin function _Z23__device_stub__initRandjP12hiprandState
.p2align 4, 0x90
.type _Z23__device_stub__initRandjP12hiprandState,@function
_Z23__device_stub__initRandjP12hiprandState: # @_Z23__device_stub__initRandjP12hiprandState
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movl %edi, 4(%rsp)
movq %rsi, 56(%rsp)
leaq 4(%rsp), %rax
movq %rax, 64(%rsp)
leaq 56(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8initRandjP12hiprandState, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z23__device_stub__initRandjP12hiprandState, .Lfunc_end1-_Z23__device_stub__initRandjP12hiprandState
.cfi_endproc
# -- End function
.globl _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i # -- Begin function _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.p2align 4, 0x90
.type _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i,@function
_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i: # @_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i, .Lfunc_end2-_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0x44400000 # float 768
.LCPI3_1:
.long 0x40800000 # float 4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
cmpl $2, %edi
jne .LBB3_1
# %bb.3:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
testl %ebx, %ebx
jns .LBB3_5
# %bb.4:
movl $.Lstr, %edi
jmp .LBB3_2
.LBB3_1:
movl $.Lstr.2, %edi
.LBB3_2:
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
xorl %edi, %edi
callq exit
.LBB3_5:
movabsq $4294968064, %r12 # imm = 0x100000300
xorl %edi, %edi
callq time
movq %rax, %rdi
callq srand48
movl $40, %edi
callq malloc
movq %rax, %r14
movl $4, %edi
callq malloc
movq %rax, %r15
movl $0, (%rax)
leaq 8(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq %rsp, %rdi
movl $4, %esi
callq hipMalloc
movq 8(%rsp), %rdi
movl $40, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq (%rsp), %rdi
movl $4, %edx
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
cvtsi2ss %ebx, %xmm0
movss %xmm0, 80(%rsp) # 4-byte Spill
divss .LCPI3_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %r13d
movl %ebx, %eax
shlq $4, %rax
leaq (%rax,%rax,2), %rsi
leaq 88(%rsp), %rdi
callq hipMalloc
addq %r12, %r13
addq $-768, %r13 # imm = 0xFD00
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_7
# %bb.6:
xorl %edi, %edi
callq time
movq 88(%rsp), %rcx
movl %eax, 16(%rsp)
movq %rcx, 72(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 72(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z8initRandjP12hiprandState, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_7:
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_9
# %bb.8:
movq 88(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ebx, 84(%rsp)
leaq 72(%rsp), %rax
movq %rax, 96(%rsp)
leaq 64(%rsp), %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rax
movq %rax, 112(%rsp)
leaq 84(%rsp), %rax
movq %rax, 120(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 136(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %edi
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_9:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movl $40, %edx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq (%rsp), %rsi
movl $4, %edx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
cvtsi2ssl (%r15), %xmm0
divss 80(%rsp), %xmm0 # 4-byte Folded Reload
mulss .LCPI3_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq %r14, %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq %r14, %rdi
movl %ebx, %esi
callq _Z21saveFrequenciesToFilePii
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
xorl %edi, %edi
callq exit
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8initRandjP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "freq.dat"
.size .L.str, 9
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "0.%d, %f\n"
.size .L.str.2, 10
.type _Z8initRandjP12hiprandState,@object # @_Z8initRandjP12hiprandState
.section .rodata,"a",@progbits
.globl _Z8initRandjP12hiprandState
.p2align 3, 0x0
_Z8initRandjP12hiprandState:
.quad _Z23__device_stub__initRandjP12hiprandState
.size _Z8initRandjP12hiprandState, 8
.type _Z22calculateRandomNumbersP12hiprandStatePiS1_i,@object # @_Z22calculateRandomNumbersP12hiprandStatePiS1_i
.globl _Z22calculateRandomNumbersP12hiprandStatePiS1_i
.p2align 3, 0x0
_Z22calculateRandomNumbersP12hiprandStatePiS1_i:
.quad _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.size _Z22calculateRandomNumbersP12hiprandStatePiS1_i, 8
.type .L.str.6,@object # @.str.6
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.6:
.asciz "Pi approximated value is: %f\n"
.size .L.str.6, 30
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8initRandjP12hiprandState"
.size .L__unnamed_1, 28
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z22calculateRandomNumbersP12hiprandStatePiS1_i"
.size .L__unnamed_2, 48
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Negative parameter not allowed. :P"
.size .Lstr, 36
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Incorrect number of parameters :("
.size .Lstr.2, 34
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "Try: \"./MatrixMult <MATRIX SIZE>\""
.size .Lstr.3, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__initRandjP12hiprandState
.addrsig_sym _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8initRandjP12hiprandState
.addrsig_sym _Z22calculateRandomNumbersP12hiprandStatePiS1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008d87c_00000000-6_MCPi.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2275:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2275:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "w"
.LC1:
.string "freq.dat"
.LC2:
.string "0.%d, %f\n"
.text
.globl _Z21saveFrequenciesToFilePii
.type _Z21saveFrequenciesToFilePii, @function
_Z21saveFrequenciesToFilePii:
.LFB2271:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $24, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r12
movl %esi, %ebx
leaq .LC0(%rip), %rsi
leaq .LC1(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
addl %ebx, %ebx
pxor %xmm2, %xmm2
cvtsi2ssl %ebx, %xmm2
movss %xmm2, 12(%rsp)
movl $0, %ebx
leaq .LC2(%rip), %r13
.L4:
pxor %xmm0, %xmm0
cvtsi2ssl (%r12,%rbx,4), %xmm0
divss 12(%rsp), %xmm0
cvtss2sd %xmm0, %xmm0
movl %ebx, %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $1, %eax
call __fprintf_chk@PLT
addq $1, %rbx
cmpq $10, %rbx
jne .L4
addq $24, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2271:
.size _Z21saveFrequenciesToFilePii, .-_Z21saveFrequenciesToFilePii
.globl _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
.type _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW, @function
_Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW:
.LFB2297:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 12(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
movq %rsp, %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L11
.L7:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L12
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z8initRandjP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L7
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2297:
.size _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW, .-_Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
.globl _Z8initRandjP17curandStateXORWOW
.type _Z8initRandjP17curandStateXORWOW, @function
_Z8initRandjP17curandStateXORWOW:
.LFB2298:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2298:
.size _Z8initRandjP17curandStateXORWOW, .-_Z8initRandjP17curandStateXORWOW
.globl _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
.type _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i, @function
_Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i:
.LFB2299:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L19
.L15:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L20
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L15
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2299:
.size _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i, .-_Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
.globl _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i
.type _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i, @function
_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i:
.LFB2300:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2300:
.size _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i, .-_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "Incorrect number of parameters :(\n"
.align 8
.LC4:
.string "Try: \"./MatrixMult <MATRIX SIZE>\"\n"
.align 8
.LC5:
.string "Negative parameter not allowed. :P\n"
.section .rodata.str1.1
.LC8:
.string "Pi approximated value is: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2272:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $80, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
cmpl $2, %edi
je .L24
leaq .LC3(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L24:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbx
movl %eax, %r13d
testl %eax, %eax
js .L30
movl $0, %edi
call time@PLT
movq %rax, %rdi
call srand48@PLT
movl $40, %edi
call malloc@PLT
movq %rax, %r12
movl $4, %edi
call malloc@PLT
movq %rax, %rbp
movl $0, (%rax)
leaq 24(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $40, %edx
movq %r12, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4, %edx
movq %rbp, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm1, %xmm1
cvtsi2ssl %ebx, %xmm1
movss %xmm1, 8(%rsp)
movaps %xmm1, %xmm0
divss .LC6(%rip), %xmm0
call ceilf@PLT
movss %xmm0, 12(%rsp)
movslq %ebx, %rsi
imulq $48, %rsi, %rsi
leaq 40(%rsp), %rdi
call cudaMalloc@PLT
movl $768, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
cvttss2sil 12(%rsp), %ebx
movl %ebx, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L26:
movl $768, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl %ebx, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L32
.L27:
call cudaThreadSynchronize@PLT
movl $2, %ecx
movl $40, %edx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4, %edx
movq 32(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
pxor %xmm0, %xmm0
cvtsi2ssl 0(%rbp), %xmm0
divss 8(%rsp), %xmm0
mulss .LC7(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %r12, %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movl %r13d, %esi
movq %r12, %rdi
call _Z21saveFrequenciesToFilePii
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movl $0, %edi
call exit@PLT
.L30:
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %edi
call exit@PLT
.L31:
movq 40(%rsp), %r14
movl $0, %edi
call time@PLT
movq %r14, %rsi
movl %eax, %edi
call _Z46__device_stub__Z8initRandjP17curandStateXORWOWjP17curandStateXORWOW
jmp .L26
.L32:
movl %r13d, %ecx
movq 32(%rsp), %rdx
movq 24(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z66__device_stub__Z22calculateRandomNumbersP17curandStateXORWOWPiS1_iP17curandStateXORWOWPiS1_i
jmp .L27
.cfi_endproc
.LFE2272:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC9:
.string "_Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i"
.align 8
.LC10:
.string "_Z8initRandjP17curandStateXORWOW"
.section .rodata.str1.1
.LC11:
.string "precalc_xorwow_matrix"
.LC12:
.string "precalc_xorwow_offset_matrix"
.LC13:
.string "mrg32k3aM1"
.LC14:
.string "mrg32k3aM2"
.LC15:
.string "mrg32k3aM1SubSeq"
.LC16:
.string "mrg32k3aM2SubSeq"
.LC17:
.string "mrg32k3aM1Seq"
.LC18:
.string "mrg32k3aM2Seq"
.LC19:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2302:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC9(%rip), %rdx
movq %rdx, %rcx
leaq _Z22calculateRandomNumbersP17curandStateXORWOWPiS1_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z8initRandjP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC13(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC16(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC17(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC18(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2302:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC6:
.long 1145044992
.align 4
.LC7:
.long 1082130432
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "MCPi.hip"
.globl _Z21saveFrequenciesToFilePii # -- Begin function _Z21saveFrequenciesToFilePii
.p2align 4, 0x90
.type _Z21saveFrequenciesToFilePii,@function
_Z21saveFrequenciesToFilePii: # @_Z21saveFrequenciesToFilePii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %r14
addl %ebp, %ebp
cvtsi2ss %ebp, %xmm0
movss %xmm0, 4(%rsp) # 4-byte Spill
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ssl (%rbx,%r15,4), %xmm0
divss 4(%rsp), %xmm0 # 4-byte Folded Reload
cvtss2sd %xmm0, %xmm0
movl $.L.str.2, %esi
movq %r14, %rdi
movl %r15d, %edx
movb $1, %al
callq fprintf
incq %r15
cmpq $10, %r15
jne .LBB0_1
# %bb.2:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z21saveFrequenciesToFilePii, .Lfunc_end0-_Z21saveFrequenciesToFilePii
.cfi_endproc
# -- End function
.globl _Z23__device_stub__initRandjP12hiprandState # -- Begin function _Z23__device_stub__initRandjP12hiprandState
.p2align 4, 0x90
.type _Z23__device_stub__initRandjP12hiprandState,@function
_Z23__device_stub__initRandjP12hiprandState: # @_Z23__device_stub__initRandjP12hiprandState
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movl %edi, 4(%rsp)
movq %rsi, 56(%rsp)
leaq 4(%rsp), %rax
movq %rax, 64(%rsp)
leaq 56(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z8initRandjP12hiprandState, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end1:
.size _Z23__device_stub__initRandjP12hiprandState, .Lfunc_end1-_Z23__device_stub__initRandjP12hiprandState
.cfi_endproc
# -- End function
.globl _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i # -- Begin function _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.p2align 4, 0x90
.type _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i,@function
_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i: # @_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i, .Lfunc_end2-_Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI3_0:
.long 0x44400000 # float 768
.LCPI3_1:
.long 0x40800000 # float 4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
cmpl $2, %edi
jne .LBB3_1
# %bb.3:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
testl %ebx, %ebx
jns .LBB3_5
# %bb.4:
movl $.Lstr, %edi
jmp .LBB3_2
.LBB3_1:
movl $.Lstr.2, %edi
.LBB3_2:
callq puts@PLT
movl $.Lstr.3, %edi
callq puts@PLT
xorl %edi, %edi
callq exit
.LBB3_5:
movabsq $4294968064, %r12 # imm = 0x100000300
xorl %edi, %edi
callq time
movq %rax, %rdi
callq srand48
movl $40, %edi
callq malloc
movq %rax, %r14
movl $4, %edi
callq malloc
movq %rax, %r15
movl $0, (%rax)
leaq 8(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq %rsp, %rdi
movl $4, %esi
callq hipMalloc
movq 8(%rsp), %rdi
movl $40, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq (%rsp), %rdi
movl $4, %edx
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
cvtsi2ss %ebx, %xmm0
movss %xmm0, 80(%rsp) # 4-byte Spill
divss .LCPI3_0(%rip), %xmm0
callq ceilf@PLT
cvttss2si %xmm0, %r13d
movl %ebx, %eax
shlq $4, %rax
leaq (%rax,%rax,2), %rsi
leaq 88(%rsp), %rdi
callq hipMalloc
addq %r12, %r13
addq $-768, %r13 # imm = 0xFD00
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_7
# %bb.6:
xorl %edi, %edi
callq time
movq 88(%rsp), %rcx
movl %eax, 16(%rsp)
movq %rcx, 72(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 72(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z8initRandjP12hiprandState, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_7:
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_9
# %bb.8:
movq 88(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movq %rax, 72(%rsp)
movq %rcx, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ebx, 84(%rsp)
leaq 72(%rsp), %rax
movq %rax, 96(%rsp)
leaq 64(%rsp), %rax
movq %rax, 104(%rsp)
leaq 56(%rsp), %rax
movq %rax, 112(%rsp)
leaq 84(%rsp), %rax
movq %rax, 120(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 136(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %edi
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_9:
callq hipDeviceSynchronize
movq 8(%rsp), %rsi
movl $40, %edx
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq (%rsp), %rsi
movl $4, %edx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
xorps %xmm0, %xmm0
cvtsi2ssl (%r15), %xmm0
divss 80(%rsp), %xmm0 # 4-byte Folded Reload
mulss .LCPI3_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq %r14, %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq %r14, %rdi
movl %ebx, %esi
callq _Z21saveFrequenciesToFilePii
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
xorl %edi, %edi
callq exit
.Lfunc_end3:
.size main, .Lfunc_end3-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z8initRandjP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z22calculateRandomNumbersP12hiprandStatePiS1_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "freq.dat"
.size .L.str, 9
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "0.%d, %f\n"
.size .L.str.2, 10
.type _Z8initRandjP12hiprandState,@object # @_Z8initRandjP12hiprandState
.section .rodata,"a",@progbits
.globl _Z8initRandjP12hiprandState
.p2align 3, 0x0
_Z8initRandjP12hiprandState:
.quad _Z23__device_stub__initRandjP12hiprandState
.size _Z8initRandjP12hiprandState, 8
.type _Z22calculateRandomNumbersP12hiprandStatePiS1_i,@object # @_Z22calculateRandomNumbersP12hiprandStatePiS1_i
.globl _Z22calculateRandomNumbersP12hiprandStatePiS1_i
.p2align 3, 0x0
_Z22calculateRandomNumbersP12hiprandStatePiS1_i:
.quad _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.size _Z22calculateRandomNumbersP12hiprandStatePiS1_i, 8
.type .L.str.6,@object # @.str.6
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.6:
.asciz "Pi approximated value is: %f\n"
.size .L.str.6, 30
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z8initRandjP12hiprandState"
.size .L__unnamed_1, 28
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z22calculateRandomNumbersP12hiprandStatePiS1_i"
.size .L__unnamed_2, 48
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Negative parameter not allowed. :P"
.size .Lstr, 36
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Incorrect number of parameters :("
.size .Lstr.2, 34
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "Try: \"./MatrixMult <MATRIX SIZE>\""
.size .Lstr.3, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z23__device_stub__initRandjP12hiprandState
.addrsig_sym _Z37__device_stub__calculateRandomNumbersP12hiprandStatePiS1_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z8initRandjP12hiprandState
.addrsig_sym _Z22calculateRandomNumbersP12hiprandStatePiS1_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <algorithm>
#include <assert.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <sys/time.h>
#include <cuda_runtime.h>
float* d_A = NULL; // Pointer to matrix A in device memory
float* d_x = NULL; // Pointer to vector x in device memory
float* d_y = NULL; // Pointer to result vector y in device memory
double time_memcpy = 0;
double time_compute = 0; // Timers
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on CPU: Policy 1
/////////////////////////////////////////////////////////////////////////
void mv_cpu(float* y, const float* A, const float* x, int n) {
for (int i=0; i<n; i++) {
for (int j=0; j<n; j++) {
y[i] += A[i*n + j] * x[j];
}
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU: Policy 2
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_simple(float* y, float* A, float* x, int n)
{
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int k = 0; k < n; k++) {
temp += A[row*n + k] * x[k];
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU using shared memory: Policy 3
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_shared(float* y, float* A, float* x, int n)
{
extern __shared__ float s_x[];
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int j = 0; j < n; j += blockDim.x) {
if (j + threadIdx.x < n) {
s_x[threadIdx.x] = x[j + threadIdx.x];
}
__syncthreads();
for (int k = j; k < min(n, j + blockDim.x); k++) {
temp += A[row*n + k] * s_x[k - j];
}
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Allocate device memory and copy from host to device memory
/////////////////////////////////////////////////////////////////////////
void copy_host_to_device(float* A, float* x, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
cudaMalloc((void**) &d_A, sizeof(float) * n * n);
cudaMalloc((void**) &d_x, sizeof(float) * n);
cudaMalloc((void**) &d_y, sizeof(float) * n);
assert(d_A);
assert(d_x);
assert(d_y);
cudaMemcpy(d_A, A, sizeof(float) * n * n, cudaMemcpyHostToDevice);
cudaMemcpy(d_x, x, sizeof(float) * n, cudaMemcpyHostToDevice);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Copy result from device to host memory and free device memory
/////////////////////////////////////////////////////////////////////////
void copy_device_to_host(float* y, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
cudaMemcpy(y, d_y, sizeof(float) * n, cudaMemcpyDeviceToHost);
cudaFree(d_A);
cudaFree(d_x);
cudaFree(d_y);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Program main
/////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
if(argc != 5) {printf("Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n") ; exit(2) ;}
int N = atoi(argv[1]) ; // array size
int block_size = atoi(argv[2]) ; // size of thread block
int policy = atoi(argv[3]) ; // 1, 2 or 3
bool debug = (!strcmp(argv[4], "debug")) ? true : false;
if(debug) {
printf("\n Array size = %d , block size = %d and policy = %d\n ", N, block_size, policy);
}
// set seed for rand()
srand(2020);
// allocate host memory for matrix A and vector x
int matrix_size = N * N;
float* h_A = (float*)malloc(sizeof(float) * matrix_size);
float* h_x = (float*)malloc(sizeof(float) * N);
// randomly initialize host memory
for (int i = 0; i < matrix_size; ++i){
h_A[i] = rand() / (float)RAND_MAX;
}
for (int i = 0; i < N; i++){
h_x[i] = rand() / (float)RAND_MAX;
}
// allocate host memory for the result
float* h_y = (float*)malloc(sizeof(float) * N);
for (int i = 0; i < N; i++) {
h_y[i] = 0.0;
}
//call the relevant policy
if(policy==1){ //CPU baseline
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
mv_cpu(h_y, h_A, h_x, N);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
}
else if(policy==2){ //CUDA MV multiplication
// call mv_cuda_simple <<< >>> ( )
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_simple <<<nblocks, block_size>>> (d_y, d_A, d_x, N);
cudaDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
else if(policy==3){ //CUDA MV multiplication with shared memory
// call mv_cuda_shared<<<grid, block_size >>>(d_y, d_A, d_x, N);
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_shared <<<nblocks, block_size, sizeof(float) * block_size>>> (d_y, d_A, d_x, N);
cudaDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
if (debug) {
// print selected results (for checking correctness) and print time elapsed
for (int i=0; i<N; i+=N/10) { printf(" %10.6f",h_y[i]); }
printf("\n");
}
printf("Memcpy Time: %f seconds\n", time_memcpy);
printf("Compute Time: %f seconds\n", time_compute);
// clean up memory allocated
free(h_A);
free(h_x);
free(h_y);
cudaDeviceReset();
} | .file "tmpxft_0004b61c_00000000-6_mat_vec_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3929:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3929:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6mv_cpuPfPKfS1_i
.type _Z6mv_cpuPfPKfS1_i, @function
_Z6mv_cpuPfPKfS1_i:
.LFB3923:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L3
movq %rdi, %r8
movslq %ecx, %rcx
salq $2, %rcx
addq %rcx, %rdi
.L5:
movl $0, %eax
.L6:
movss (%rsi,%rax), %xmm0
mulss (%rdx,%rax), %xmm0
addss (%r8), %xmm0
movss %xmm0, (%r8)
addq $4, %rax
cmpq %rcx, %rax
jne .L6
addq $4, %r8
addq %rcx, %rsi
cmpq %rdi, %r8
jne .L5
.L3:
ret
.cfi_endproc
.LFE3923:
.size _Z6mv_cpuPfPKfS1_i, .-_Z6mv_cpuPfPKfS1_i
.globl _Z19copy_host_to_devicePfS_i
.type _Z19copy_host_to_devicePfS_i, @function
_Z19copy_host_to_devicePfS_i:
.LFB3924:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r13
movq %rsi, %r12
movl %edx, %ebx
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %r15
leaq 32(%rsp), %r14
movq %r15, %rsi
movq %r14, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, 8(%rsp)
movslq %ebx, %rbx
movq %rbx, %rbp
imulq %rbx, %rbp
salq $2, %rbp
movq %rbp, %rsi
leaq d_A(%rip), %rdi
call cudaMalloc@PLT
salq $2, %rbx
movq %rbx, %rsi
leaq d_x(%rip), %rdi
call cudaMalloc@PLT
movq %rbx, %rsi
leaq d_y(%rip), %rdi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r13, %rsi
movq d_A(%rip), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq d_x(%rip), %rdi
call cudaMemcpy@PLT
movq %r15, %rsi
movq %r14, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd 8(%rsp), %xmm0
addsd time_memcpy(%rip), %xmm0
movsd %xmm0, time_memcpy(%rip)
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L11
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3924:
.size _Z19copy_host_to_devicePfS_i, .-_Z19copy_host_to_devicePfS_i
.globl _Z19copy_device_to_hostPfi
.type _Z19copy_device_to_hostPfi, @function
_Z19copy_device_to_hostPfi:
.LFB3925:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $72, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %rbp
movl %esi, %ebx
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %r13
leaq 32(%rsp), %r12
movq %r13, %rsi
movq %r12, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, 8(%rsp)
movslq %ebx, %rdx
salq $2, %rdx
movl $2, %ecx
movq d_y(%rip), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq d_A(%rip), %rdi
call cudaFree@PLT
movq d_x(%rip), %rdi
call cudaFree@PLT
movq d_y(%rip), %rdi
call cudaFree@PLT
movq %r13, %rsi
movq %r12, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd 8(%rsp), %xmm0
addsd time_memcpy(%rip), %xmm0
movsd %xmm0, time_memcpy(%rip)
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3925:
.size _Z19copy_device_to_hostPfi, .-_Z19copy_device_to_hostPfi
.globl _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
.type _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i, @function
_Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i:
.LFB3951:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L20
.L16:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L21
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mv_cuda_simplePfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3951:
.size _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i, .-_Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
.globl _Z14mv_cuda_simplePfS_S_i
.type _Z14mv_cuda_simplePfS_S_i, @function
_Z14mv_cuda_simplePfS_S_i:
.LFB3952:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3952:
.size _Z14mv_cuda_simplePfS_S_i, .-_Z14mv_cuda_simplePfS_S_i
.globl _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
.type _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i, @function
_Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i:
.LFB3953:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mv_cuda_sharedPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3953:
.size _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i, .-_Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
.globl _Z14mv_cuda_sharedPfS_S_i
.type _Z14mv_cuda_sharedPfS_S_i, @function
_Z14mv_cuda_sharedPfS_S_i:
.LFB3954:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3954:
.size _Z14mv_cuda_sharedPfS_S_i, .-_Z14mv_cuda_sharedPfS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "debug"
.section .rodata.str1.8
.align 8
.LC3:
.string "\n Array size = %d , block size = %d and policy = %d\n "
.section .rodata.str1.1
.LC6:
.string " %10.6f"
.LC7:
.string "\n"
.LC8:
.string "Memcpy Time: %f seconds\n"
.LC9:
.string "Compute Time: %f seconds\n"
.text
.globl main
.type main, @function
main:
.LFB3926:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $5, %edi
jne .L56
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movl %eax, %r12d
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 40(%rsp)
movl %eax, 36(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, (%rsp)
movq 32(%rbx), %rdi
leaq .LC2(%rip), %rsi
call strcmp@PLT
movl %eax, %ebx
testl %eax, %eax
je .L57
.L34:
movl $2020, %edi
call srand@PLT
movl %r14d, %ebp
imull %r14d, %ebp
movslq %ebp, %rax
leaq 0(,%rax,4), %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
movq %rax, 24(%rsp)
movslq %r14d, %rax
salq $2, %rax
movq %rax, 16(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
testl %ebp, %ebp
jle .L35
movq %r15, %rbp
addq %r15, %r13
.L36:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC4(%rip), %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r13, %rbp
jne .L36
.L35:
testl %r14d, %r14d
jle .L37
movq 8(%rsp), %rdx
movq %rdx, %rbp
leal -1(%r14), %eax
leaq 4(,%rax,4), %r13
leaq 0(%r13,%rdx), %r15
.L38:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC4(%rip), %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r15, %rbp
jne .L38
movq 16(%rsp), %rdi
call malloc@PLT
movq %rax, 16(%rsp)
addq %rax, %r13
.L39:
movl $0x00000000, (%rax)
addq $4, %rax
cmpq %r13, %rax
jne .L39
.L48:
cmpl $1, (%rsp)
je .L58
cmpl $2, (%rsp)
je .L59
cmpl $3, (%rsp)
je .L60
.L41:
testl %ebx, %ebx
jne .L45
testl %r14d, %r14d
jle .L46
movl $10, %ecx
movl %r12d, %eax
cltd
idivl %ecx
movl %eax, %r14d
movslq %eax, %r13
salq $2, %r13
movq 16(%rsp), %rbp
leaq .LC6(%rip), %r15
.L47:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movq %r15, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addl %r14d, %ebx
addq %r13, %rbp
cmpl %r12d, %ebx
jl .L47
.L46:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L45:
movsd time_memcpy(%rip), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movsd time_compute(%rip), %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 24(%rsp), %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L61
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L56:
.cfi_restore_state
leaq .LC1(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $2, %edi
call exit@PLT
.L57:
movl (%rsp), %r8d
movl 36(%rsp), %ecx
movl %r14d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L34
.L58:
leaq 48(%rsp), %rbp
leaq 80(%rsp), %r13
movq %rbp, %rsi
movq %r13, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movl %r12d, %ecx
movq 8(%rsp), %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z6mv_cpuPfPKfS1_i
movq %rbp, %rsi
movq %r13, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
jmp .L41
.L59:
movl %r12d, %edx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z19copy_host_to_devicePfS_i
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movq 40(%rsp), %rax
movl %eax, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
leal -1(%r14,%rax), %eax
cltd
idivl 36(%rsp)
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L62
.L43:
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
movl %r12d, %esi
movq 16(%rsp), %rdi
call _Z19copy_device_to_hostPfi
jmp .L41
.L62:
movl %r12d, %ecx
movq d_x(%rip), %rdx
movq d_A(%rip), %rsi
movq d_y(%rip), %rdi
call _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
jmp .L43
.L60:
movl %r12d, %edx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z19copy_host_to_devicePfS_i
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movq 40(%rsp), %rcx
movl %ecx, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
leal -1(%r14,%rcx), %eax
cltd
idivl 36(%rsp)
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movslq %ecx, %rax
movl $0, %r9d
leaq 0(,%rax,4), %r8
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L63
.L44:
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
movl %r12d, %esi
movq 16(%rsp), %rdi
call _Z19copy_device_to_hostPfi
jmp .L41
.L63:
movl %r12d, %ecx
movq d_x(%rip), %rdx
movq d_A(%rip), %rsi
movq d_y(%rip), %rdi
call _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
jmp .L44
.L37:
movq 16(%rsp), %rdi
call malloc@PLT
movq %rax, 16(%rsp)
jmp .L48
.L61:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3926:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z14mv_cuda_sharedPfS_S_i"
.LC11:
.string "_Z14mv_cuda_simplePfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3956:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mv_cuda_sharedPfS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mv_cuda_simplePfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3956:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl time_compute
.bss
.align 8
.type time_compute, @object
.size time_compute, 8
time_compute:
.zero 8
.globl time_memcpy
.align 8
.type time_memcpy, @object
.size time_memcpy, 8
time_memcpy:
.zero 8
.globl d_y
.align 8
.type d_y, @object
.size d_y, 8
d_y:
.zero 8
.globl d_x
.align 8
.type d_x, @object
.size d_x, 8
d_x:
.zero 8
.globl d_A
.align 8
.type d_A, @object
.size d_A, 8
d_A:
.zero 8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1093567616
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 805306368
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <algorithm>
#include <assert.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <sys/time.h>
#include <cuda_runtime.h>
float* d_A = NULL; // Pointer to matrix A in device memory
float* d_x = NULL; // Pointer to vector x in device memory
float* d_y = NULL; // Pointer to result vector y in device memory
double time_memcpy = 0;
double time_compute = 0; // Timers
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on CPU: Policy 1
/////////////////////////////////////////////////////////////////////////
void mv_cpu(float* y, const float* A, const float* x, int n) {
for (int i=0; i<n; i++) {
for (int j=0; j<n; j++) {
y[i] += A[i*n + j] * x[j];
}
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU: Policy 2
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_simple(float* y, float* A, float* x, int n)
{
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int k = 0; k < n; k++) {
temp += A[row*n + k] * x[k];
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU using shared memory: Policy 3
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_shared(float* y, float* A, float* x, int n)
{
extern __shared__ float s_x[];
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int j = 0; j < n; j += blockDim.x) {
if (j + threadIdx.x < n) {
s_x[threadIdx.x] = x[j + threadIdx.x];
}
__syncthreads();
for (int k = j; k < min(n, j + blockDim.x); k++) {
temp += A[row*n + k] * s_x[k - j];
}
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Allocate device memory and copy from host to device memory
/////////////////////////////////////////////////////////////////////////
void copy_host_to_device(float* A, float* x, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
cudaMalloc((void**) &d_A, sizeof(float) * n * n);
cudaMalloc((void**) &d_x, sizeof(float) * n);
cudaMalloc((void**) &d_y, sizeof(float) * n);
assert(d_A);
assert(d_x);
assert(d_y);
cudaMemcpy(d_A, A, sizeof(float) * n * n, cudaMemcpyHostToDevice);
cudaMemcpy(d_x, x, sizeof(float) * n, cudaMemcpyHostToDevice);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Copy result from device to host memory and free device memory
/////////////////////////////////////////////////////////////////////////
void copy_device_to_host(float* y, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
cudaMemcpy(y, d_y, sizeof(float) * n, cudaMemcpyDeviceToHost);
cudaFree(d_A);
cudaFree(d_x);
cudaFree(d_y);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Program main
/////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
if(argc != 5) {printf("Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n") ; exit(2) ;}
int N = atoi(argv[1]) ; // array size
int block_size = atoi(argv[2]) ; // size of thread block
int policy = atoi(argv[3]) ; // 1, 2 or 3
bool debug = (!strcmp(argv[4], "debug")) ? true : false;
if(debug) {
printf("\n Array size = %d , block size = %d and policy = %d\n ", N, block_size, policy);
}
// set seed for rand()
srand(2020);
// allocate host memory for matrix A and vector x
int matrix_size = N * N;
float* h_A = (float*)malloc(sizeof(float) * matrix_size);
float* h_x = (float*)malloc(sizeof(float) * N);
// randomly initialize host memory
for (int i = 0; i < matrix_size; ++i){
h_A[i] = rand() / (float)RAND_MAX;
}
for (int i = 0; i < N; i++){
h_x[i] = rand() / (float)RAND_MAX;
}
// allocate host memory for the result
float* h_y = (float*)malloc(sizeof(float) * N);
for (int i = 0; i < N; i++) {
h_y[i] = 0.0;
}
//call the relevant policy
if(policy==1){ //CPU baseline
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
mv_cpu(h_y, h_A, h_x, N);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
}
else if(policy==2){ //CUDA MV multiplication
// call mv_cuda_simple <<< >>> ( )
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_simple <<<nblocks, block_size>>> (d_y, d_A, d_x, N);
cudaDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
else if(policy==3){ //CUDA MV multiplication with shared memory
// call mv_cuda_shared<<<grid, block_size >>>(d_y, d_A, d_x, N);
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_shared <<<nblocks, block_size, sizeof(float) * block_size>>> (d_y, d_A, d_x, N);
cudaDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
if (debug) {
// print selected results (for checking correctness) and print time elapsed
for (int i=0; i<N; i+=N/10) { printf(" %10.6f",h_y[i]); }
printf("\n");
}
printf("Memcpy Time: %f seconds\n", time_memcpy);
printf("Compute Time: %f seconds\n", time_compute);
// clean up memory allocated
free(h_A);
free(h_x);
free(h_y);
cudaDeviceReset();
} | #include <algorithm>
#include <assert.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
float* d_A = NULL; // Pointer to matrix A in device memory
float* d_x = NULL; // Pointer to vector x in device memory
float* d_y = NULL; // Pointer to result vector y in device memory
double time_memcpy = 0;
double time_compute = 0; // Timers
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on CPU: Policy 1
/////////////////////////////////////////////////////////////////////////
void mv_cpu(float* y, const float* A, const float* x, int n) {
for (int i=0; i<n; i++) {
for (int j=0; j<n; j++) {
y[i] += A[i*n + j] * x[j];
}
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU: Policy 2
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_simple(float* y, float* A, float* x, int n)
{
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int k = 0; k < n; k++) {
temp += A[row*n + k] * x[k];
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU using shared memory: Policy 3
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_shared(float* y, float* A, float* x, int n)
{
extern __shared__ float s_x[];
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int j = 0; j < n; j += blockDim.x) {
if (j + threadIdx.x < n) {
s_x[threadIdx.x] = x[j + threadIdx.x];
}
__syncthreads();
for (int k = j; k < min(n, j + blockDim.x); k++) {
temp += A[row*n + k] * s_x[k - j];
}
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Allocate device memory and copy from host to device memory
/////////////////////////////////////////////////////////////////////////
void copy_host_to_device(float* A, float* x, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMalloc((void**) &d_A, sizeof(float) * n * n);
hipMalloc((void**) &d_x, sizeof(float) * n);
hipMalloc((void**) &d_y, sizeof(float) * n);
assert(d_A);
assert(d_x);
assert(d_y);
hipMemcpy(d_A, A, sizeof(float) * n * n, hipMemcpyHostToDevice);
hipMemcpy(d_x, x, sizeof(float) * n, hipMemcpyHostToDevice);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Copy result from device to host memory and free device memory
/////////////////////////////////////////////////////////////////////////
void copy_device_to_host(float* y, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMemcpy(y, d_y, sizeof(float) * n, hipMemcpyDeviceToHost);
hipFree(d_A);
hipFree(d_x);
hipFree(d_y);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Program main
/////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
if(argc != 5) {printf("Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n") ; exit(2) ;}
int N = atoi(argv[1]) ; // array size
int block_size = atoi(argv[2]) ; // size of thread block
int policy = atoi(argv[3]) ; // 1, 2 or 3
bool debug = (!strcmp(argv[4], "debug")) ? true : false;
if(debug) {
printf("\n Array size = %d , block size = %d and policy = %d\n ", N, block_size, policy);
}
// set seed for rand()
srand(2020);
// allocate host memory for matrix A and vector x
int matrix_size = N * N;
float* h_A = (float*)malloc(sizeof(float) * matrix_size);
float* h_x = (float*)malloc(sizeof(float) * N);
// randomly initialize host memory
for (int i = 0; i < matrix_size; ++i){
h_A[i] = rand() / (float)RAND_MAX;
}
for (int i = 0; i < N; i++){
h_x[i] = rand() / (float)RAND_MAX;
}
// allocate host memory for the result
float* h_y = (float*)malloc(sizeof(float) * N);
for (int i = 0; i < N; i++) {
h_y[i] = 0.0;
}
//call the relevant policy
if(policy==1){ //CPU baseline
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
mv_cpu(h_y, h_A, h_x, N);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
}
else if(policy==2){ //CUDA MV multiplication
// call mv_cuda_simple <<< >>> ( )
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_simple <<<nblocks, block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
else if(policy==3){ //CUDA MV multiplication with shared memory
// call mv_cuda_shared<<<grid, block_size >>>(d_y, d_A, d_x, N);
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_shared <<<nblocks, block_size, sizeof(float) * block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
if (debug) {
// print selected results (for checking correctness) and print time elapsed
for (int i=0; i<N; i+=N/10) { printf(" %10.6f",h_y[i]); }
printf("\n");
}
printf("Memcpy Time: %f seconds\n", time_memcpy);
printf("Compute Time: %f seconds\n", time_compute);
// clean up memory allocated
free(h_A);
free(h_x);
free(h_y);
hipDeviceReset();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <algorithm>
#include <assert.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
float* d_A = NULL; // Pointer to matrix A in device memory
float* d_x = NULL; // Pointer to vector x in device memory
float* d_y = NULL; // Pointer to result vector y in device memory
double time_memcpy = 0;
double time_compute = 0; // Timers
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on CPU: Policy 1
/////////////////////////////////////////////////////////////////////////
void mv_cpu(float* y, const float* A, const float* x, int n) {
for (int i=0; i<n; i++) {
for (int j=0; j<n; j++) {
y[i] += A[i*n + j] * x[j];
}
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU: Policy 2
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_simple(float* y, float* A, float* x, int n)
{
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int k = 0; k < n; k++) {
temp += A[row*n + k] * x[k];
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU using shared memory: Policy 3
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_shared(float* y, float* A, float* x, int n)
{
extern __shared__ float s_x[];
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int j = 0; j < n; j += blockDim.x) {
if (j + threadIdx.x < n) {
s_x[threadIdx.x] = x[j + threadIdx.x];
}
__syncthreads();
for (int k = j; k < min(n, j + blockDim.x); k++) {
temp += A[row*n + k] * s_x[k - j];
}
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Allocate device memory and copy from host to device memory
/////////////////////////////////////////////////////////////////////////
void copy_host_to_device(float* A, float* x, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMalloc((void**) &d_A, sizeof(float) * n * n);
hipMalloc((void**) &d_x, sizeof(float) * n);
hipMalloc((void**) &d_y, sizeof(float) * n);
assert(d_A);
assert(d_x);
assert(d_y);
hipMemcpy(d_A, A, sizeof(float) * n * n, hipMemcpyHostToDevice);
hipMemcpy(d_x, x, sizeof(float) * n, hipMemcpyHostToDevice);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Copy result from device to host memory and free device memory
/////////////////////////////////////////////////////////////////////////
void copy_device_to_host(float* y, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMemcpy(y, d_y, sizeof(float) * n, hipMemcpyDeviceToHost);
hipFree(d_A);
hipFree(d_x);
hipFree(d_y);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Program main
/////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
if(argc != 5) {printf("Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n") ; exit(2) ;}
int N = atoi(argv[1]) ; // array size
int block_size = atoi(argv[2]) ; // size of thread block
int policy = atoi(argv[3]) ; // 1, 2 or 3
bool debug = (!strcmp(argv[4], "debug")) ? true : false;
if(debug) {
printf("\n Array size = %d , block size = %d and policy = %d\n ", N, block_size, policy);
}
// set seed for rand()
srand(2020);
// allocate host memory for matrix A and vector x
int matrix_size = N * N;
float* h_A = (float*)malloc(sizeof(float) * matrix_size);
float* h_x = (float*)malloc(sizeof(float) * N);
// randomly initialize host memory
for (int i = 0; i < matrix_size; ++i){
h_A[i] = rand() / (float)RAND_MAX;
}
for (int i = 0; i < N; i++){
h_x[i] = rand() / (float)RAND_MAX;
}
// allocate host memory for the result
float* h_y = (float*)malloc(sizeof(float) * N);
for (int i = 0; i < N; i++) {
h_y[i] = 0.0;
}
//call the relevant policy
if(policy==1){ //CPU baseline
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
mv_cpu(h_y, h_A, h_x, N);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
}
else if(policy==2){ //CUDA MV multiplication
// call mv_cuda_simple <<< >>> ( )
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_simple <<<nblocks, block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
else if(policy==3){ //CUDA MV multiplication with shared memory
// call mv_cuda_shared<<<grid, block_size >>>(d_y, d_A, d_x, N);
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_shared <<<nblocks, block_size, sizeof(float) * block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
if (debug) {
// print selected results (for checking correctness) and print time elapsed
for (int i=0; i<N; i+=N/10) { printf(" %10.6f",h_y[i]); }
printf("\n");
}
printf("Memcpy Time: %f seconds\n", time_memcpy);
printf("Compute Time: %f seconds\n", time_compute);
// clean up memory allocated
free(h_A);
free(h_x);
free(h_y);
hipDeviceReset();
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14mv_cuda_simplePfS_S_i
.globl _Z14mv_cuda_simplePfS_S_i
.p2align 8
.type _Z14mv_cuda_simplePfS_S_i,@function
_Z14mv_cuda_simplePfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x8
v_mul_lo_u32 v2, v1, s2
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:
global_load_b32 v4, v[2:3], off
s_load_b32 s3, s[6:7], 0x0
v_add_co_u32 v2, vcc_lo, v2, 4
s_add_i32 s2, s2, -1
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmp_eq_u32 s2, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v0, s3, v4
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v0, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14mv_cuda_simplePfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 5
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14mv_cuda_simplePfS_S_i, .Lfunc_end0-_Z14mv_cuda_simplePfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z14mv_cuda_sharedPfS_S_i
.globl _Z14mv_cuda_sharedPfS_S_i
.p2align 8
.type _Z14mv_cuda_sharedPfS_S_i,@function
_Z14mv_cuda_sharedPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s2, 0xffff
s_mov_b32 s2, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB1_12
s_cmp_lt_i32 s3, 1
s_mov_b32 s9, 1
s_cbranch_scc1 .LBB1_10
v_cvt_f64_i32_e32 v[2:3], s3
s_load_b128 s[4:7], s[0:1], 0x8
v_mul_lo_u32 v4, v1, s3
v_lshl_add_u32 v12, v0, 2, 0
v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v11, 0
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_4)
v_max_f64 v[2:3], v[2:3], v[2:3]
.LBB1_3:
v_add_nc_u32_e32 v5, s2, v0
s_mov_b32 s10, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s3, v5
s_cbranch_execz .LBB1_5
v_lshlrev_b64 v[7:8], 2, v[5:6]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v5, v[7:8], off
s_waitcnt vmcnt(0)
ds_store_b32 v12, v5
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s10
s_add_i32 s10, s2, s8
v_cvt_f64_i32_e32 v[9:10], s2
v_cvt_f64_u32_e32 v[7:8], s10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_min_f64 v[7:8], v[2:3], v[7:8]
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ngt_f64_e32 vcc_lo, v[7:8], v[9:10]
s_cbranch_vccnz .LBB1_8
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s11, 0
s_mov_b32 s12, s9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[9:10], 2, v[4:5]
v_add_co_u32 v9, vcc_lo, s4, v9
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
.LBB1_7:
global_load_b32 v5, v[9:10], off
v_cvt_f64_i32_e32 v[13:14], s12
v_add_co_u32 v9, s2, v9, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v10, s2, 0, v10, s2
s_add_i32 s12, s12, 1
v_cmp_ngt_f64_e32 vcc_lo, v[7:8], v[13:14]
v_mov_b32_e32 v13, s11
s_add_i32 s11, s11, 4
ds_load_b32 v13, v13
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v11, v5, v13
s_cbranch_vccz .LBB1_7
.LBB1_8:
v_add_nc_u32_e32 v4, s8, v4
s_add_i32 s9, s9, s8
s_cmp_lt_i32 s10, s3
s_cbranch_scc0 .LBB1_11
s_mov_b32 s2, s10
s_branch .LBB1_3
.LBB1_10:
v_mov_b32_e32 v11, 0
.LBB1_11:
s_load_b64 s[0:1], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v11, off
.LBB1_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14mv_cuda_sharedPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z14mv_cuda_sharedPfS_S_i, .Lfunc_end1-_Z14mv_cuda_sharedPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14mv_cuda_simplePfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14mv_cuda_simplePfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 5
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
- .offset: 152
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14mv_cuda_sharedPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14mv_cuda_sharedPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <algorithm>
#include <assert.h>
#include <iostream>
#include <math.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
float* d_A = NULL; // Pointer to matrix A in device memory
float* d_x = NULL; // Pointer to vector x in device memory
float* d_y = NULL; // Pointer to result vector y in device memory
double time_memcpy = 0;
double time_compute = 0; // Timers
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on CPU: Policy 1
/////////////////////////////////////////////////////////////////////////
void mv_cpu(float* y, const float* A, const float* x, int n) {
for (int i=0; i<n; i++) {
for (int j=0; j<n; j++) {
y[i] += A[i*n + j] * x[j];
}
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU: Policy 2
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_simple(float* y, float* A, float* x, int n)
{
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int k = 0; k < n; k++) {
temp += A[row*n + k] * x[k];
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Matrix-vector Multiplication on GPU using shared memory: Policy 3
/////////////////////////////////////////////////////////////////////////
__global__ void mv_cuda_shared(float* y, float* A, float* x, int n)
{
extern __shared__ float s_x[];
int row = blockIdx.x * blockDim.x + threadIdx.x;
if (row < n) {
float temp = 0;
for (int j = 0; j < n; j += blockDim.x) {
if (j + threadIdx.x < n) {
s_x[threadIdx.x] = x[j + threadIdx.x];
}
__syncthreads();
for (int k = j; k < min(n, j + blockDim.x); k++) {
temp += A[row*n + k] * s_x[k - j];
}
}
y[row] = temp;
}
}
/////////////////////////////////////////////////////////////////////////
// Allocate device memory and copy from host to device memory
/////////////////////////////////////////////////////////////////////////
void copy_host_to_device(float* A, float* x, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMalloc((void**) &d_A, sizeof(float) * n * n);
hipMalloc((void**) &d_x, sizeof(float) * n);
hipMalloc((void**) &d_y, sizeof(float) * n);
assert(d_A);
assert(d_x);
assert(d_y);
hipMemcpy(d_A, A, sizeof(float) * n * n, hipMemcpyHostToDevice);
hipMemcpy(d_x, x, sizeof(float) * n, hipMemcpyHostToDevice);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Copy result from device to host memory and free device memory
/////////////////////////////////////////////////////////////////////////
void copy_device_to_host(float* y, int n)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
hipMemcpy(y, d_y, sizeof(float) * n, hipMemcpyDeviceToHost);
hipFree(d_A);
hipFree(d_x);
hipFree(d_y);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_memcpy += time_end - time_start;
}
/////////////////////////////////////////////////////////////////////////
// Program main
/////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv)
{
double time_start, time_end;
struct timeval tv;
struct timezone tz;
if(argc != 5) {printf("Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n") ; exit(2) ;}
int N = atoi(argv[1]) ; // array size
int block_size = atoi(argv[2]) ; // size of thread block
int policy = atoi(argv[3]) ; // 1, 2 or 3
bool debug = (!strcmp(argv[4], "debug")) ? true : false;
if(debug) {
printf("\n Array size = %d , block size = %d and policy = %d\n ", N, block_size, policy);
}
// set seed for rand()
srand(2020);
// allocate host memory for matrix A and vector x
int matrix_size = N * N;
float* h_A = (float*)malloc(sizeof(float) * matrix_size);
float* h_x = (float*)malloc(sizeof(float) * N);
// randomly initialize host memory
for (int i = 0; i < matrix_size; ++i){
h_A[i] = rand() / (float)RAND_MAX;
}
for (int i = 0; i < N; i++){
h_x[i] = rand() / (float)RAND_MAX;
}
// allocate host memory for the result
float* h_y = (float*)malloc(sizeof(float) * N);
for (int i = 0; i < N; i++) {
h_y[i] = 0.0;
}
//call the relevant policy
if(policy==1){ //CPU baseline
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
mv_cpu(h_y, h_A, h_x, N);
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
}
else if(policy==2){ //CUDA MV multiplication
// call mv_cuda_simple <<< >>> ( )
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_simple <<<nblocks, block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
else if(policy==3){ //CUDA MV multiplication with shared memory
// call mv_cuda_shared<<<grid, block_size >>>(d_y, d_A, d_x, N);
copy_host_to_device(h_A, h_x, N);
gettimeofday (&tv , &tz);
time_start = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
int nblocks = (N + block_size - 1) / block_size;
mv_cuda_shared <<<nblocks, block_size, sizeof(float) * block_size>>> (d_y, d_A, d_x, N);
hipDeviceSynchronize();
gettimeofday (&tv , &tz);
time_end = (double)tv.tv_sec + (double)tv.tv_usec / 1000000.0;
time_compute = time_end - time_start;
copy_device_to_host(h_y, N);
}
if (debug) {
// print selected results (for checking correctness) and print time elapsed
for (int i=0; i<N; i+=N/10) { printf(" %10.6f",h_y[i]); }
printf("\n");
}
printf("Memcpy Time: %f seconds\n", time_memcpy);
printf("Compute Time: %f seconds\n", time_compute);
// clean up memory allocated
free(h_A);
free(h_x);
free(h_y);
hipDeviceReset();
} | .text
.file "mat_vec_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z6mv_cpuPfPKfS1_i # -- Begin function _Z6mv_cpuPfPKfS1_i
.p2align 4, 0x90
.type _Z6mv_cpuPfPKfS1_i,@function
_Z6mv_cpuPfPKfS1_i: # @_Z6mv_cpuPfPKfS1_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB0_5
# %bb.1: # %.preheader.lr.ph
movl %ecx, %eax
xorl %r8d, %r8d
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB0_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_3 Depth 2
movl %r8d, %r10d
leaq (%rsi,%r10,4), %r10
movss (%rdi,%r9,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r11d, %r11d
.p2align 4, 0x90
.LBB0_3: # Parent Loop BB0_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r10,%r11,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rdx,%r11,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%rdi,%r9,4)
incq %r11
cmpq %r11, %rax
jne .LBB0_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB0_2 Depth=1
incq %r9
addl %ecx, %r8d
cmpq %rax, %r9
jne .LBB0_2
.LBB0_5: # %._crit_edge17
retq
.Lfunc_end0:
.size _Z6mv_cpuPfPKfS1_i, .Lfunc_end0-_Z6mv_cpuPfPKfS1_i
.cfi_endproc
# -- End function
.globl _Z29__device_stub__mv_cuda_simplePfS_S_i # -- Begin function _Z29__device_stub__mv_cuda_simplePfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mv_cuda_simplePfS_S_i,@function
_Z29__device_stub__mv_cuda_simplePfS_S_i: # @_Z29__device_stub__mv_cuda_simplePfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mv_cuda_simplePfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z29__device_stub__mv_cuda_simplePfS_S_i, .Lfunc_end1-_Z29__device_stub__mv_cuda_simplePfS_S_i
.cfi_endproc
# -- End function
.globl _Z29__device_stub__mv_cuda_sharedPfS_S_i # -- Begin function _Z29__device_stub__mv_cuda_sharedPfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mv_cuda_sharedPfS_S_i,@function
_Z29__device_stub__mv_cuda_sharedPfS_S_i: # @_Z29__device_stub__mv_cuda_sharedPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mv_cuda_sharedPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z29__device_stub__mv_cuda_sharedPfS_S_i, .Lfunc_end2-_Z29__device_stub__mv_cuda_sharedPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z19copy_host_to_devicePfS_i
.LCPI3_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl _Z19copy_host_to_devicePfS_i
.p2align 4, 0x90
.type _Z19copy_host_to_devicePfS_i,@function
_Z19copy_host_to_devicePfS_i: # @_Z19copy_host_to_devicePfS_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $40, %rsp
.cfi_def_cfa_offset 96
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movq %rsi, %r15
movq %rdi, %r12
leaq 8(%rsp), %rbx
leaq 32(%rsp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm0
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI3_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 24(%rsp) # 8-byte Spill
movslq %ebp, %rbp
leaq (,%rbp,4), %r13
imulq %r13, %rbp
movl $d_A, %edi
movq %rbp, %rsi
callq hipMalloc
movl $d_x, %edi
movq %r13, %rsi
callq hipMalloc
movl $d_y, %edi
movq %r13, %rsi
callq hipMalloc
movq d_A(%rip), %rdi
movq %r12, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
movq d_x(%rip), %rdi
movq %r15, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI3_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 24(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z19copy_host_to_devicePfS_i, .Lfunc_end3-_Z19copy_host_to_devicePfS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z19copy_device_to_hostPfi
.LCPI4_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl _Z19copy_device_to_hostPfi
.p2align 4, 0x90
.type _Z19copy_device_to_hostPfi,@function
_Z19copy_device_to_hostPfi: # @_Z19copy_device_to_hostPfi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $40, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %r15
leaq 8(%rsp), %rbx
leaq 32(%rsp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm0
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI4_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 24(%rsp) # 8-byte Spill
movq d_y(%rip), %rsi
movslq %ebp, %rdx
shlq $2, %rdx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movq d_A(%rip), %rdi
callq hipFree
movq d_x(%rip), %rdi
callq hipFree
movq d_y(%rip), %rdi
callq hipFree
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI4_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 24(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
addq $40, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z19copy_device_to_hostPfi, .Lfunc_end4-_Z19copy_device_to_hostPfi
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI5_0:
.long 0x30000000 # float 4.65661287E-10
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI5_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $5, %edi
jne .LBB5_32
# %bb.1:
movq %rsi, %r14
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
movq 32(%r14), %rdi
movl $.L.str.1, %esi
callq strcmp
movl %eax, 156(%rsp) # 4-byte Spill
testl %eax, %eax
jne .LBB5_3
# %bb.2:
movl $.L.str.2, %edi
movl %ebx, %esi
movl %r15d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq printf
.LBB5_3:
movq %r12, 8(%rsp) # 8-byte Spill
movq %r15, 160(%rsp) # 8-byte Spill
movl $2020, %edi # imm = 0x7E4
callq srand
movl %ebx, %r12d
imull %r12d, %r12d
leaq (,%r12,4), %rdi
callq malloc
movq %rax, %r14
movslq %ebx, %rdi
shlq $2, %rdi
movq %rdi, %rbp
callq malloc
movq %rax, %r15
testl %ebx, %ebx
je .LBB5_6
# %bb.4: # %.lr.ph.preheader
cmpl $1, %r12d
adcl $0, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_5: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI5_0(%rip), %xmm0
movss %xmm0, (%r14,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB5_5
.LBB5_6: # %.preheader105
testl %ebx, %ebx
jle .LBB5_9
# %bb.7: # %.lr.ph108.preheader
movl %ebx, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_8: # %.lr.ph108
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI5_0(%rip), %xmm0
movss %xmm0, (%r15,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB5_8
.LBB5_9: # %._crit_edge
movq %rbp, %r13
movq %rbp, %rdi
callq malloc
movq %rax, %r12
testl %ebx, %ebx
jle .LBB5_11
# %bb.10: # %.lr.ph111.preheader
movl %ebx, %edx
shlq $2, %rdx
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB5_11: # %._crit_edge112
movq 8(%rsp), %rax # 8-byte Reload
cmpl $3, %eax
je .LBB5_22
# %bb.12: # %._crit_edge112
cmpl $2, %eax
je .LBB5_20
# %bb.13: # %._crit_edge112
cmpl $1, %eax
jne .LBB5_26
# %bb.14:
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
testl %ebx, %ebx
jle .LBB5_19
# %bb.15: # %.preheader.lr.ph.i
movl %ebx, %eax
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB5_16: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB5_17 Depth 2
movl %ecx, %esi
leaq (%r14,%rsi,4), %rsi
movss (%r12,%rdx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %edi, %edi
.p2align 4, 0x90
.LBB5_17: # Parent Loop BB5_16 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rsi,%rdi,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%r15,%rdi,4), %xmm1
addss %xmm1, %xmm0
incq %rdi
cmpq %rdi, %rax
jne .LBB5_17
# %bb.18: # %._crit_edge.i
# in Loop: Header=BB5_16 Depth=1
movss %xmm0, (%r12,%rdx,4)
incq %rdx
addl %ebx, %ecx
cmpq %rax, %rdx
jne .LBB5_16
.LBB5_19: # %_Z6mv_cpuPfPKfS1_i.exit
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, time_compute(%rip)
.LBB5_26:
cmpl $0, 156(%rsp) # 4-byte Folded Reload
jne .LBB5_31
jmp .LBB5_27
.LBB5_20:
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
callq _Z19copy_host_to_devicePfS_i
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq 160(%rsp), %rsi # 8-byte Reload
leal (%rbx,%rsi), %eax
decl %eax
cltd
idivl %esi
# kill: def $eax killed $eax def $rax
movabsq $4294967296, %rcx # imm = 0x100000000
leaq (%rax,%rcx), %rdi
movl %esi, %edx
orq %rcx, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_25
# %bb.21:
movq d_y(%rip), %rax
movq d_A(%rip), %rcx
movq d_x(%rip), %rdx
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
movq %rdx, 128(%rsp)
movl %ebx, 36(%rsp)
leaq 144(%rsp), %rax
movq %rax, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 72(%rsp)
leaq 128(%rsp), %rax
movq %rax, 80(%rsp)
leaq 36(%rsp), %rax
movq %rax, 88(%rsp)
leaq 40(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14mv_cuda_simplePfS_S_i, %edi
jmp .LBB5_24
.LBB5_22:
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
callq _Z19copy_host_to_devicePfS_i
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq 160(%rsp), %rcx # 8-byte Reload
leal (%rbx,%rcx), %eax
decl %eax
cltd
idivl %ecx
# kill: def $eax killed $eax def $rax
movslq %ecx, %rcx
leaq (,%rcx,4), %r8
movabsq $4294967296, %rsi # imm = 0x100000000
leaq (%rax,%rsi), %rdi
movl %ecx, %edx
orq %rsi, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_25
# %bb.23:
movq d_y(%rip), %rax
movq d_A(%rip), %rcx
movq d_x(%rip), %rdx
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
movq %rdx, 128(%rsp)
movl %ebx, 36(%rsp)
leaq 144(%rsp), %rax
movq %rax, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 72(%rsp)
leaq 128(%rsp), %rax
movq %rax, 80(%rsp)
leaq 36(%rsp), %rax
movq %rax, 88(%rsp)
leaq 40(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14mv_cuda_sharedPfS_S_i, %edi
.LBB5_24:
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_25:
callq hipDeviceSynchronize
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, time_compute(%rip)
leaq 64(%rsp), %rbp
leaq 40(%rsp), %rsi
movq %rbp, %rdi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq d_y(%rip), %rsi
movq %r12, %rdi
movq %r13, %rdx
movl $2, %ecx
callq hipMemcpy
movq d_A(%rip), %rdi
callq hipFree
movq d_x(%rip), %rdi
callq hipFree
movq d_y(%rip), %rdi
callq hipFree
movq %rbp, %rdi
leaq 40(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
cmpl $0, 156(%rsp) # 4-byte Folded Reload
jne .LBB5_31
.LBB5_27: # %.preheader
testl %ebx, %ebx
jle .LBB5_30
# %bb.28: # %.lr.ph114
movl %ebx, %eax
andl $-2, %eax
movabsq $1844674407370955162, %rcx # imm = 0x199999999999999A
mulq %rcx
movq %rdx, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB5_29: # =>This Inner Loop Header: Depth=1
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
addq %r13, %rbp
cmpl %ebx, %ebp
jl .LBB5_29
.LBB5_30: # %._crit_edge115
movl $10, %edi
callq putchar@PLT
.LBB5_31:
movsd time_memcpy(%rip), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.5, %edi
movb $1, %al
callq printf
movsd time_compute(%rip), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_32:
.cfi_def_cfa_offset 224
movl $.Lstr, %edi
callq puts@PLT
movl $2, %edi
callq exit
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mv_cuda_simplePfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mv_cuda_sharedPfS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type d_A,@object # @d_A
.bss
.globl d_A
.p2align 3, 0x0
d_A:
.quad 0
.size d_A, 8
.type d_x,@object # @d_x
.globl d_x
.p2align 3, 0x0
d_x:
.quad 0
.size d_x, 8
.type d_y,@object # @d_y
.globl d_y
.p2align 3, 0x0
d_y:
.quad 0
.size d_y, 8
.type time_memcpy,@object # @time_memcpy
.globl time_memcpy
.p2align 3, 0x0
time_memcpy:
.quad 0x0000000000000000 # double 0
.size time_memcpy, 8
.type time_compute,@object # @time_compute
.globl time_compute
.p2align 3, 0x0
time_compute:
.quad 0x0000000000000000 # double 0
.size time_compute, 8
.type _Z14mv_cuda_simplePfS_S_i,@object # @_Z14mv_cuda_simplePfS_S_i
.section .rodata,"a",@progbits
.globl _Z14mv_cuda_simplePfS_S_i
.p2align 3, 0x0
_Z14mv_cuda_simplePfS_S_i:
.quad _Z29__device_stub__mv_cuda_simplePfS_S_i
.size _Z14mv_cuda_simplePfS_S_i, 8
.type _Z14mv_cuda_sharedPfS_S_i,@object # @_Z14mv_cuda_sharedPfS_S_i
.globl _Z14mv_cuda_sharedPfS_S_i
.p2align 3, 0x0
_Z14mv_cuda_sharedPfS_S_i:
.quad _Z29__device_stub__mv_cuda_sharedPfS_S_i
.size _Z14mv_cuda_sharedPfS_S_i, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "debug"
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n Array size = %d , block size = %d and policy = %d\n "
.size .L.str.2, 54
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " %10.6f"
.size .L.str.3, 8
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Memcpy Time: %f seconds\n"
.size .L.str.5, 25
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Compute Time: %f seconds\n"
.size .L.str.6, 26
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14mv_cuda_simplePfS_S_i"
.size .L__unnamed_1, 26
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z14mv_cuda_sharedPfS_S_i"
.size .L__unnamed_2, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>"
.size .Lstr, 80
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__mv_cuda_simplePfS_S_i
.addrsig_sym _Z29__device_stub__mv_cuda_sharedPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym d_A
.addrsig_sym d_x
.addrsig_sym d_y
.addrsig_sym _Z14mv_cuda_simplePfS_S_i
.addrsig_sym _Z14mv_cuda_sharedPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004b61c_00000000-6_mat_vec_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3929:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3929:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6mv_cpuPfPKfS1_i
.type _Z6mv_cpuPfPKfS1_i, @function
_Z6mv_cpuPfPKfS1_i:
.LFB3923:
.cfi_startproc
endbr64
testl %ecx, %ecx
jle .L3
movq %rdi, %r8
movslq %ecx, %rcx
salq $2, %rcx
addq %rcx, %rdi
.L5:
movl $0, %eax
.L6:
movss (%rsi,%rax), %xmm0
mulss (%rdx,%rax), %xmm0
addss (%r8), %xmm0
movss %xmm0, (%r8)
addq $4, %rax
cmpq %rcx, %rax
jne .L6
addq $4, %r8
addq %rcx, %rsi
cmpq %rdi, %r8
jne .L5
.L3:
ret
.cfi_endproc
.LFE3923:
.size _Z6mv_cpuPfPKfS1_i, .-_Z6mv_cpuPfPKfS1_i
.globl _Z19copy_host_to_devicePfS_i
.type _Z19copy_host_to_devicePfS_i, @function
_Z19copy_host_to_devicePfS_i:
.LFB3924:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r13
movq %rsi, %r12
movl %edx, %ebx
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %r15
leaq 32(%rsp), %r14
movq %r15, %rsi
movq %r14, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, 8(%rsp)
movslq %ebx, %rbx
movq %rbx, %rbp
imulq %rbx, %rbp
salq $2, %rbp
movq %rbp, %rsi
leaq d_A(%rip), %rdi
call cudaMalloc@PLT
salq $2, %rbx
movq %rbx, %rsi
leaq d_x(%rip), %rdi
call cudaMalloc@PLT
movq %rbx, %rsi
leaq d_y(%rip), %rdi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r13, %rsi
movq d_A(%rip), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %rbx, %rdx
movq %r12, %rsi
movq d_x(%rip), %rdi
call cudaMemcpy@PLT
movq %r15, %rsi
movq %r14, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd 8(%rsp), %xmm0
addsd time_memcpy(%rip), %xmm0
movsd %xmm0, time_memcpy(%rip)
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L11
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3924:
.size _Z19copy_host_to_devicePfS_i, .-_Z19copy_host_to_devicePfS_i
.globl _Z19copy_device_to_hostPfi
.type _Z19copy_device_to_hostPfi, @function
_Z19copy_device_to_hostPfi:
.LFB3925:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $72, %rsp
.cfi_def_cfa_offset 112
movq %rdi, %rbp
movl %esi, %ebx
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %r13
leaq 32(%rsp), %r12
movq %r13, %rsi
movq %r12, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, 8(%rsp)
movslq %ebx, %rdx
salq $2, %rdx
movl $2, %ecx
movq d_y(%rip), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movq d_A(%rip), %rdi
call cudaFree@PLT
movq d_x(%rip), %rdi
call cudaFree@PLT
movq d_y(%rip), %rdi
call cudaFree@PLT
movq %r13, %rsi
movq %r12, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 40(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 32(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd 8(%rsp), %xmm0
addsd time_memcpy(%rip), %xmm0
movsd %xmm0, time_memcpy(%rip)
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L15
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3925:
.size _Z19copy_device_to_hostPfi, .-_Z19copy_device_to_hostPfi
.globl _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
.type _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i, @function
_Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i:
.LFB3951:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L20
.L16:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L21
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mv_cuda_simplePfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L16
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3951:
.size _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i, .-_Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
.globl _Z14mv_cuda_simplePfS_S_i
.type _Z14mv_cuda_simplePfS_S_i, @function
_Z14mv_cuda_simplePfS_S_i:
.LFB3952:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3952:
.size _Z14mv_cuda_simplePfS_S_i, .-_Z14mv_cuda_simplePfS_S_i
.globl _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
.type _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i, @function
_Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i:
.LFB3953:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z14mv_cuda_sharedPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3953:
.size _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i, .-_Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
.globl _Z14mv_cuda_sharedPfS_S_i
.type _Z14mv_cuda_sharedPfS_S_i, @function
_Z14mv_cuda_sharedPfS_S_i:
.LFB3954:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3954:
.size _Z14mv_cuda_sharedPfS_S_i, .-_Z14mv_cuda_sharedPfS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "debug"
.section .rodata.str1.8
.align 8
.LC3:
.string "\n Array size = %d , block size = %d and policy = %d\n "
.section .rodata.str1.1
.LC6:
.string " %10.6f"
.LC7:
.string "\n"
.LC8:
.string "Memcpy Time: %f seconds\n"
.LC9:
.string "Compute Time: %f seconds\n"
.text
.globl main
.type main, @function
main:
.LFB3926:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $5, %edi
jne .L56
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %r14
movl %eax, %r12d
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, 40(%rsp)
movl %eax, 36(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, (%rsp)
movq 32(%rbx), %rdi
leaq .LC2(%rip), %rsi
call strcmp@PLT
movl %eax, %ebx
testl %eax, %eax
je .L57
.L34:
movl $2020, %edi
call srand@PLT
movl %r14d, %ebp
imull %r14d, %ebp
movslq %ebp, %rax
leaq 0(,%rax,4), %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
movq %rax, 24(%rsp)
movslq %r14d, %rax
salq $2, %rax
movq %rax, 16(%rsp)
movq %rax, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
testl %ebp, %ebp
jle .L35
movq %r15, %rbp
addq %r15, %r13
.L36:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC4(%rip), %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r13, %rbp
jne .L36
.L35:
testl %r14d, %r14d
jle .L37
movq 8(%rsp), %rdx
movq %rdx, %rbp
leal -1(%r14), %eax
leaq 4(,%rax,4), %r13
leaq 0(%r13,%rdx), %r15
.L38:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC4(%rip), %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r15, %rbp
jne .L38
movq 16(%rsp), %rdi
call malloc@PLT
movq %rax, 16(%rsp)
addq %rax, %r13
.L39:
movl $0x00000000, (%rax)
addq $4, %rax
cmpq %r13, %rax
jne .L39
.L48:
cmpl $1, (%rsp)
je .L58
cmpl $2, (%rsp)
je .L59
cmpl $3, (%rsp)
je .L60
.L41:
testl %ebx, %ebx
jne .L45
testl %r14d, %r14d
jle .L46
movl $10, %ecx
movl %r12d, %eax
cltd
idivl %ecx
movl %eax, %r14d
movslq %eax, %r13
salq $2, %r13
movq 16(%rsp), %rbp
leaq .LC6(%rip), %r15
.L47:
pxor %xmm0, %xmm0
cvtss2sd 0(%rbp), %xmm0
movq %r15, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addl %r14d, %ebx
addq %r13, %rbp
cmpl %r12d, %ebx
jl .L47
.L46:
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L45:
movsd time_memcpy(%rip), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movsd time_compute(%rip), %xmm0
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 24(%rsp), %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
call cudaDeviceReset@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L61
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L56:
.cfi_restore_state
leaq .LC1(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movl $2, %edi
call exit@PLT
.L57:
movl (%rsp), %r8d
movl 36(%rsp), %ecx
movl %r14d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L34
.L58:
leaq 48(%rsp), %rbp
leaq 80(%rsp), %r13
movq %rbp, %rsi
movq %r13, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movl %r12d, %ecx
movq 8(%rsp), %rdx
movq 24(%rsp), %rsi
movq 16(%rsp), %rdi
call _Z6mv_cpuPfPKfS1_i
movq %rbp, %rsi
movq %r13, %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
jmp .L41
.L59:
movl %r12d, %edx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z19copy_host_to_devicePfS_i
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movq 40(%rsp), %rax
movl %eax, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
leal -1(%r14,%rax), %eax
cltd
idivl 36(%rsp)
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L62
.L43:
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
movl %r12d, %esi
movq 16(%rsp), %rdi
call _Z19copy_device_to_hostPfi
jmp .L41
.L62:
movl %r12d, %ecx
movq d_x(%rip), %rdx
movq d_A(%rip), %rsi
movq d_y(%rip), %rdi
call _Z39__device_stub__Z14mv_cuda_simplePfS_S_iPfS_S_i
jmp .L43
.L60:
movl %r12d, %edx
movq 8(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z19copy_host_to_devicePfS_i
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
movsd %xmm0, (%rsp)
movq 40(%rsp), %rcx
movl %ecx, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
leal -1(%r14,%rcx), %eax
cltd
idivl 36(%rsp)
movl %eax, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movslq %ecx, %rax
movl $0, %r9d
leaq 0(,%rax,4), %r8
movq 68(%rsp), %rdx
movl $1, %ecx
movq 56(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L63
.L44:
call cudaDeviceSynchronize@PLT
leaq 48(%rsp), %rsi
leaq 80(%rsp), %rdi
call gettimeofday@PLT
pxor %xmm0, %xmm0
cvtsi2sdq 88(%rsp), %xmm0
divsd .LC0(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq 80(%rsp), %xmm1
addsd %xmm1, %xmm0
subsd (%rsp), %xmm0
movsd %xmm0, time_compute(%rip)
movl %r12d, %esi
movq 16(%rsp), %rdi
call _Z19copy_device_to_hostPfi
jmp .L41
.L63:
movl %r12d, %ecx
movq d_x(%rip), %rdx
movq d_A(%rip), %rsi
movq d_y(%rip), %rdi
call _Z39__device_stub__Z14mv_cuda_sharedPfS_S_iPfS_S_i
jmp .L44
.L37:
movq 16(%rsp), %rdi
call malloc@PLT
movq %rax, 16(%rsp)
jmp .L48
.L61:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3926:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z14mv_cuda_sharedPfS_S_i"
.LC11:
.string "_Z14mv_cuda_simplePfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3956:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mv_cuda_sharedPfS_S_i(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z14mv_cuda_simplePfS_S_i(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3956:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl time_compute
.bss
.align 8
.type time_compute, @object
.size time_compute, 8
time_compute:
.zero 8
.globl time_memcpy
.align 8
.type time_memcpy, @object
.size time_memcpy, 8
time_memcpy:
.zero 8
.globl d_y
.align 8
.type d_y, @object
.size d_y, 8
d_y:
.zero 8
.globl d_x
.align 8
.type d_x, @object
.size d_x, 8
d_x:
.zero 8
.globl d_A
.align 8
.type d_A, @object
.size d_A, 8
d_A:
.zero 8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1093567616
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 805306368
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "mat_vec_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z6mv_cpuPfPKfS1_i # -- Begin function _Z6mv_cpuPfPKfS1_i
.p2align 4, 0x90
.type _Z6mv_cpuPfPKfS1_i,@function
_Z6mv_cpuPfPKfS1_i: # @_Z6mv_cpuPfPKfS1_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB0_5
# %bb.1: # %.preheader.lr.ph
movl %ecx, %eax
xorl %r8d, %r8d
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB0_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_3 Depth 2
movl %r8d, %r10d
leaq (%rsi,%r10,4), %r10
movss (%rdi,%r9,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %r11d, %r11d
.p2align 4, 0x90
.LBB0_3: # Parent Loop BB0_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r10,%r11,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rdx,%r11,4), %xmm1
addss %xmm1, %xmm0
movss %xmm0, (%rdi,%r9,4)
incq %r11
cmpq %r11, %rax
jne .LBB0_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB0_2 Depth=1
incq %r9
addl %ecx, %r8d
cmpq %rax, %r9
jne .LBB0_2
.LBB0_5: # %._crit_edge17
retq
.Lfunc_end0:
.size _Z6mv_cpuPfPKfS1_i, .Lfunc_end0-_Z6mv_cpuPfPKfS1_i
.cfi_endproc
# -- End function
.globl _Z29__device_stub__mv_cuda_simplePfS_S_i # -- Begin function _Z29__device_stub__mv_cuda_simplePfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mv_cuda_simplePfS_S_i,@function
_Z29__device_stub__mv_cuda_simplePfS_S_i: # @_Z29__device_stub__mv_cuda_simplePfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mv_cuda_simplePfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end1:
.size _Z29__device_stub__mv_cuda_simplePfS_S_i, .Lfunc_end1-_Z29__device_stub__mv_cuda_simplePfS_S_i
.cfi_endproc
# -- End function
.globl _Z29__device_stub__mv_cuda_sharedPfS_S_i # -- Begin function _Z29__device_stub__mv_cuda_sharedPfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__mv_cuda_sharedPfS_S_i,@function
_Z29__device_stub__mv_cuda_sharedPfS_S_i: # @_Z29__device_stub__mv_cuda_sharedPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z14mv_cuda_sharedPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end2:
.size _Z29__device_stub__mv_cuda_sharedPfS_S_i, .Lfunc_end2-_Z29__device_stub__mv_cuda_sharedPfS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z19copy_host_to_devicePfS_i
.LCPI3_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl _Z19copy_host_to_devicePfS_i
.p2align 4, 0x90
.type _Z19copy_host_to_devicePfS_i,@function
_Z19copy_host_to_devicePfS_i: # @_Z19copy_host_to_devicePfS_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $40, %rsp
.cfi_def_cfa_offset 96
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edx, %ebp
movq %rsi, %r15
movq %rdi, %r12
leaq 8(%rsp), %rbx
leaq 32(%rsp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm0
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI3_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 24(%rsp) # 8-byte Spill
movslq %ebp, %rbp
leaq (,%rbp,4), %r13
imulq %r13, %rbp
movl $d_A, %edi
movq %rbp, %rsi
callq hipMalloc
movl $d_x, %edi
movq %r13, %rsi
callq hipMalloc
movl $d_y, %edi
movq %r13, %rsi
callq hipMalloc
movq d_A(%rip), %rdi
movq %r12, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
movq d_x(%rip), %rdi
movq %r15, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI3_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 24(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z19copy_host_to_devicePfS_i, .Lfunc_end3-_Z19copy_host_to_devicePfS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z19copy_device_to_hostPfi
.LCPI4_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl _Z19copy_device_to_hostPfi
.p2align 4, 0x90
.type _Z19copy_device_to_hostPfi,@function
_Z19copy_device_to_hostPfi: # @_Z19copy_device_to_hostPfi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $40, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %r15
leaq 8(%rsp), %rbx
leaq 32(%rsp), %r14
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
cvtsi2sdq 8(%rsp), %xmm0
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI4_0(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 24(%rsp) # 8-byte Spill
movq d_y(%rip), %rsi
movslq %ebp, %rdx
shlq $2, %rdx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movq d_A(%rip), %rdi
callq hipFree
movq d_x(%rip), %rdi
callq hipFree
movq d_y(%rip), %rdi
callq hipFree
movq %rbx, %rdi
movq %r14, %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 16(%rsp), %xmm1
divsd .LCPI4_0(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 24(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
addq $40, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z19copy_device_to_hostPfi, .Lfunc_end4-_Z19copy_device_to_hostPfi
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI5_0:
.long 0x30000000 # float 4.65661287E-10
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI5_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $5, %edi
jne .LBB5_32
# %bb.1:
movq %rsi, %r14
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
movq 16(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
movq 24(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
movq 32(%r14), %rdi
movl $.L.str.1, %esi
callq strcmp
movl %eax, 156(%rsp) # 4-byte Spill
testl %eax, %eax
jne .LBB5_3
# %bb.2:
movl $.L.str.2, %edi
movl %ebx, %esi
movl %r15d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq printf
.LBB5_3:
movq %r12, 8(%rsp) # 8-byte Spill
movq %r15, 160(%rsp) # 8-byte Spill
movl $2020, %edi # imm = 0x7E4
callq srand
movl %ebx, %r12d
imull %r12d, %r12d
leaq (,%r12,4), %rdi
callq malloc
movq %rax, %r14
movslq %ebx, %rdi
shlq $2, %rdi
movq %rdi, %rbp
callq malloc
movq %rax, %r15
testl %ebx, %ebx
je .LBB5_6
# %bb.4: # %.lr.ph.preheader
cmpl $1, %r12d
adcl $0, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_5: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI5_0(%rip), %xmm0
movss %xmm0, (%r14,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB5_5
.LBB5_6: # %.preheader105
testl %ebx, %ebx
jle .LBB5_9
# %bb.7: # %.lr.ph108.preheader
movl %ebx, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB5_8: # %.lr.ph108
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI5_0(%rip), %xmm0
movss %xmm0, (%r15,%r13,4)
incq %r13
cmpq %r13, %r12
jne .LBB5_8
.LBB5_9: # %._crit_edge
movq %rbp, %r13
movq %rbp, %rdi
callq malloc
movq %rax, %r12
testl %ebx, %ebx
jle .LBB5_11
# %bb.10: # %.lr.ph111.preheader
movl %ebx, %edx
shlq $2, %rdx
movq %r12, %rdi
xorl %esi, %esi
callq memset@PLT
.LBB5_11: # %._crit_edge112
movq 8(%rsp), %rax # 8-byte Reload
cmpl $3, %eax
je .LBB5_22
# %bb.12: # %._crit_edge112
cmpl $2, %eax
je .LBB5_20
# %bb.13: # %._crit_edge112
cmpl $1, %eax
jne .LBB5_26
# %bb.14:
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
testl %ebx, %ebx
jle .LBB5_19
# %bb.15: # %.preheader.lr.ph.i
movl %ebx, %eax
xorl %ecx, %ecx
xorl %edx, %edx
.p2align 4, 0x90
.LBB5_16: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB5_17 Depth 2
movl %ecx, %esi
leaq (%r14,%rsi,4), %rsi
movss (%r12,%rdx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
xorl %edi, %edi
.p2align 4, 0x90
.LBB5_17: # Parent Loop BB5_16 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rsi,%rdi,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%r15,%rdi,4), %xmm1
addss %xmm1, %xmm0
incq %rdi
cmpq %rdi, %rax
jne .LBB5_17
# %bb.18: # %._crit_edge.i
# in Loop: Header=BB5_16 Depth=1
movss %xmm0, (%r12,%rdx,4)
incq %rdx
addl %ebx, %ecx
cmpq %rax, %rdx
jne .LBB5_16
.LBB5_19: # %_Z6mv_cpuPfPKfS1_i.exit
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, time_compute(%rip)
.LBB5_26:
cmpl $0, 156(%rsp) # 4-byte Folded Reload
jne .LBB5_31
jmp .LBB5_27
.LBB5_20:
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
callq _Z19copy_host_to_devicePfS_i
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq 160(%rsp), %rsi # 8-byte Reload
leal (%rbx,%rsi), %eax
decl %eax
cltd
idivl %esi
# kill: def $eax killed $eax def $rax
movabsq $4294967296, %rcx # imm = 0x100000000
leaq (%rax,%rcx), %rdi
movl %esi, %edx
orq %rcx, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_25
# %bb.21:
movq d_y(%rip), %rax
movq d_A(%rip), %rcx
movq d_x(%rip), %rdx
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
movq %rdx, 128(%rsp)
movl %ebx, 36(%rsp)
leaq 144(%rsp), %rax
movq %rax, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 72(%rsp)
leaq 128(%rsp), %rax
movq %rax, 80(%rsp)
leaq 36(%rsp), %rax
movq %rax, 88(%rsp)
leaq 40(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14mv_cuda_simplePfS_S_i, %edi
jmp .LBB5_24
.LBB5_22:
movq %r14, %rdi
movq %r15, %rsi
movl %ebx, %edx
callq _Z19copy_host_to_devicePfS_i
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq 160(%rsp), %rcx # 8-byte Reload
leal (%rbx,%rcx), %eax
decl %eax
cltd
idivl %ecx
# kill: def $eax killed $eax def $rax
movslq %ecx, %rcx
leaq (,%rcx,4), %r8
movabsq $4294967296, %rsi # imm = 0x100000000
leaq (%rax,%rsi), %rdi
movl %ecx, %edx
orq %rsi, %rdx
movl $1, %esi
movl $1, %ecx
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_25
# %bb.23:
movq d_y(%rip), %rax
movq d_A(%rip), %rcx
movq d_x(%rip), %rdx
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
movq %rdx, 128(%rsp)
movl %ebx, 36(%rsp)
leaq 144(%rsp), %rax
movq %rax, 64(%rsp)
leaq 136(%rsp), %rax
movq %rax, 72(%rsp)
leaq 128(%rsp), %rax
movq %rax, 80(%rsp)
leaq 36(%rsp), %rax
movq %rax, 88(%rsp)
leaq 40(%rsp), %rdi
leaq 112(%rsp), %rsi
leaq 104(%rsp), %rdx
leaq 96(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 112(%rsp), %rcx
movl 120(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14mv_cuda_sharedPfS_S_i, %edi
.LBB5_24:
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
pushq 112(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_25:
callq hipDeviceSynchronize
leaq 16(%rsp), %rdi
leaq 56(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 24(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
movsd %xmm1, time_compute(%rip)
leaq 64(%rsp), %rbp
leaq 40(%rsp), %rsi
movq %rbp, %rdi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
movq d_y(%rip), %rsi
movq %r12, %rdi
movq %r13, %rdx
movl $2, %ecx
callq hipMemcpy
movq d_A(%rip), %rdi
callq hipFree
movq d_x(%rip), %rdi
callq hipFree
movq d_y(%rip), %rdi
callq hipFree
movq %rbp, %rdi
leaq 40(%rsp), %rsi
callq gettimeofday
xorps %xmm0, %xmm0
cvtsi2sdq 64(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 72(%rsp), %xmm1
divsd .LCPI5_1(%rip), %xmm1
addsd %xmm0, %xmm1
subsd 8(%rsp), %xmm1 # 8-byte Folded Reload
addsd time_memcpy(%rip), %xmm1
movsd %xmm1, time_memcpy(%rip)
cmpl $0, 156(%rsp) # 4-byte Folded Reload
jne .LBB5_31
.LBB5_27: # %.preheader
testl %ebx, %ebx
jle .LBB5_30
# %bb.28: # %.lr.ph114
movl %ebx, %eax
andl $-2, %eax
movabsq $1844674407370955162, %rcx # imm = 0x199999999999999A
mulq %rcx
movq %rdx, %r13
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB5_29: # =>This Inner Loop Header: Depth=1
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
addq %r13, %rbp
cmpl %ebx, %ebp
jl .LBB5_29
.LBB5_30: # %._crit_edge115
movl $10, %edi
callq putchar@PLT
.LBB5_31:
movsd time_memcpy(%rip), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.5, %edi
movb $1, %al
callq printf
movsd time_compute(%rip), %xmm0 # xmm0 = mem[0],zero
movl $.L.str.6, %edi
movb $1, %al
callq printf
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %r12, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_32:
.cfi_def_cfa_offset 224
movl $.Lstr, %edi
callq puts@PLT
movl $2, %edi
callq exit
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mv_cuda_simplePfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14mv_cuda_sharedPfS_S_i, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type d_A,@object # @d_A
.bss
.globl d_A
.p2align 3, 0x0
d_A:
.quad 0
.size d_A, 8
.type d_x,@object # @d_x
.globl d_x
.p2align 3, 0x0
d_x:
.quad 0
.size d_x, 8
.type d_y,@object # @d_y
.globl d_y
.p2align 3, 0x0
d_y:
.quad 0
.size d_y, 8
.type time_memcpy,@object # @time_memcpy
.globl time_memcpy
.p2align 3, 0x0
time_memcpy:
.quad 0x0000000000000000 # double 0
.size time_memcpy, 8
.type time_compute,@object # @time_compute
.globl time_compute
.p2align 3, 0x0
time_compute:
.quad 0x0000000000000000 # double 0
.size time_compute, 8
.type _Z14mv_cuda_simplePfS_S_i,@object # @_Z14mv_cuda_simplePfS_S_i
.section .rodata,"a",@progbits
.globl _Z14mv_cuda_simplePfS_S_i
.p2align 3, 0x0
_Z14mv_cuda_simplePfS_S_i:
.quad _Z29__device_stub__mv_cuda_simplePfS_S_i
.size _Z14mv_cuda_simplePfS_S_i, 8
.type _Z14mv_cuda_sharedPfS_S_i,@object # @_Z14mv_cuda_sharedPfS_S_i
.globl _Z14mv_cuda_sharedPfS_S_i
.p2align 3, 0x0
_Z14mv_cuda_sharedPfS_S_i:
.quad _Z29__device_stub__mv_cuda_sharedPfS_S_i
.size _Z14mv_cuda_sharedPfS_S_i, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "debug"
.size .L.str.1, 6
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n Array size = %d , block size = %d and policy = %d\n "
.size .L.str.2, 54
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " %10.6f"
.size .L.str.3, 8
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Memcpy Time: %f seconds\n"
.size .L.str.5, 25
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Compute Time: %f seconds\n"
.size .L.str.6, 26
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14mv_cuda_simplePfS_S_i"
.size .L__unnamed_1, 26
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z14mv_cuda_sharedPfS_S_i"
.size .L__unnamed_2, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Usage: mat_vec_gpu <array size> <block size> <policy (1|2|3)> <(debug|nodebug)>"
.size .Lstr, 80
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__mv_cuda_simplePfS_S_i
.addrsig_sym _Z29__device_stub__mv_cuda_sharedPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym d_A
.addrsig_sym d_x
.addrsig_sym d_y
.addrsig_sym _Z14mv_cuda_simplePfS_S_i
.addrsig_sym _Z14mv_cuda_sharedPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "MurMurHash3.cuh"
__host__ __device__ inline uint64_t rotl64(uint64_t x, int8_t r)
{
return (x << r) | (x >> (64 - r));
}
__host__ __device__ inline uint64_t getblock64(const uint64_t *p, int i)
{
return p[i];
}
__host__ __device__ inline uint64_t fmix64(uint64_t k)
{
k ^= k >> 33;
k *= 0xff51afd7ed558ccd;
k ^= k >> 33;
k *= 0xc4ceb9fe1a85ec53;
k ^= k >> 33;
return k;
}
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out)
{
const uint8_t *data = (const uint8_t *)key;
const int nblocks = len / 16;
uint64_t h1 = seed;
uint64_t h2 = seed;
const uint64_t c1 = 0x87c37b91114253d5;
const uint64_t c2 = 0x4cf5ad432745937f;
//----------
// body
const uint64_t *blocks = (const uint64_t *)(data);
for (int i = 0; i < nblocks; i++)
{
uint64_t k1 = getblock64(blocks, i * 2 + 0);
uint64_t k2 = getblock64(blocks, i * 2 + 1);
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
h1 = rotl64(h1, 27);
h1 += h2;
h1 = h1 * 5 + 0x52dce729;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
h2 = rotl64(h2, 31);
h2 += h1;
h2 = h2 * 5 + 0x38495ab5;
}
//----------
// tail
const uint8_t *tail = (const uint8_t *)(data + nblocks * 16);
uint64_t k1 = 0;
uint64_t k2 = 0;
switch (len & 15)
{
case 15:
k2 ^= ((uint64_t)tail[14]) << 48;
case 14:
k2 ^= ((uint64_t)tail[13]) << 40;
case 13:
k2 ^= ((uint64_t)tail[12]) << 32;
case 12:
k2 ^= ((uint64_t)tail[11]) << 24;
case 11:
k2 ^= ((uint64_t)tail[10]) << 16;
case 10:
k2 ^= ((uint64_t)tail[9]) << 8;
case 9:
k2 ^= ((uint64_t)tail[8]) << 0;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
case 8:
k1 ^= ((uint64_t)tail[7]) << 56;
case 7:
k1 ^= ((uint64_t)tail[6]) << 48;
case 6:
k1 ^= ((uint64_t)tail[5]) << 40;
case 5:
k1 ^= ((uint64_t)tail[4]) << 32;
case 4:
k1 ^= ((uint64_t)tail[3]) << 24;
case 3:
k1 ^= ((uint64_t)tail[2]) << 16;
case 2:
k1 ^= ((uint64_t)tail[1]) << 8;
case 1:
k1 ^= ((uint64_t)tail[0]) << 0;
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
};
//----------
// finalization
h1 ^= len;
h2 ^= len;
h1 += h2;
h2 += h1;
h1 = fmix64(h1);
h2 = fmix64(h2);
h1 += h2;
h2 += h1;
((uint64_t *)out)[0] = h1;
((uint64_t *)out)[1] = h2;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "MurMurHash3.cuh"
__host__ __device__ inline uint64_t rotl64(uint64_t x, int8_t r)
{
return (x << r) | (x >> (64 - r));
}
__host__ __device__ inline uint64_t getblock64(const uint64_t *p, int i)
{
return p[i];
}
__host__ __device__ inline uint64_t fmix64(uint64_t k)
{
k ^= k >> 33;
k *= 0xff51afd7ed558ccd;
k ^= k >> 33;
k *= 0xc4ceb9fe1a85ec53;
k ^= k >> 33;
return k;
}
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out)
{
const uint8_t *data = (const uint8_t *)key;
const int nblocks = len / 16;
uint64_t h1 = seed;
uint64_t h2 = seed;
const uint64_t c1 = 0x87c37b91114253d5;
const uint64_t c2 = 0x4cf5ad432745937f;
//----------
// body
const uint64_t *blocks = (const uint64_t *)(data);
for (int i = 0; i < nblocks; i++)
{
uint64_t k1 = getblock64(blocks, i * 2 + 0);
uint64_t k2 = getblock64(blocks, i * 2 + 1);
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
h1 = rotl64(h1, 27);
h1 += h2;
h1 = h1 * 5 + 0x52dce729;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
h2 = rotl64(h2, 31);
h2 += h1;
h2 = h2 * 5 + 0x38495ab5;
}
//----------
// tail
const uint8_t *tail = (const uint8_t *)(data + nblocks * 16);
uint64_t k1 = 0;
uint64_t k2 = 0;
switch (len & 15)
{
case 15:
k2 ^= ((uint64_t)tail[14]) << 48;
case 14:
k2 ^= ((uint64_t)tail[13]) << 40;
case 13:
k2 ^= ((uint64_t)tail[12]) << 32;
case 12:
k2 ^= ((uint64_t)tail[11]) << 24;
case 11:
k2 ^= ((uint64_t)tail[10]) << 16;
case 10:
k2 ^= ((uint64_t)tail[9]) << 8;
case 9:
k2 ^= ((uint64_t)tail[8]) << 0;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
case 8:
k1 ^= ((uint64_t)tail[7]) << 56;
case 7:
k1 ^= ((uint64_t)tail[6]) << 48;
case 6:
k1 ^= ((uint64_t)tail[5]) << 40;
case 5:
k1 ^= ((uint64_t)tail[4]) << 32;
case 4:
k1 ^= ((uint64_t)tail[3]) << 24;
case 3:
k1 ^= ((uint64_t)tail[2]) << 16;
case 2:
k1 ^= ((uint64_t)tail[1]) << 8;
case 1:
k1 ^= ((uint64_t)tail[0]) << 0;
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
};
//----------
// finalization
h1 ^= len;
h2 ^= len;
h1 += h2;
h2 += h1;
h1 = fmix64(h1);
h2 = fmix64(h2);
h1 += h2;
h2 += h1;
((uint64_t *)out)[0] = h1;
((uint64_t *)out)[1] = h2;
} | .file "tmpxft_000de38b_00000000-6_MurMurHash3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2033:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z15MurmurHash3_128PKvijPv
.type _Z15MurmurHash3_128PKvijPv, @function
_Z15MurmurHash3_128PKvijPv:
.LFB2030:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
movq %rdi, %r8
movl %esi, %edi
movq %rcx, %r11
leal 15(%rsi), %ecx
testl %esi, %esi
cmovns %esi, %ecx
sarl $4, %ecx
movl %edx, %ebx
cmpl $15, %esi
jle .L23
movq %r8, %rdx
movq %rbx, %rbp
movl $0, %esi
movabsq $-8663945395140668459, %r10
movabsq $5545529020109919103, %r9
.L5:
movq %r10, %rax
imulq (%rdx), %rax
rolq $31, %rax
imulq %r9, %rax
xorq %rbx, %rax
rolq $27, %rax
addq %rbp, %rax
leaq 1390208809(%rax,%rax,4), %rbx
movq %r9, %rax
imulq 8(%rdx), %rax
rorq $31, %rax
imulq %r10, %rax
xorq %rbp, %rax
rolq $31, %rax
addq %rbx, %rax
leaq 944331445(%rax,%rax,4), %rbp
addl $1, %esi
addq $16, %rdx
cmpl %esi, %ecx
jg .L5
.L4:
sall $4, %ecx
movslq %ecx, %rcx
addq %r8, %rcx
movl %edi, %eax
andl $15, %eax
leaq .L8(%rip), %rdx
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
notrack jmp *%rax
.section .rodata
.align 4
.align 4
.L8:
.long .L6-.L8
.long .L24-.L8
.long .L25-.L8
.long .L26-.L8
.long .L27-.L8
.long .L28-.L8
.long .L29-.L8
.long .L30-.L8
.long .L15-.L8
.long .L31-.L8
.long .L32-.L8
.long .L33-.L8
.long .L34-.L8
.long .L35-.L8
.long .L36-.L8
.long .L7-.L8
.text
.L23:
movq %rbx, %rbp
jmp .L4
.L7:
movzbl 14(%rcx), %eax
salq $48, %rax
jmp .L9
.L36:
movl $0, %eax
.L9:
movzbl 13(%rcx), %edx
salq $40, %rdx
xorq %rax, %rdx
.L10:
movzbl 12(%rcx), %eax
salq $32, %rax
xorq %rdx, %rax
.L11:
movzbl 11(%rcx), %edx
salq $24, %rdx
xorq %rax, %rdx
.L12:
movzbl 10(%rcx), %eax
salq $16, %rax
xorq %rdx, %rax
.L13:
movzbl 9(%rcx), %edx
salq $8, %rdx
xorq %rax, %rdx
.L14:
movzbl 8(%rcx), %eax
xorq %rdx, %rax
movabsq $5545529020109919103, %rdx
imulq %rdx, %rax
rorq $31, %rax
movabsq $-8663945395140668459, %rdx
imulq %rdx, %rax
xorq %rax, %rbp
.L15:
movzbl 7(%rcx), %edx
salq $56, %rdx
.L16:
movzbl 6(%rcx), %eax
salq $48, %rax
xorq %rdx, %rax
.L17:
movzbl 5(%rcx), %edx
salq $40, %rdx
xorq %rax, %rdx
.L18:
movzbl 4(%rcx), %eax
salq $32, %rax
xorq %rdx, %rax
.L19:
movzbl 3(%rcx), %edx
salq $24, %rdx
xorq %rax, %rdx
.L20:
movzbl 2(%rcx), %eax
salq $16, %rax
xorq %rdx, %rax
.L21:
movzbl 1(%rcx), %edx
salq $8, %rdx
xorq %rax, %rdx
.L22:
movzbl (%rcx), %eax
xorq %rdx, %rax
movabsq $-8663945395140668459, %rdx
imulq %rdx, %rax
rolq $31, %rax
movabsq $5545529020109919103, %rdx
imulq %rdx, %rax
xorq %rax, %rbx
.L6:
movslq %edi, %rdi
xorq %rdi, %rbx
xorq %rbp, %rdi
addq %rdi, %rbx
addq %rbx, %rdi
movq %rbx, %rax
shrq $33, %rax
xorq %rbx, %rax
movabsq $-49064778989728563, %rsi
imulq %rsi, %rax
movq %rax, %rdx
shrq $33, %rdx
xorq %rdx, %rax
movabsq $-4265267296055464877, %rcx
imulq %rcx, %rax
movq %rax, %r8
shrq $33, %r8
movq %rdi, %rdx
shrq $33, %rdx
xorq %rdi, %rdx
imulq %rsi, %rdx
movq %rdx, %rsi
shrq $33, %rsi
xorq %rsi, %rdx
imulq %rcx, %rdx
movq %rdx, %rcx
shrq $33, %rcx
xorq %rcx, %rdx
xorq %r8, %rax
addq %rdx, %rax
movq %rax, (%r11)
addq %rdx, %rax
movq %rax, 8(%r11)
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
movl $0, %edx
jmp .L10
.L34:
movl $0, %eax
jmp .L11
.L33:
movl $0, %edx
jmp .L12
.L32:
movl $0, %eax
jmp .L13
.L31:
movl $0, %edx
jmp .L14
.L30:
movl $0, %edx
jmp .L16
.L29:
movl $0, %eax
jmp .L17
.L28:
movl $0, %edx
jmp .L18
.L27:
movl $0, %eax
jmp .L19
.L26:
movl $0, %edx
jmp .L20
.L25:
movl $0, %eax
jmp .L21
.L24:
movl $0, %edx
jmp .L22
.cfi_endproc
.LFE2030:
.size _Z15MurmurHash3_128PKvijPv, .-_Z15MurmurHash3_128PKvijPv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "MurMurHash3.cuh"
__host__ __device__ inline uint64_t rotl64(uint64_t x, int8_t r)
{
return (x << r) | (x >> (64 - r));
}
__host__ __device__ inline uint64_t getblock64(const uint64_t *p, int i)
{
return p[i];
}
__host__ __device__ inline uint64_t fmix64(uint64_t k)
{
k ^= k >> 33;
k *= 0xff51afd7ed558ccd;
k ^= k >> 33;
k *= 0xc4ceb9fe1a85ec53;
k ^= k >> 33;
return k;
}
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out)
{
const uint8_t *data = (const uint8_t *)key;
const int nblocks = len / 16;
uint64_t h1 = seed;
uint64_t h2 = seed;
const uint64_t c1 = 0x87c37b91114253d5;
const uint64_t c2 = 0x4cf5ad432745937f;
//----------
// body
const uint64_t *blocks = (const uint64_t *)(data);
for (int i = 0; i < nblocks; i++)
{
uint64_t k1 = getblock64(blocks, i * 2 + 0);
uint64_t k2 = getblock64(blocks, i * 2 + 1);
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
h1 = rotl64(h1, 27);
h1 += h2;
h1 = h1 * 5 + 0x52dce729;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
h2 = rotl64(h2, 31);
h2 += h1;
h2 = h2 * 5 + 0x38495ab5;
}
//----------
// tail
const uint8_t *tail = (const uint8_t *)(data + nblocks * 16);
uint64_t k1 = 0;
uint64_t k2 = 0;
switch (len & 15)
{
case 15:
k2 ^= ((uint64_t)tail[14]) << 48;
case 14:
k2 ^= ((uint64_t)tail[13]) << 40;
case 13:
k2 ^= ((uint64_t)tail[12]) << 32;
case 12:
k2 ^= ((uint64_t)tail[11]) << 24;
case 11:
k2 ^= ((uint64_t)tail[10]) << 16;
case 10:
k2 ^= ((uint64_t)tail[9]) << 8;
case 9:
k2 ^= ((uint64_t)tail[8]) << 0;
k2 *= c2;
k2 = rotl64(k2, 33);
k2 *= c1;
h2 ^= k2;
case 8:
k1 ^= ((uint64_t)tail[7]) << 56;
case 7:
k1 ^= ((uint64_t)tail[6]) << 48;
case 6:
k1 ^= ((uint64_t)tail[5]) << 40;
case 5:
k1 ^= ((uint64_t)tail[4]) << 32;
case 4:
k1 ^= ((uint64_t)tail[3]) << 24;
case 3:
k1 ^= ((uint64_t)tail[2]) << 16;
case 2:
k1 ^= ((uint64_t)tail[1]) << 8;
case 1:
k1 ^= ((uint64_t)tail[0]) << 0;
k1 *= c1;
k1 = rotl64(k1, 31);
k1 *= c2;
h1 ^= k1;
};
//----------
// finalization
h1 ^= len;
h2 ^= len;
h1 += h2;
h2 += h1;
h1 = fmix64(h1);
h2 = fmix64(h2);
h1 += h2;
h2 += h1;
((uint64_t *)out)[0] = h1;
((uint64_t *)out)[1] = h2;
} | /**
* @file
* @brief The MurMur3 128-bit hash, with CUDA support
* @see https://github.com/aappleby/smhasher
*/
#ifndef MURMUR_HASH_3_CUH_
#define MURMUR_HASH_3_CUH_
#include <cstdint>
/**
* Create a 128-bit hash
*
* Actually MurmurHash3_x64_128
*
* @example
* char *elem = "aaa123";
* uint64_t hash[2];
* MurmurHash3_128(elem, sizeof(elem), 0, &hash);
* // hash[0] and hash[1] contain the hash
*
* @param key The pointer to the value to be hashed
* @param len The length of the key
* @param seed Any 32-bit value
* @param out The pointer to the output array
*/
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out);
#endif // MURMUR_HASH_3_CUH_ |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* @file
* @brief The MurMur3 128-bit hash, with CUDA support
* @see https://github.com/aappleby/smhasher
*/
#ifndef MURMUR_HASH_3_CUH_
#define MURMUR_HASH_3_CUH_
#include <cstdint>
/**
* Create a 128-bit hash
*
* Actually MurmurHash3_x64_128
*
* @example
* char *elem = "aaa123";
* uint64_t hash[2];
* MurmurHash3_128(elem, sizeof(elem), 0, &hash);
* // hash[0] and hash[1] contain the hash
*
* @param key The pointer to the value to be hashed
* @param len The length of the key
* @param seed Any 32-bit value
* @param out The pointer to the output array
*/
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out);
#endif // MURMUR_HASH_3_CUH_ | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* @file
* @brief The MurMur3 128-bit hash, with CUDA support
* @see https://github.com/aappleby/smhasher
*/
#ifndef MURMUR_HASH_3_CUH_
#define MURMUR_HASH_3_CUH_
#include <cstdint>
/**
* Create a 128-bit hash
*
* Actually MurmurHash3_x64_128
*
* @example
* char *elem = "aaa123";
* uint64_t hash[2];
* MurmurHash3_128(elem, sizeof(elem), 0, &hash);
* // hash[0] and hash[1] contain the hash
*
* @param key The pointer to the value to be hashed
* @param len The length of the key
* @param seed Any 32-bit value
* @param out The pointer to the output array
*/
__host__ __device__ void MurmurHash3_128(const void *key, int len, uint32_t seed, void *out);
#endif // MURMUR_HASH_3_CUH_ | .text
.file "MurMurHash3.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000de38b_00000000-6_MurMurHash3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2033:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z15MurmurHash3_128PKvijPv
.type _Z15MurmurHash3_128PKvijPv, @function
_Z15MurmurHash3_128PKvijPv:
.LFB2030:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
movq %rdi, %r8
movl %esi, %edi
movq %rcx, %r11
leal 15(%rsi), %ecx
testl %esi, %esi
cmovns %esi, %ecx
sarl $4, %ecx
movl %edx, %ebx
cmpl $15, %esi
jle .L23
movq %r8, %rdx
movq %rbx, %rbp
movl $0, %esi
movabsq $-8663945395140668459, %r10
movabsq $5545529020109919103, %r9
.L5:
movq %r10, %rax
imulq (%rdx), %rax
rolq $31, %rax
imulq %r9, %rax
xorq %rbx, %rax
rolq $27, %rax
addq %rbp, %rax
leaq 1390208809(%rax,%rax,4), %rbx
movq %r9, %rax
imulq 8(%rdx), %rax
rorq $31, %rax
imulq %r10, %rax
xorq %rbp, %rax
rolq $31, %rax
addq %rbx, %rax
leaq 944331445(%rax,%rax,4), %rbp
addl $1, %esi
addq $16, %rdx
cmpl %esi, %ecx
jg .L5
.L4:
sall $4, %ecx
movslq %ecx, %rcx
addq %r8, %rcx
movl %edi, %eax
andl $15, %eax
leaq .L8(%rip), %rdx
movslq (%rdx,%rax,4), %rax
addq %rdx, %rax
notrack jmp *%rax
.section .rodata
.align 4
.align 4
.L8:
.long .L6-.L8
.long .L24-.L8
.long .L25-.L8
.long .L26-.L8
.long .L27-.L8
.long .L28-.L8
.long .L29-.L8
.long .L30-.L8
.long .L15-.L8
.long .L31-.L8
.long .L32-.L8
.long .L33-.L8
.long .L34-.L8
.long .L35-.L8
.long .L36-.L8
.long .L7-.L8
.text
.L23:
movq %rbx, %rbp
jmp .L4
.L7:
movzbl 14(%rcx), %eax
salq $48, %rax
jmp .L9
.L36:
movl $0, %eax
.L9:
movzbl 13(%rcx), %edx
salq $40, %rdx
xorq %rax, %rdx
.L10:
movzbl 12(%rcx), %eax
salq $32, %rax
xorq %rdx, %rax
.L11:
movzbl 11(%rcx), %edx
salq $24, %rdx
xorq %rax, %rdx
.L12:
movzbl 10(%rcx), %eax
salq $16, %rax
xorq %rdx, %rax
.L13:
movzbl 9(%rcx), %edx
salq $8, %rdx
xorq %rax, %rdx
.L14:
movzbl 8(%rcx), %eax
xorq %rdx, %rax
movabsq $5545529020109919103, %rdx
imulq %rdx, %rax
rorq $31, %rax
movabsq $-8663945395140668459, %rdx
imulq %rdx, %rax
xorq %rax, %rbp
.L15:
movzbl 7(%rcx), %edx
salq $56, %rdx
.L16:
movzbl 6(%rcx), %eax
salq $48, %rax
xorq %rdx, %rax
.L17:
movzbl 5(%rcx), %edx
salq $40, %rdx
xorq %rax, %rdx
.L18:
movzbl 4(%rcx), %eax
salq $32, %rax
xorq %rdx, %rax
.L19:
movzbl 3(%rcx), %edx
salq $24, %rdx
xorq %rax, %rdx
.L20:
movzbl 2(%rcx), %eax
salq $16, %rax
xorq %rdx, %rax
.L21:
movzbl 1(%rcx), %edx
salq $8, %rdx
xorq %rax, %rdx
.L22:
movzbl (%rcx), %eax
xorq %rdx, %rax
movabsq $-8663945395140668459, %rdx
imulq %rdx, %rax
rolq $31, %rax
movabsq $5545529020109919103, %rdx
imulq %rdx, %rax
xorq %rax, %rbx
.L6:
movslq %edi, %rdi
xorq %rdi, %rbx
xorq %rbp, %rdi
addq %rdi, %rbx
addq %rbx, %rdi
movq %rbx, %rax
shrq $33, %rax
xorq %rbx, %rax
movabsq $-49064778989728563, %rsi
imulq %rsi, %rax
movq %rax, %rdx
shrq $33, %rdx
xorq %rdx, %rax
movabsq $-4265267296055464877, %rcx
imulq %rcx, %rax
movq %rax, %r8
shrq $33, %r8
movq %rdi, %rdx
shrq $33, %rdx
xorq %rdi, %rdx
imulq %rsi, %rdx
movq %rdx, %rsi
shrq $33, %rsi
xorq %rsi, %rdx
imulq %rcx, %rdx
movq %rdx, %rcx
shrq $33, %rcx
xorq %rcx, %rdx
xorq %r8, %rax
addq %rdx, %rax
movq %rax, (%r11)
addq %rdx, %rax
movq %rax, 8(%r11)
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
movl $0, %edx
jmp .L10
.L34:
movl $0, %eax
jmp .L11
.L33:
movl $0, %edx
jmp .L12
.L32:
movl $0, %eax
jmp .L13
.L31:
movl $0, %edx
jmp .L14
.L30:
movl $0, %edx
jmp .L16
.L29:
movl $0, %eax
jmp .L17
.L28:
movl $0, %edx
jmp .L18
.L27:
movl $0, %eax
jmp .L19
.L26:
movl $0, %edx
jmp .L20
.L25:
movl $0, %eax
jmp .L21
.L24:
movl $0, %edx
jmp .L22
.cfi_endproc
.LFE2030:
.size _Z15MurmurHash3_128PKvijPv, .-_Z15MurmurHash3_128PKvijPv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2056:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "MurMurHash3.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include "device_launch_parameters.h"
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
cudaEvent_t start, end;
cudaEventCreate(&start);
cudaEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
cudaMalloc((void **)&device_vector, vector_size);
cudaMalloc((void **)&device_indices, indices_size);
cudaMemcpy(device_vector, vector, vector_size, cudaMemcpyHostToDevice);
cudaEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
cudaEventRecord(end);
cudaMemcpy(indices, device_indices, indices_size, cudaMemcpyDeviceToHost);
cudaFree(device_vector);
cudaFree(device_indices);
cudaEventSynchronize(end);
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
cudaEventDestroy(start);
cudaEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
cudaDeviceReset();
return 0;
} | code for sm_80
Function : _Z17findIndicesKerneliPdPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x160], PT ; /* 0x0000580000007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0080*/ CS2R R18, SRZ ; /* 0x0000000000127805 */
/* 0x000fc6000001ff00 */
/*0090*/ ISETP.GE.AND P1, PT, R2, 0x1, PT ; /* 0x000000010200780c */
/* 0x000fda0003f26270 */
/*00a0*/ @!P1 BRA 0x8a0 ; /* 0x000007f000009947 */
/* 0x000fea0003800000 */
/*00b0*/ IADD3 R3, R2.reuse, -0x1, RZ ; /* 0xffffffff02037810 */
/* 0x040fe20007ffe0ff */
/*00c0*/ CS2R R18, SRZ ; /* 0x0000000000127805 */
/* 0x000fe2000001ff00 */
/*00d0*/ LOP3.LUT R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */
/* 0x000fe400078ec0ff */
/*00e0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe20003f06070 */
/*00f0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */
/* 0x000fd800078e00ff */
/*0100*/ @!P0 BRA 0x7f0 ; /* 0x000006e000008947 */
/* 0x000fea0003800000 */
/*0110*/ IADD3 R5, -R4, c[0x0][0x160], RZ ; /* 0x0000580004057a10 */
/* 0x000fe20007ffe1ff */
/*0120*/ IMAD.MOV.U32 R21, RZ, RZ, 0x8 ; /* 0x00000008ff157424 */
/* 0x000fe200078e00ff */
/*0130*/ CS2R R18, SRZ ; /* 0x0000000000127805 */
/* 0x000fe2000001ff00 */
/*0140*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */
/* 0x000fe200078e00ff */
/*0150*/ ISETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f04270 */
/*0160*/ IMAD.WIDE R20, R0, R21, c[0x0][0x168] ; /* 0x00005a0000147625 */
/* 0x000fd800078e0215 */
/*0170*/ @!P0 BRA 0x6f0 ; /* 0x0000057000008947 */
/* 0x000fea0003800000 */
/*0180*/ ISETP.GT.AND P2, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fe40003f44270 */
/*0190*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*01a0*/ @!P2 BRA 0x500 ; /* 0x000003500000a947 */
/* 0x000fea0003800000 */
/*01b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*01c0*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */
/* 0x0000a2000c1e1b00 */
/*01d0*/ IMAD.WIDE R22, R2, 0x8, R20 ; /* 0x0000000802167825 */
/* 0x000fca00078e0214 */
/*01e0*/ LDG.E.64 R16, [R22.64] ; /* 0x0000000416107981 */
/* 0x0002e2000c1e1b00 */
/*01f0*/ IMAD.WIDE R24, R2, 0x8, R22 ; /* 0x0000000802187825 */
/* 0x000fca00078e0216 */
/*0200*/ LDG.E.64 R14, [R24.64] ; /* 0x00000004180e7981 */
/* 0x000962000c1e1b00 */
/*0210*/ IMAD.WIDE R26, R2, 0x8, R24 ; /* 0x00000008021a7825 */
/* 0x000fca00078e0218 */
/*0220*/ LDG.E.64 R12, [R26.64] ; /* 0x000000041a0c7981 */
/* 0x000162000c1e1b00 */
/*0230*/ IMAD.WIDE R6, R2, 0x8, R26 ; /* 0x0000000802067825 */
/* 0x000fca00078e021a */
/*0240*/ LDG.E.64 R10, [R6.64] ; /* 0x00000004060a7981 */
/* 0x000162000c1e1b00 */
/*0250*/ IMAD.WIDE R28, R2, 0x8, R6 ; /* 0x00000008021c7825 */
/* 0x000fca00078e0206 */
/*0260*/ LDG.E.64 R6, [R28.64] ; /* 0x000000041c067981 */
/* 0x001164000c1e1b00 */
/*0270*/ IMAD.WIDE R28, R2, 0x8, R28 ; /* 0x00000008021c7825 */
/* 0x001fca00078e021c */
/*0280*/ LDG.E.64 R20, [R28.64] ; /* 0x000000041c147981 */
/* 0x000164000c1e1b00 */
/*0290*/ IMAD.WIDE R28, R2, 0x8, R28 ; /* 0x00000008021c7825 */
/* 0x001fca00078e021c */
/*02a0*/ LDG.E.64 R22, [R28.64] ; /* 0x000000041c167981 */
/* 0x002162000c1e1b00 */
/*02b0*/ IMAD.WIDE R24, R2, 0x8, R28 ; /* 0x0000000802187825 */
/* 0x010fcc00078e021c */
/*02c0*/ IMAD.WIDE R26, R2, 0x8, R24 ; /* 0x00000008021a7825 */
/* 0x000fe200078e0218 */
/*02d0*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0042e40000000012 */
/*02e0*/ LDG.E.64 R8, [R24.64] ; /* 0x0000000418087981 */
/* 0x0022a8000c1e1b00 */
/*02f0*/ DADD R16, R18, R16 ; /* 0x0000000012107229 */
/* 0x0087480000000010 */
/*0300*/ LDG.E.64 R18, [R26.64] ; /* 0x000000041a127981 */
/* 0x008724000c1e1b00 */
/*0310*/ DADD R14, R16, R14 ; /* 0x00000000100e7229 */
/* 0x020f62000000000e */
/*0320*/ IMAD.WIDE R26, R2, 0x8, R26 ; /* 0x00000008021a7825 */
/* 0x008fca00078e021a */
/*0330*/ DADD R12, R14, R12 ; /* 0x000000000e0c7229 */
/* 0x020ee2000000000c */
/*0340*/ LDG.E.64 R16, [R26.64] ; /* 0x000000041a107981 */
/* 0x000b22000c1e1b00 */
/*0350*/ IMAD.WIDE R24, R2, 0x8, R26 ; /* 0x0000000802187825 */
/* 0x002fc800078e021a */
/*0360*/ DADD R10, R12, R10 ; /* 0x000000000c0a7229 */
/* 0x008e62000000000a */
/*0370*/ LDG.E.64 R14, [R24.64] ; /* 0x00000004180e7981 */
/* 0x000722000c1e1b00 */
/*0380*/ IMAD.WIDE R28, R2, 0x8, R24 ; /* 0x00000008021c7825 */
/* 0x001fc800078e0218 */
/*0390*/ DADD R6, R10, R6 ; /* 0x000000000a067229 */
/* 0x002e220000000006 */
/*03a0*/ LDG.E.64 R12, [R28.64] ; /* 0x000000041c0c7981 */
/* 0x000324000c1e1b00 */
/*03b0*/ IMAD.WIDE R28, R2, 0x8, R28 ; /* 0x00000008021c7825 */
/* 0x002fc600078e021c */
/*03c0*/ DADD R20, R6, R20 ; /* 0x0000000006147229 */
/* 0x0010640000000014 */
/*03d0*/ LDG.E.64 R10, [R28.64] ; /* 0x000000041c0a7981 */
/* 0x000f22000c1e1b00 */
/*03e0*/ IMAD.WIDE R24, R2, 0x8, R28 ; /* 0x0000000802187825 */
/* 0x008fca00078e021c */
/*03f0*/ LDG.E.64 R6, [R24.64] ; /* 0x0000000418067981 */
/* 0x001ee2000c1e1b00 */
/*0400*/ IMAD.WIDE R26, R2, 0x8, R24 ; /* 0x00000008021a7825 */
/* 0x020fe200078e0218 */
/*0410*/ DADD R22, R20, R22 ; /* 0x0000000014167229 */
/* 0x0020880000000016 */
/*0420*/ LDG.E.64 R20, [R26.64] ; /* 0x000000041a147981 */
/* 0x001f62000c1e1b00 */
/*0430*/ IADD3 R5, R5, -0x10, RZ ; /* 0xfffffff005057810 */
/* 0x000fe40007ffe0ff */
/*0440*/ IADD3 R3, R3, 0x10, RZ ; /* 0x0000001003037810 */
/* 0x000fe40007ffe0ff */
/*0450*/ ISETP.GT.AND P2, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fe20003f44270 */
/*0460*/ DADD R8, R22, R8 ; /* 0x0000000016087229 */
/* 0x004f0c0000000008 */
/*0470*/ DADD R8, R8, R18 ; /* 0x0000000008087229 */
/* 0x010e0c0000000012 */
/*0480*/ DADD R8, R8, R16 ; /* 0x0000000008087229 */
/* 0x001e0c0000000010 */
/*0490*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */
/* 0x001e0c000000000e */
/*04a0*/ DADD R8, R8, R12 ; /* 0x0000000008087229 */
/* 0x001e0c000000000c */
/*04b0*/ DADD R8, R8, R10 ; /* 0x0000000008087229 */
/* 0x001ecc000000000a */
/*04c0*/ DADD R6, R8, R6 ; /* 0x0000000008067229 */
/* 0x008f4c0000000006 */
/*04d0*/ DADD R18, R6, R20 ; /* 0x0000000006127229 */
/* 0x0200640000000014 */
/*04e0*/ IMAD.WIDE R20, R2, 0x8, R26 ; /* 0x0000000802147825 */
/* 0x001fe200078e021a */
/*04f0*/ @P2 BRA 0x1c0 ; /* 0xfffffcc000002947 */
/* 0x002fea000383ffff */
/*0500*/ ISETP.GT.AND P2, PT, R5, 0x4, PT ; /* 0x000000040500780c */
/* 0x000fda0003f44270 */
/*0510*/ @!P2 BRA 0x6d0 ; /* 0x000001b00000a947 */
/* 0x000fea0003800000 */
/*0520*/ LDG.E.64 R24, [R20.64] ; /* 0x0000000414187981 */
/* 0x0000a2000c1e1b00 */
/*0530*/ IMAD.WIDE R22, R2, 0x8, R20 ; /* 0x0000000802167825 */
/* 0x000fca00078e0214 */
/*0540*/ LDG.E.64 R6, [R22.64] ; /* 0x0000000416067981 */
/* 0x0002e2000c1e1b00 */
/*0550*/ IMAD.WIDE R26, R2, 0x8, R22 ; /* 0x00000008021a7825 */
/* 0x000fca00078e0216 */
/*0560*/ LDG.E.64 R8, [R26.64] ; /* 0x000000041a087981 */
/* 0x000f22000c1e1b00 */
/*0570*/ IMAD.WIDE R28, R2, 0x8, R26 ; /* 0x00000008021c7825 */
/* 0x000fca00078e021a */
/*0580*/ LDG.E.64 R10, [R28.64] ; /* 0x000000041c0a7981 */
/* 0x000b24000c1e1b00 */
/*0590*/ IMAD.WIDE R28, R2, 0x8, R28 ; /* 0x00000008021c7825 */
/* 0x020fca00078e021c */
/*05a0*/ LDG.E.64 R12, [R28.64] ; /* 0x000000041c0c7981 */
/* 0x000f62000c1e1b00 */
/*05b0*/ IMAD.WIDE R16, R2, 0x8, R28 ; /* 0x0000000802107825 */
/* 0x000fca00078e021c */
/*05c0*/ LDG.E.64 R14, [R16.64] ; /* 0x00000004100e7981 */
/* 0x000362000c1e1b00 */
/*05d0*/ IMAD.WIDE R20, R2, 0x8, R16 ; /* 0x0000000802147825 */
/* 0x001fca00078e0210 */
/*05e0*/ LDG.E.64 R16, [R20.64] ; /* 0x0000000414107981 */
/* 0x002164000c1e1b00 */
/*05f0*/ IMAD.WIDE R20, R2, 0x8, R20 ; /* 0x0000000802147825 */
/* 0x001fca00078e0214 */
/*0600*/ LDG.E.64 R22, [R20.64] ; /* 0x0000000414167981 */
/* 0x000162000c1e1b00 */
/*0610*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0620*/ IADD3 R3, R3, 0x8, RZ ; /* 0x0000000803037810 */
/* 0x000fe40007ffe0ff */
/*0630*/ IADD3 R5, R5, -0x8, RZ ; /* 0xfffffff805057810 */
/* 0x000fe20007ffe0ff */
/*0640*/ IMAD.WIDE R20, R2, 0x8, R20 ; /* 0x0000000802147825 */
/* 0x001fe200078e0214 */
/*0650*/ DADD R24, R18, R24 ; /* 0x0000000012187229 */
/* 0x004ecc0000000018 */
/*0660*/ DADD R6, R24, R6 ; /* 0x0000000018067229 */
/* 0x008f0c0000000006 */
/*0670*/ DADD R6, R6, R8 ; /* 0x0000000006067229 */
/* 0x010e0c0000000008 */
/*0680*/ DADD R6, R6, R10 ; /* 0x0000000006067229 */
/* 0x001f4c000000000a */
/*0690*/ DADD R6, R6, R12 ; /* 0x0000000006067229 */
/* 0x020e0c000000000c */
/*06a0*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */
/* 0x001e0c000000000e */
/*06b0*/ DADD R6, R6, R16 ; /* 0x0000000006067229 */
/* 0x001e0c0000000010 */
/*06c0*/ DADD R18, R6, R22 ; /* 0x0000000006127229 */
/* 0x0010480000000016 */
/*06d0*/ ISETP.NE.OR P0, PT, R5, RZ, P0 ; /* 0x000000ff0500720c */
/* 0x000fda0000705670 */
/*06e0*/ @!P0 BRA 0x7f0 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*06f0*/ LDG.E.64 R6, [R20.64] ; /* 0x0000000414067981 */
/* 0x0010a2000c1e1b00 */
/*0700*/ IMAD.WIDE R14, R2, 0x8, R20 ; /* 0x00000008020e7825 */
/* 0x000fca00078e0214 */
/*0710*/ LDG.E.64 R8, [R14.64] ; /* 0x000000040e087981 */
/* 0x000ee2000c1e1b00 */
/*0720*/ IMAD.WIDE R16, R2, 0x8, R14 ; /* 0x0000000802107825 */
/* 0x000fca00078e020e */
/*0730*/ LDG.E.64 R10, [R16.64] ; /* 0x00000004100a7981 */
/* 0x000f22000c1e1b00 */
/*0740*/ IMAD.WIDE R22, R2, 0x8, R16 ; /* 0x0000000802167825 */
/* 0x000fca00078e0210 */
/*0750*/ LDG.E.64 R12, [R22.64] ; /* 0x00000004160c7981 */
/* 0x000f62000c1e1b00 */
/*0760*/ IADD3 R5, R5, -0x4, RZ ; /* 0xfffffffc05057810 */
/* 0x000fe20007ffe0ff */
/*0770*/ IMAD.WIDE R20, R2, 0x8, R22 ; /* 0x0000000802147825 */
/* 0x001fe200078e0216 */
/*0780*/ IADD3 R3, R3, 0x4, RZ ; /* 0x0000000403037810 */
/* 0x000fe40007ffe0ff */
/*0790*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*07a0*/ DADD R6, R6, R18 ; /* 0x0000000006067229 */
/* 0x006ecc0000000012 */
/*07b0*/ DADD R6, R6, R8 ; /* 0x0000000006067229 */
/* 0x008f0c0000000008 */
/*07c0*/ DADD R6, R6, R10 ; /* 0x0000000006067229 */
/* 0x010f4c000000000a */
/*07d0*/ DADD R18, R6, R12 ; /* 0x0000000006127229 */
/* 0x020064000000000c */
/*07e0*/ @P0 BRA 0x6f0 ; /* 0xffffff0000000947 */
/* 0x003fea000383ffff */
/*07f0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fda0003f05270 */
/*0800*/ @!P0 BRA 0x8a0 ; /* 0x0000009000008947 */
/* 0x000fea0003800000 */
/*0810*/ IMAD.MOV.U32 R6, RZ, RZ, 0x8 ; /* 0x00000008ff067424 */
/* 0x001fe400078e00ff */
/*0820*/ IMAD R3, R3, c[0x0][0x160], R0 ; /* 0x0000580003037a24 */
/* 0x000fc800078e0200 */
/*0830*/ IMAD.WIDE R6, R3, R6, c[0x0][0x168] ; /* 0x00005a0003067625 */
/* 0x000fca00078e0206 */
/*0840*/ LDG.E.64 R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x0010a2000c1e1b00 */
/*0850*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fc80007ffe0ff */
/*0860*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f05270 */
/*0870*/ IMAD.WIDE R6, R2, 0x8, R6 ; /* 0x0000000802067825 */
/* 0x001fe200078e0206 */
/*0880*/ DADD R18, R8, R18 ; /* 0x0000000008127229 */
/* 0x0060560000000012 */
/*0890*/ @P0 BRA 0x840 ; /* 0xffffffa000000947 */
/* 0x000fea000383ffff */
/*08a0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe400078e00ff */
/*08b0*/ IMAD.MOV.U32 R5, RZ, RZ, -0x1 ; /* 0xffffffffff057424 */
/* 0x000fe400078e00ff */
/*08c0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x170] ; /* 0x00005c0000027625 */
/* 0x000fca00078e0203 */
/*08d0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x0005e2000c101904 */
/*08e0*/ @!P1 EXIT ; /* 0x000000000000994d */
/* 0x000fea0003800000 */
/*08f0*/ I2F.F64 R8, c[0x0][0x160] ; /* 0x0000580000087b12 */
/* 0x001e220000201c00 */
/*0900*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1 ; /* 0x00000001ff047424 */
/* 0x000fe200078e00ff */
/*0910*/ FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT ; /* 0x036000001300780b */
/* 0x002fe20003f2e200 */
/*0920*/ BSSY B0, 0xa40 ; /* 0x0000011000007945 */
/* 0x000fea0003800000 */
/*0930*/ MUFU.RCP64H R5, R9 ; /* 0x0000000900057308 */
/* 0x005e240000001800 */
/*0940*/ DFMA R6, -R8, R4, 1 ; /* 0x3ff000000806742b */
/* 0x001e0c0000000104 */
/*0950*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */
/* 0x001e0c0000000006 */
/*0960*/ DFMA R6, R4, R6, R4 ; /* 0x000000060406722b */
/* 0x001e0c0000000004 */
/*0970*/ DFMA R4, -R8, R6, 1 ; /* 0x3ff000000804742b */
/* 0x001e0c0000000106 */
/*0980*/ DFMA R4, R6, R4, R6 ; /* 0x000000040604722b */
/* 0x001e0c0000000006 */
/*0990*/ DMUL R6, R4, R18 ; /* 0x0000001204067228 */
/* 0x001e0c0000000000 */
/*09a0*/ DFMA R10, -R8, R6, R18 ; /* 0x00000006080a722b */
/* 0x001e0c0000000112 */
/*09b0*/ DFMA R4, R4, R10, R6 ; /* 0x0000000a0404722b */
/* 0x001e140000000006 */
/*09c0*/ FFMA R6, RZ, R9, R5 ; /* 0x00000009ff067223 */
/* 0x001fca0000000005 */
/*09d0*/ FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ; /* 0x001000000600780b */
/* 0x000fda0003f04200 */
/*09e0*/ @P0 BRA P1, 0xa30 ; /* 0x0000004000000947 */
/* 0x000fea0000800000 */
/*09f0*/ IMAD.MOV.U32 R4, RZ, RZ, R18 ; /* 0x000000ffff047224 */
/* 0x000fe200078e0012 */
/*0a00*/ MOV R12, 0xa30 ; /* 0x00000a30000c7802 */
/* 0x000fe20000000f00 */
/*0a10*/ IMAD.MOV.U32 R5, RZ, RZ, R19 ; /* 0x000000ffff057224 */
/* 0x000fe400078e0013 */
/*0a20*/ CALL.REL.NOINC 0xb30 ; /* 0x0000010000007944 */
/* 0x000fea0003c00000 */
/*0a30*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0a40*/ BSSY B0, 0xb10 ; /* 0x000000c000007945 */
/* 0x000fe20003800000 */
/*0a50*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe400078e00ff */
/*0a60*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */
/* 0x000fe400078e00ff */
/*0a70*/ IMAD R6, R9, c[0x0][0x160], R0 ; /* 0x0000580009067a24 */
/* 0x000fc800078e0200 */
/*0a80*/ IMAD.WIDE R6, R6, R7, c[0x0][0x168] ; /* 0x00005a0006067625 */
/* 0x000fcc00078e0207 */
/*0a90*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ea4000c1e1b00 */
/*0aa0*/ DSETP.NEU.AND P0, PT, R6, R4, PT ; /* 0x000000040600722a */
/* 0x004e1c0003f0d000 */
/*0ab0*/ @!P0 BRA 0xb00 ; /* 0x0000004000008947 */
/* 0x001fea0003800000 */
/*0ac0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */
/* 0x000fc80007ffe0ff */
/*0ad0*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x160], PT ; /* 0x0000580009007a0c */
/* 0x000fda0003f06270 */
/*0ae0*/ @!P0 BRA 0xa60 ; /* 0xffffff7000008947 */
/* 0x000fea000383ffff */
/*0af0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b00*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0b10*/ STG.E [R2.64], R0 ; /* 0x0000000002007986 */
/* 0x000fe2000c101904 */
/*0b20*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b30*/ FSETP.GEU.AND P0, PT, |R9|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000900780b */
/* 0x040fe20003f0e200 */
/*0b40*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff0e7424 */
/* 0x000fe200078e00ff */
/*0b50*/ LOP3.LUT R6, R9, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff09067812 */
/* 0x000fe200078ec0ff */
/*0b60*/ IMAD.MOV.U32 R16, RZ, RZ, 0x1 ; /* 0x00000001ff107424 */
/* 0x000fe200078e00ff */
/*0b70*/ FSETP.GEU.AND P2, PT, |R5|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */
/* 0x040fe20003f4e200 */
/*0b80*/ BSSY B1, 0x10d0 ; /* 0x0000054000017945 */
/* 0x000fe20003800000 */
/*0b90*/ LOP3.LUT R7, R6, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000006077812 */
/* 0x000fe200078efcff */
/*0ba0*/ IMAD.MOV.U32 R6, RZ, RZ, R8 ; /* 0x000000ffff067224 */
/* 0x000fe200078e0008 */
/*0bb0*/ LOP3.LUT R13, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000050d7812 */
/* 0x000fe400078ec0ff */
/*0bc0*/ LOP3.LUT R18, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009127812 */
/* 0x000fc600078ec0ff */
/*0bd0*/ @!P0 DMUL R6, R8, 8.98846567431157953865e+307 ; /* 0x7fe0000008068828 */
/* 0x000e220000000000 */
/*0be0*/ ISETP.GE.U32.AND P1, PT, R13, R18, PT ; /* 0x000000120d00720c */
/* 0x000fc60003f26070 */
/*0bf0*/ @!P2 LOP3.LUT R10, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000090aa812 */
/* 0x000fe200078ec0ff */
/*0c00*/ @!P2 IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff16a224 */
/* 0x000fe200078e00ff */
/*0c10*/ MUFU.RCP64H R17, R7 ; /* 0x0000000700117308 */
/* 0x001e220000001800 */
/*0c20*/ SEL R11, R14.reuse, 0x63400000, !P1 ; /* 0x634000000e0b7807 */
/* 0x040fe40004800000 */
/*0c30*/ @!P2 ISETP.GE.U32.AND P3, PT, R13, R10, PT ; /* 0x0000000a0d00a20c */
/* 0x000fe20003f66070 */
/*0c40*/ IMAD.MOV.U32 R10, RZ, RZ, R4 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e0004 */
/*0c50*/ LOP3.LUT R11, R11, 0x800fffff, R5, 0xf8, !PT ; /* 0x800fffff0b0b7812 */
/* 0x000fe400078ef805 */
/*0c60*/ @!P2 SEL R15, R14, 0x63400000, !P3 ; /* 0x634000000e0fa807 */
/* 0x000fc80005800000 */
/*0c70*/ @!P2 LOP3.LUT R15, R15, 0x80000000, R5, 0xf8, !PT ; /* 0x800000000f0fa812 */
/* 0x000fc800078ef805 */
/*0c80*/ @!P2 LOP3.LUT R23, R15, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000f17a812 */
/* 0x000fe200078efcff */
/*0c90*/ DFMA R20, R16, -R6, 1 ; /* 0x3ff000001014742b */
/* 0x001e220000000806 */
/*0ca0*/ MOV R15, R13 ; /* 0x0000000d000f7202 */
/* 0x000fc80000000f00 */
/*0cb0*/ @!P2 DFMA R10, R10, 2, -R22 ; /* 0x400000000a0aa82b */
/* 0x0003e40000000816 */
/*0cc0*/ IMAD.MOV.U32 R22, RZ, RZ, R18 ; /* 0x000000ffff167224 */
/* 0x002fe200078e0012 */
/*0cd0*/ @!P0 LOP3.LUT R22, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007168812 */
/* 0x000fe200078ec0ff */
/*0ce0*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */
/* 0x001e060000000014 */
/*0cf0*/ IADD3 R23, R22, -0x1, RZ ; /* 0xffffffff16177810 */
/* 0x000fc60007ffe0ff */
/*0d00*/ DFMA R16, R16, R20, R16 ; /* 0x000000141010722b */
/* 0x001e220000000010 */
/*0d10*/ @!P2 LOP3.LUT R15, R11, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000b0fa812 */
/* 0x000fca00078ec0ff */
/*0d20*/ DFMA R20, R16, -R6, 1 ; /* 0x3ff000001014742b */
/* 0x001e0c0000000806 */
/*0d30*/ DFMA R16, R16, R20, R16 ; /* 0x000000141010722b */
/* 0x0010640000000010 */
/*0d40*/ IADD3 R20, R15, -0x1, RZ ; /* 0xffffffff0f147810 */
/* 0x001fc80007ffe0ff */
/*0d50*/ ISETP.GT.U32.AND P0, PT, R20, 0x7feffffe, PT ; /* 0x7feffffe1400780c */
/* 0x000fe20003f04070 */
/*0d60*/ DMUL R18, R16, R10 ; /* 0x0000000a10127228 */
/* 0x002e060000000000 */
/*0d70*/ ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ; /* 0x7feffffe1700780c */
/* 0x000fc60000704470 */
/*0d80*/ DFMA R20, R18, -R6, R10 ; /* 0x800000061214722b */
/* 0x001e0c000000000a */
/*0d90*/ DFMA R16, R16, R20, R18 ; /* 0x000000141010722b */
/* 0x0010480000000012 */
/*0da0*/ @P0 BRA 0xf70 ; /* 0x000001c000000947 */
/* 0x000fea0003800000 */
/*0db0*/ LOP3.LUT R18, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009127812 */
/* 0x003fc800078ec0ff */
/*0dc0*/ ISETP.GE.U32.AND P0, PT, R13.reuse, R18, PT ; /* 0x000000120d00720c */
/* 0x040fe20003f06070 */
/*0dd0*/ IMAD.IADD R4, R13, 0x1, -R18 ; /* 0x000000010d047824 */
/* 0x000fc600078e0a12 */
/*0de0*/ SEL R13, R14, 0x63400000, !P0 ; /* 0x634000000e0d7807 */
/* 0x000fe40004000000 */
/*0df0*/ IMNMX R4, R4, -0x46a00000, !PT ; /* 0xb960000004047817 */
/* 0x000fc80007800200 */
/*0e00*/ IMNMX R4, R4, 0x46a00000, PT ; /* 0x46a0000004047817 */
/* 0x000fca0003800200 */
/*0e10*/ IMAD.IADD R13, R4, 0x1, -R13 ; /* 0x00000001040d7824 */
/* 0x000fe400078e0a0d */
/*0e20*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x000fc600078e00ff */
/*0e30*/ IADD3 R5, R13, 0x7fe00000, RZ ; /* 0x7fe000000d057810 */
/* 0x000fcc0007ffe0ff */
/*0e40*/ DMUL R18, R16, R4 ; /* 0x0000000410127228 */
/* 0x000e140000000000 */
/*0e50*/ FSETP.GTU.AND P0, PT, |R19|, 1.469367938527859385e-39, PT ; /* 0x001000001300780b */
/* 0x001fda0003f0c200 */
/*0e60*/ @P0 BRA 0x10c0 ; /* 0x0000025000000947 */
/* 0x000fea0003800000 */
/*0e70*/ DFMA R6, R16, -R6, R10 ; /* 0x800000061006722b */
/* 0x000e22000000000a */
/*0e80*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x000fd200078e00ff */
/*0e90*/ FSETP.NEU.AND P0, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720b */
/* 0x041fe40003f0d000 */
/*0ea0*/ LOP3.LUT R9, R7, 0x80000000, R9, 0x48, !PT ; /* 0x8000000007097812 */
/* 0x000fc800078e4809 */
/*0eb0*/ LOP3.LUT R5, R9, R5, RZ, 0xfc, !PT ; /* 0x0000000509057212 */
/* 0x000fce00078efcff */
/*0ec0*/ @!P0 BRA 0x10c0 ; /* 0x000001f000008947 */
/* 0x000fea0003800000 */
/*0ed0*/ IMAD.MOV R7, RZ, RZ, -R13 ; /* 0x000000ffff077224 */
/* 0x000fe200078e0a0d */
/*0ee0*/ DMUL.RP R4, R16, R4 ; /* 0x0000000410047228 */
/* 0x000e220000008000 */
/*0ef0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fcc00078e00ff */
/*0f00*/ DFMA R6, R18, -R6, R16 ; /* 0x800000061206722b */
/* 0x000e460000000010 */
/*0f10*/ LOP3.LUT R9, R5, R9, RZ, 0x3c, !PT ; /* 0x0000000905097212 */
/* 0x001fc600078e3cff */
/*0f20*/ IADD3 R6, -R13, -0x43300000, RZ ; /* 0xbcd000000d067810 */
/* 0x002fc80007ffe1ff */
/*0f30*/ FSETP.NEU.AND P0, PT, |R7|, R6, PT ; /* 0x000000060700720b */
/* 0x000fc80003f0d200 */
/*0f40*/ FSEL R18, R4, R18, !P0 ; /* 0x0000001204127208 */
/* 0x000fe40004000000 */
/*0f50*/ FSEL R19, R9, R19, !P0 ; /* 0x0000001309137208 */
/* 0x000fe20004000000 */
/*0f60*/ BRA 0x10c0 ; /* 0x0000015000007947 */
/* 0x000fea0003800000 */
/*0f70*/ DSETP.NAN.AND P0, PT, R4, R4, PT ; /* 0x000000040400722a */
/* 0x003e1c0003f08000 */
/*0f80*/ @P0 BRA 0x10a0 ; /* 0x0000011000000947 */
/* 0x001fea0003800000 */
/*0f90*/ DSETP.NAN.AND P0, PT, R8, R8, PT ; /* 0x000000080800722a */
/* 0x000e1c0003f08000 */
/*0fa0*/ @P0 BRA 0x1070 ; /* 0x000000c000000947 */
/* 0x001fea0003800000 */
/*0fb0*/ ISETP.NE.AND P0, PT, R15, R22, PT ; /* 0x000000160f00720c */
/* 0x000fe20003f05270 */
/*0fc0*/ IMAD.MOV.U32 R18, RZ, RZ, 0x0 ; /* 0x00000000ff127424 */
/* 0x000fe400078e00ff */
/*0fd0*/ IMAD.MOV.U32 R19, RZ, RZ, -0x80000 ; /* 0xfff80000ff137424 */
/* 0x000fd400078e00ff */
/*0fe0*/ @!P0 BRA 0x10c0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0ff0*/ ISETP.NE.AND P0, PT, R15, 0x7ff00000, PT ; /* 0x7ff000000f00780c */
/* 0x000fe40003f05270 */
/*1000*/ LOP3.LUT R19, R5, 0x80000000, R9, 0x48, !PT ; /* 0x8000000005137812 */
/* 0x000fe400078e4809 */
/*1010*/ ISETP.EQ.OR P0, PT, R22, RZ, !P0 ; /* 0x000000ff1600720c */
/* 0x000fda0004702670 */
/*1020*/ @P0 LOP3.LUT R4, R19, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff0000013040812 */
/* 0x000fe400078efcff */
/*1030*/ @!P0 MOV R18, RZ ; /* 0x000000ff00128202 */
/* 0x000fe20000000f00 */
/*1040*/ @P0 IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff120224 */
/* 0x000fe400078e00ff */
/*1050*/ @P0 IMAD.MOV.U32 R19, RZ, RZ, R4 ; /* 0x000000ffff130224 */
/* 0x000fe200078e0004 */
/*1060*/ BRA 0x10c0 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*1070*/ LOP3.LUT R19, R9, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000009137812 */
/* 0x000fe200078efcff */
/*1080*/ IMAD.MOV.U32 R18, RZ, RZ, R8 ; /* 0x000000ffff127224 */
/* 0x000fe200078e0008 */
/*1090*/ BRA 0x10c0 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*10a0*/ LOP3.LUT R19, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000005137812 */
/* 0x000fe200078efcff */
/*10b0*/ IMAD.MOV.U32 R18, RZ, RZ, R4 ; /* 0x000000ffff127224 */
/* 0x000fe400078e0004 */
/*10c0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*10d0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x0 ; /* 0x00000000ff0d7424 */
/* 0x000fe400078e00ff */
/*10e0*/ IMAD.MOV.U32 R4, RZ, RZ, R18 ; /* 0x000000ffff047224 */
/* 0x000fc400078e0012 */
/*10f0*/ IMAD.MOV.U32 R5, RZ, RZ, R19 ; /* 0x000000ffff057224 */
/* 0x000fe200078e0013 */
/*1100*/ RET.REL.NODEC R12 0x0 ; /* 0xffffeef00c007950 */
/* 0x000fec0003c3ffff */
/*1110*/ BRA 0x1110; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include "device_launch_parameters.h"
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
cudaEvent_t start, end;
cudaEventCreate(&start);
cudaEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
cudaMalloc((void **)&device_vector, vector_size);
cudaMalloc((void **)&device_indices, indices_size);
cudaMemcpy(device_vector, vector, vector_size, cudaMemcpyHostToDevice);
cudaEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
cudaEventRecord(end);
cudaMemcpy(indices, device_indices, indices_size, cudaMemcpyDeviceToHost);
cudaFree(device_vector);
cudaFree(device_indices);
cudaEventSynchronize(end);
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
cudaEventDestroy(start);
cudaEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
cudaDeviceReset();
return 0;
} | .file "tmpxft_0018ec14_00000000-6_matrix_avg.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "A fajl nem talalhato!"
.LC2:
.string "%lf "
.text
.globl _Z10readMatrixiPc
.type _Z10readMatrixiPc, @function
_Z10readMatrixiPc:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %rdi
leaq .LC0(%rip), %rsi
call fopen@PLT
testq %rax, %rax
je .L8
movq %rax, %rbp
imull %ebx, %ebx
movslq %ebx, %rdi
salq $3, %rdi
call malloc@PLT
movq %rax, %r13
movq %rax, %rbx
leaq .LC2(%rip), %r12
.L5:
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $8, %rbx
cmpl $-1, %eax
jne .L5
movq %rbp, %rdi
call fclose@PLT
movq %r13, %rax
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10readMatrixiPc, .-_Z10readMatrixiPc
.section .rodata.str1.1
.LC3:
.string "w"
.LC4:
.string "time.txt"
.LC5:
.string "%dx%d matrix: %.8lf s"
.text
.globl _Z17printMeasuredTimeid
.type _Z17printMeasuredTimeid, @function
_Z17printMeasuredTimeid:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebp
movsd %xmm0, 8(%rsp)
leaq .LC3(%rip), %rsi
leaq .LC4(%rip), %rdi
call fopen@PLT
movq %rax, %rbx
movsd 8(%rsp), %xmm0
movl %ebp, %r8d
movl %ebp, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $1, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fclose@PLT
addq $24, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z17printMeasuredTimeid, .-_Z17printMeasuredTimeid
.section .rodata.str1.1
.LC6:
.string "output.txt"
.LC7:
.string "%d "
.text
.globl _Z12printResultsiPi
.type _Z12printResultsiPi, @function
_Z12printResultsiPi:
.LFB2060:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebp
movq %rsi, %r13
leaq .LC3(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %r12
testl %ebp, %ebp
jle .L12
movq %r13, %rbx
movslq %ebp, %rbp
leaq 0(%r13,%rbp,4), %rbp
leaq .LC7(%rip), %r13
jmp .L14
.L13:
addq $4, %rbx
cmpq %rbp, %rbx
je .L12
.L14:
movl (%rbx), %ecx
cmpl $-1, %ecx
je .L13
movq %r13, %rdx
movl $2, %esi
movq %r12, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L12:
movq %r12, %rdi
call fclose@PLT
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _Z12printResultsiPi, .-_Z12printResultsiPi
.globl _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
.type _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi, @function
_Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L21
.L17:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L22
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17findIndicesKerneliPdPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L17
.L22:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi, .-_Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
.globl _Z17findIndicesKerneliPdPi
.type _Z17findIndicesKerneliPdPi, @function
_Z17findIndicesKerneliPdPi:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z17findIndicesKerneliPdPi, .-_Z17findIndicesKerneliPdPi
.globl _Z11findIndicesiPd
.type _Z11findIndicesiPd, @function
_Z11findIndicesiPd:
.LFB2059:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movl %edi, %ebx
movq %rsi, %r14
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %edi, %ebp
imull %edi, %ebp
movslq %ebp, %rbp
salq $3, %rbp
movslq %edi, %r12
salq $2, %r12
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movq %r12, %rdi
call malloc@PLT
movq %rax, %r13
leaq 8(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movq %rsp, %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leal 255(%rbx), %eax
testl %ebx, %ebx
cmovns %ebx, %eax
sarl $8, %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L26:
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %r12, %rdx
movq (%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, 44(%rsp)
leaq 44(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 44(%rsp), %xmm0
divss .LC9(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl %ebx, %edi
call _Z17printMeasuredTimeid
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L30
movq %r13, %rax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
movq (%rsp), %rdx
movq 8(%rsp), %rsi
movl %ebx, %edi
call _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
jmp .L26
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z11findIndicesiPd, .-_Z11findIndicesiPd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC10:
.string "Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
cmpl $1, %edi
jle .L35
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $0, %esi
call strtod@PLT
cvttsd2sil %xmm0, %r12d
movq 16(%rbx), %rsi
movl %r12d, %edi
call _Z10readMatrixiPc
movq %rax, %rbp
movq %rax, %rsi
movl %r12d, %edi
call _Z11findIndicesiPd
movq %rax, %rbx
movq %rax, %rsi
movl %r12d, %edi
call _Z12printResultsiPi
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
call cudaDeviceReset@PLT
movl $0, %eax
.L31:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L31
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z17findIndicesKerneliPdPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z17findIndicesKerneliPdPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC9:
.long 1148846080
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include "device_launch_parameters.h"
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
cudaEvent_t start, end;
cudaEventCreate(&start);
cudaEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
cudaMalloc((void **)&device_vector, vector_size);
cudaMalloc((void **)&device_indices, indices_size);
cudaMemcpy(device_vector, vector, vector_size, cudaMemcpyHostToDevice);
cudaEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
cudaEventRecord(end);
cudaMemcpy(indices, device_indices, indices_size, cudaMemcpyDeviceToHost);
cudaFree(device_vector);
cudaFree(device_indices);
cudaEventSynchronize(end);
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
cudaEventDestroy(start);
cudaEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
cudaDeviceReset();
return 0;
} | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
hipEvent_t start, end;
hipEventCreate(&start);
hipEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
hipMalloc((void **)&device_vector, vector_size);
hipMalloc((void **)&device_indices, indices_size);
hipMemcpy(device_vector, vector, vector_size, hipMemcpyHostToDevice);
hipEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
hipEventRecord(end);
hipMemcpy(indices, device_indices, indices_size, hipMemcpyDeviceToHost);
hipFree(device_vector);
hipFree(device_indices);
hipEventSynchronize(end);
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
hipEventDestroy(start);
hipEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
hipDeviceReset();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
hipEvent_t start, end;
hipEventCreate(&start);
hipEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
hipMalloc((void **)&device_vector, vector_size);
hipMalloc((void **)&device_indices, indices_size);
hipMemcpy(device_vector, vector, vector_size, hipMemcpyHostToDevice);
hipEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
hipEventRecord(end);
hipMemcpy(indices, device_indices, indices_size, hipMemcpyDeviceToHost);
hipFree(device_vector);
hipFree(device_indices);
hipEventSynchronize(end);
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
hipEventDestroy(start);
hipEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
hipDeviceReset();
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17findIndicesKerneliPdPi
.globl _Z17findIndicesKerneliPdPi
.p2align 8
.type _Z17findIndicesKerneliPdPi,@function
_Z17findIndicesKerneliPdPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_11
s_load_b64 s[2:3], s[0:1], 0x8
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_4
v_mov_b32_e32 v2, v1
s_mov_b32 s5, s4
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v3, 31, v2
s_add_i32 s5, s5, -1
s_cmp_eq_u32 s5, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[6:7], 3, v[2:3]
v_add_nc_u32_e32 v2, s4, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s2, v6
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
global_load_b64 v[6:7], v[6:7], off
s_waitcnt vmcnt(0)
v_add_f64 v[4:5], v[4:5], v[6:7]
s_cbranch_scc0 .LBB0_3
.LBB0_4:
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v0, -1
s_cmp_lt_i32 s4, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v0, off
s_cbranch_scc1 .LBB0_11
v_cvt_f64_i32_e32 v[6:7], s4
s_mov_b32 s0, 0
s_mov_b32 s5, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[8:9], null, v[6:7], v[6:7], v[4:5]
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
v_div_scale_f64 v[12:13], vcc_lo, v[4:5], v[6:7], v[4:5]
v_mul_f64 v[14:15], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[8:9], v[14:15], v[12:13]
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[14:15]
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f64 v[4:5], v[8:9], v[6:7], v[4:5]
v_mov_b32_e32 v6, v1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_7
.p2align 6
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s8, exec_lo, s7
s_or_b32 s0, s8, s0
s_and_not1_b32 s1, s1, exec_lo
s_and_b32 s8, s6, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s1, s1, s8
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_9
.LBB0_7:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v6
s_or_b32 s6, s6, exec_lo
s_or_b32 s7, s7, exec_lo
s_mov_b32 s8, exec_lo
v_lshlrev_b64 v[7:8], 3, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s2, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
global_load_b64 v[7:8], v[7:8], off
s_waitcnt vmcnt(0)
v_cmpx_neq_f64_e32 v[7:8], v[4:5]
s_cbranch_execz .LBB0_6
s_add_i32 s5, s5, -1
v_add_nc_u32_e32 v6, s4, v6
s_cmp_eq_u32 s5, 0
s_cselect_b32 s9, -1, 0
s_and_not1_b32 s7, s7, exec_lo
s_and_b32 s9, s9, exec_lo
s_and_not1_b32 s6, s6, exec_lo
s_or_b32 s7, s7, s9
s_branch .LBB0_6
.LBB0_9:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s0
s_and_saveexec_b32 s0, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_11
global_store_b32 v[2:3], v1, off
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z17findIndicesKerneliPdPi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 16
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z17findIndicesKerneliPdPi, .Lfunc_end0-_Z17findIndicesKerneliPdPi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z17findIndicesKerneliPdPi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z17findIndicesKerneliPdPi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 16
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* The program must read in an NxN matrix with floating point numbers. The program must determine
* the index of columns, which contains one element that is equal to the average of the values in
* the same column. The outputs are the indices of the columns.
*/
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#define BLOCK_SIZE 256
double* readMatrix(int size, char *filename) {
double *vector;
FILE *fp = fopen(filename, "r");
if (fp == NULL) {
printf("A fajl nem talalhato!");
exit(1);
}
vector = (double *) malloc(size * size * sizeof(double));
int i = 0;
while (fscanf(fp, "%lf ", &vector[i]) != EOF) {
i++;
}
fclose(fp);
return vector;
}
__global__ void findIndicesKernel(int size, double *vector, int *indices) {
int col = blockIdx.x * blockDim.x + threadIdx.x;
double sum = 0.0;
if (col < size)
{
for (int row = 0; row < size; row++) {
sum += vector[col + row * size];
}
double avg = sum / size;
indices[col] = -1;
for (int row = 0; row < size; row++) {
if (vector[col + row * size] == avg) {
indices[col] = col;
break;
}
}
}
}
void printMeasuredTime(int size, double time) {
FILE *fp = fopen("time.txt", "w");
fprintf(fp, "%dx%d matrix: %.8lf s", size, size, time);
fclose(fp);
}
int* findIndices(int size, double *vector) {
int *indices, *device_indices;
double *device_vector;
size_t vector_size = size * size * sizeof(double);
size_t indices_size = size * sizeof(int);
hipEvent_t start, end;
hipEventCreate(&start);
hipEventCreate(&end);
indices = (int *)malloc(size * sizeof(int));
hipMalloc((void **)&device_vector, vector_size);
hipMalloc((void **)&device_indices, indices_size);
hipMemcpy(device_vector, vector, vector_size, hipMemcpyHostToDevice);
hipEventRecord(start);
findIndicesKernel<<<ceil(size / BLOCK_SIZE), BLOCK_SIZE>>>(size, device_vector, device_indices);
hipEventRecord(end);
hipMemcpy(indices, device_indices, indices_size, hipMemcpyDeviceToHost);
hipFree(device_vector);
hipFree(device_indices);
hipEventSynchronize(end);
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, end);
printMeasuredTime(size, milliseconds / 1000);
hipEventDestroy(start);
hipEventDestroy(end);
return indices;
}
void printResults(int size, int *indices) {
FILE *fp = fopen("output.txt", "w");
for (int i = 0; i < size; i++) {
if (indices[i] != -1) {
fprintf(fp, "%d ", indices[i]);
}
}
fclose(fp);
}
int main(int argc, char **argv) {
if (argc < 2) {
printf("Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt");
return 1;
}
int size = strtod(argv[1], NULL);
double *vector = readMatrix(size, argv[2]);
int *indices = findIndices(size, vector);
printResults(size, indices);
free(vector);
free(indices);
hipDeviceReset();
return 0;
} | .text
.file "matrix_avg.hip"
.globl _Z10readMatrixiPc # -- Begin function _Z10readMatrixiPc
.p2align 4, 0x90
.type _Z10readMatrixiPc,@function
_Z10readMatrixiPc: # @_Z10readMatrixiPc
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rax
movl %edi, %r14d
movl $.L.str, %esi
movq %rax, %rdi
callq fopen
testq %rax, %rax
je .LBB0_4
# %bb.1:
movq %rax, %rbx
imull %r14d, %r14d
shlq $3, %r14
movq %r14, %rdi
callq malloc
movq %rax, %r14
movq %rax, %r15
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movl $.L.str.2, %esi
movq %rbx, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $8, %r15
cmpl $-1, %eax
jne .LBB0_2
# %bb.3:
movq %rbx, %rdi
callq fclose
movq %r14, %rax
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB0_4:
.cfi_def_cfa_offset 32
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end0:
.size _Z10readMatrixiPc, .Lfunc_end0-_Z10readMatrixiPc
.cfi_endproc
# -- End function
.globl _Z32__device_stub__findIndicesKerneliPdPi # -- Begin function _Z32__device_stub__findIndicesKerneliPdPi
.p2align 4, 0x90
.type _Z32__device_stub__findIndicesKerneliPdPi,@function
_Z32__device_stub__findIndicesKerneliPdPi: # @_Z32__device_stub__findIndicesKerneliPdPi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17findIndicesKerneliPdPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z32__device_stub__findIndicesKerneliPdPi, .Lfunc_end1-_Z32__device_stub__findIndicesKerneliPdPi
.cfi_endproc
# -- End function
.globl _Z17printMeasuredTimeid # -- Begin function _Z17printMeasuredTimeid
.p2align 4, 0x90
.type _Z17printMeasuredTimeid,@function
_Z17printMeasuredTimeid: # @_Z17printMeasuredTimeid
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movsd %xmm0, (%rsp) # 8-byte Spill
movl %edi, %ebx
movl $.L.str.3, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r14
movl $.L.str.5, %esi
movq %rax, %rdi
movl %ebx, %edx
movl %ebx, %ecx
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq %r14, %rdi
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end2:
.size _Z17printMeasuredTimeid, .Lfunc_end2-_Z17printMeasuredTimeid
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11findIndicesiPd
.LCPI3_0:
.long 0x447a0000 # float 1000
.text
.globl _Z11findIndicesiPd
.p2align 4, 0x90
.type _Z11findIndicesiPd,@function
_Z11findIndicesiPd: # @_Z11findIndicesiPd
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r12
movl %edi, %ebx
movl %edi, %r13d
imull %r13d, %r13d
shlq $3, %r13
movslq %edi, %rbp
leaq (,%rbp,4), %r15
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %r15, %rdi
callq malloc
movq %rax, %r14
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leal 255(%rbp), %edi
testl %ebp, %ebp
cmovnsl %ebx, %edi
sarl $8, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $256, %rdx # imm = 0x100
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_2
# %bb.1:
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
movl %ebx, 44(%rsp)
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 48(%rsp)
leaq 144(%rsp), %rax
movq %rax, 56(%rsp)
leaq 136(%rsp), %rax
movq %rax, 64(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z17findIndicesKerneliPdPi, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_2:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipEventSynchronize
movl $0, 48(%rsp)
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 48(%rsp), %rdi
callq hipEventElapsedTime
movss 48(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss .LCPI3_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movsd %xmm0, 80(%rsp) # 8-byte Spill
movl $.L.str.3, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r15
movl $.L.str.5, %esi
movq %rax, %rdi
movl %ebx, %edx
movl %ebx, %ecx
movsd 80(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq %r15, %rdi
callq fclose
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movq %r14, %rax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z11findIndicesiPd, .Lfunc_end3-_Z11findIndicesiPd
.cfi_endproc
# -- End function
.globl _Z12printResultsiPi # -- Begin function _Z12printResultsiPi
.p2align 4, 0x90
.type _Z12printResultsiPi,@function
_Z12printResultsiPi: # @_Z12printResultsiPi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
movl $.L.str.6, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r14
testl %ebp, %ebp
jle .LBB4_5
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r15d
xorl %r12d, %r12d
jmp .LBB4_2
.p2align 4, 0x90
.LBB4_4: # in Loop: Header=BB4_2 Depth=1
incq %r12
cmpq %r12, %r15
je .LBB4_5
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r12,4), %edx
cmpl $-1, %edx
je .LBB4_4
# %bb.3: # in Loop: Header=BB4_2 Depth=1
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq fprintf
jmp .LBB4_4
.LBB4_5: # %._crit_edge
movq %r14, %rdi
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end4:
.size _Z12printResultsiPi, .Lfunc_end4-_Z12printResultsiPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jg .LBB5_2
# %bb.1:
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $1, %eax
jmp .LBB5_11
.LBB5_2:
movq 8(%rsi), %rdi
movq %rsi, %rbx
xorl %esi, %esi
callq strtod
movsd %xmm0, (%rsp) # 8-byte Spill
movq 16(%rbx), %rdi
movl $.L.str, %esi
callq fopen
testq %rax, %rax
je .LBB5_12
# %bb.3:
movq %rax, %r14
cvttsd2si (%rsp), %ebp # 8-byte Folded Reload
movl %ebp, %edi
imull %edi, %edi
shlq $3, %rdi
callq malloc
movq %rax, %rbx
movq %rax, %r15
.p2align 4, 0x90
.LBB5_4: # =>This Inner Loop Header: Depth=1
movl $.L.str.2, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $8, %r15
cmpl $-1, %eax
jne .LBB5_4
# %bb.5: # %_Z10readMatrixiPc.exit
movq %r14, %rdi
callq fclose
movl %ebp, %edi
movq %rbx, %rsi
callq _Z11findIndicesiPd
movq %rax, %r14
movl $.L.str.6, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r15
testl %ebp, %ebp
jle .LBB5_10
# %bb.6: # %.lr.ph.preheader.i
movl %ebp, %r12d
xorl %r13d, %r13d
jmp .LBB5_7
.p2align 4, 0x90
.LBB5_9: # in Loop: Header=BB5_7 Depth=1
incq %r13
cmpq %r13, %r12
je .LBB5_10
.LBB5_7: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl (%r14,%r13,4), %edx
cmpl $-1, %edx
je .LBB5_9
# %bb.8: # in Loop: Header=BB5_7 Depth=1
movl $.L.str.7, %esi
movq %r15, %rdi
xorl %eax, %eax
callq fprintf
jmp .LBB5_9
.LBB5_10: # %_Z12printResultsiPi.exit
movq %r15, %rdi
callq fclose
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
.LBB5_11:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_12:
.cfi_def_cfa_offset 64
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17findIndicesKerneliPdPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "A fajl nem talalhato!"
.size .L.str.1, 22
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%lf "
.size .L.str.2, 5
.type _Z17findIndicesKerneliPdPi,@object # @_Z17findIndicesKerneliPdPi
.section .rodata,"a",@progbits
.globl _Z17findIndicesKerneliPdPi
.p2align 3, 0x0
_Z17findIndicesKerneliPdPi:
.quad _Z32__device_stub__findIndicesKerneliPdPi
.size _Z17findIndicesKerneliPdPi, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "time.txt"
.size .L.str.3, 9
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "w"
.size .L.str.4, 2
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%dx%d matrix: %.8lf s"
.size .L.str.5, 22
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "output.txt"
.size .L.str.6, 11
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "%d "
.size .L.str.7, 4
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt"
.size .L.str.8, 103
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z17findIndicesKerneliPdPi"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__findIndicesKerneliPdPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17findIndicesKerneliPdPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018ec14_00000000-6_matrix_avg.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2064:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "r"
.LC1:
.string "A fajl nem talalhato!"
.LC2:
.string "%lf "
.text
.globl _Z10readMatrixiPc
.type _Z10readMatrixiPc, @function
_Z10readMatrixiPc:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %rdi
leaq .LC0(%rip), %rsi
call fopen@PLT
testq %rax, %rax
je .L8
movq %rax, %rbp
imull %ebx, %ebx
movslq %ebx, %rdi
salq $3, %rdi
call malloc@PLT
movq %rax, %r13
movq %rax, %rbx
leaq .LC2(%rip), %r12
.L5:
movq %rbx, %rdx
movq %r12, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_fscanf@PLT
addq $8, %rbx
cmpl $-1, %eax
jne .L5
movq %rbp, %rdi
call fclose@PLT
movq %r13, %rax
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10readMatrixiPc, .-_Z10readMatrixiPc
.section .rodata.str1.1
.LC3:
.string "w"
.LC4:
.string "time.txt"
.LC5:
.string "%dx%d matrix: %.8lf s"
.text
.globl _Z17printMeasuredTimeid
.type _Z17printMeasuredTimeid, @function
_Z17printMeasuredTimeid:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $24, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebp
movsd %xmm0, 8(%rsp)
leaq .LC3(%rip), %rsi
leaq .LC4(%rip), %rdi
call fopen@PLT
movq %rax, %rbx
movsd 8(%rsp), %xmm0
movl %ebp, %r8d
movl %ebp, %ecx
leaq .LC5(%rip), %rdx
movl $2, %esi
movq %rax, %rdi
movl $1, %eax
call __fprintf_chk@PLT
movq %rbx, %rdi
call fclose@PLT
addq $24, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z17printMeasuredTimeid, .-_Z17printMeasuredTimeid
.section .rodata.str1.1
.LC6:
.string "output.txt"
.LC7:
.string "%d "
.text
.globl _Z12printResultsiPi
.type _Z12printResultsiPi, @function
_Z12printResultsiPi:
.LFB2060:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebp
movq %rsi, %r13
leaq .LC3(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %r12
testl %ebp, %ebp
jle .L12
movq %r13, %rbx
movslq %ebp, %rbp
leaq 0(%r13,%rbp,4), %rbp
leaq .LC7(%rip), %r13
jmp .L14
.L13:
addq $4, %rbx
cmpq %rbp, %rbx
je .L12
.L14:
movl (%rbx), %ecx
cmpl $-1, %ecx
je .L13
movq %r13, %rdx
movl $2, %esi
movq %r12, %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L13
.L12:
movq %r12, %rdi
call fclose@PLT
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _Z12printResultsiPi, .-_Z12printResultsiPi
.globl _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
.type _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi, @function
_Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi:
.LFB2086:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movl %edi, 28(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 28(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L21
.L17:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L22
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z17findIndicesKerneliPdPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L17
.L22:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi, .-_Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
.globl _Z17findIndicesKerneliPdPi
.type _Z17findIndicesKerneliPdPi, @function
_Z17findIndicesKerneliPdPi:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z17findIndicesKerneliPdPi, .-_Z17findIndicesKerneliPdPi
.globl _Z11findIndicesiPd
.type _Z11findIndicesiPd, @function
_Z11findIndicesiPd:
.LFB2059:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movl %edi, %ebx
movq %rsi, %r14
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl %edi, %ebp
imull %edi, %ebp
movslq %ebp, %rbp
salq $3, %rbp
movslq %edi, %r12
salq $2, %r12
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
leaq 24(%rsp), %rdi
call cudaEventCreate@PLT
movq %r12, %rdi
call malloc@PLT
movq %rax, %r13
leaq 8(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movq %rsp, %rdi
movq %r12, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %r14, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leal 255(%rbx), %eax
testl %ebx, %ebx
cmovns %ebx, %eax
sarl $8, %eax
movl %eax, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L26:
movl $0, %esi
movq 24(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %r12, %rdx
movq (%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaEventSynchronize@PLT
movl $0x00000000, 44(%rsp)
leaq 44(%rsp), %rdi
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 44(%rsp), %xmm0
divss .LC9(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl %ebx, %edi
call _Z17printMeasuredTimeid
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
movq 24(%rsp), %rdi
call cudaEventDestroy@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L30
movq %r13, %rax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %rbp
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r13
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
ret
.L29:
.cfi_restore_state
movq (%rsp), %rdx
movq 8(%rsp), %rsi
movl %ebx, %edi
call _Z40__device_stub__Z17findIndicesKerneliPdPiiPdPi
jmp .L26
.L30:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z11findIndicesiPd, .-_Z11findIndicesiPd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC10:
.string "Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt"
.text
.globl main
.type main, @function
main:
.LFB2061:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
cmpl $1, %edi
jle .L35
movq %rsi, %rbx
movq 8(%rsi), %rdi
movl $0, %esi
call strtod@PLT
cvttsd2sil %xmm0, %r12d
movq 16(%rbx), %rsi
movl %r12d, %edi
call _Z10readMatrixiPc
movq %rax, %rbp
movq %rax, %rsi
movl %r12d, %edi
call _Z11findIndicesiPd
movq %rax, %rbx
movq %rax, %rsi
movl %r12d, %edi
call _Z12printResultsiPi
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
call cudaDeviceReset@PLT
movl $0, %eax
.L31:
popq %rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L35:
.cfi_restore_state
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L31
.cfi_endproc
.LFE2061:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z17findIndicesKerneliPdPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z17findIndicesKerneliPdPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC9:
.long 1148846080
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrix_avg.hip"
.globl _Z10readMatrixiPc # -- Begin function _Z10readMatrixiPc
.p2align 4, 0x90
.type _Z10readMatrixiPc,@function
_Z10readMatrixiPc: # @_Z10readMatrixiPc
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rsi, %rax
movl %edi, %r14d
movl $.L.str, %esi
movq %rax, %rdi
callq fopen
testq %rax, %rax
je .LBB0_4
# %bb.1:
movq %rax, %rbx
imull %r14d, %r14d
shlq $3, %r14
movq %r14, %rdi
callq malloc
movq %rax, %r14
movq %rax, %r15
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movl $.L.str.2, %esi
movq %rbx, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $8, %r15
cmpl $-1, %eax
jne .LBB0_2
# %bb.3:
movq %rbx, %rdi
callq fclose
movq %r14, %rax
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB0_4:
.cfi_def_cfa_offset 32
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end0:
.size _Z10readMatrixiPc, .Lfunc_end0-_Z10readMatrixiPc
.cfi_endproc
# -- End function
.globl _Z32__device_stub__findIndicesKerneliPdPi # -- Begin function _Z32__device_stub__findIndicesKerneliPdPi
.p2align 4, 0x90
.type _Z32__device_stub__findIndicesKerneliPdPi,@function
_Z32__device_stub__findIndicesKerneliPdPi: # @_Z32__device_stub__findIndicesKerneliPdPi
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movl %edi, 12(%rsp)
movq %rsi, 72(%rsp)
movq %rdx, 64(%rsp)
leaq 12(%rsp), %rax
movq %rax, 80(%rsp)
leaq 72(%rsp), %rax
movq %rax, 88(%rsp)
leaq 64(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z17findIndicesKerneliPdPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z32__device_stub__findIndicesKerneliPdPi, .Lfunc_end1-_Z32__device_stub__findIndicesKerneliPdPi
.cfi_endproc
# -- End function
.globl _Z17printMeasuredTimeid # -- Begin function _Z17printMeasuredTimeid
.p2align 4, 0x90
.type _Z17printMeasuredTimeid,@function
_Z17printMeasuredTimeid: # @_Z17printMeasuredTimeid
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movsd %xmm0, (%rsp) # 8-byte Spill
movl %edi, %ebx
movl $.L.str.3, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r14
movl $.L.str.5, %esi
movq %rax, %rdi
movl %ebx, %edx
movl %ebx, %ecx
movsd (%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq %r14, %rdi
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end2:
.size _Z17printMeasuredTimeid, .Lfunc_end2-_Z17printMeasuredTimeid
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z11findIndicesiPd
.LCPI3_0:
.long 0x447a0000 # float 1000
.text
.globl _Z11findIndicesiPd
.p2align 4, 0x90
.type _Z11findIndicesiPd,@function
_Z11findIndicesiPd: # @_Z11findIndicesiPd
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $152, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %r12
movl %edi, %ebx
movl %edi, %r13d
imull %r13d, %r13d
shlq $3, %r13
movslq %edi, %rbp
leaq (,%rbp,4), %r15
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq %r15, %rdi
callq malloc
movq %rax, %r14
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
leaq 32(%rsp), %rdi
movq %r15, %rsi
callq hipMalloc
movq 24(%rsp), %rdi
movq %r12, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
leal 255(%rbp), %edi
testl %ebp, %ebp
cmovnsl %ebx, %edi
sarl $8, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $256, %rdx # imm = 0x100
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB3_2
# %bb.1:
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
movl %ebx, 44(%rsp)
movq %rax, 144(%rsp)
movq %rcx, 136(%rsp)
leaq 44(%rsp), %rax
movq %rax, 48(%rsp)
leaq 144(%rsp), %rax
movq %rax, 56(%rsp)
leaq 136(%rsp), %rax
movq %rax, 64(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
leaq 96(%rsp), %rdx
leaq 88(%rsp), %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z17findIndicesKerneliPdPi, %edi
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB3_2:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rsi
movq %r14, %rdi
movq %r15, %rdx
movl $2, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipEventSynchronize
movl $0, 48(%rsp)
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 48(%rsp), %rdi
callq hipEventElapsedTime
movss 48(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss .LCPI3_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movsd %xmm0, 80(%rsp) # 8-byte Spill
movl $.L.str.3, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r15
movl $.L.str.5, %esi
movq %rax, %rdi
movl %ebx, %edx
movl %ebx, %ecx
movsd 80(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq %r15, %rdi
callq fclose
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movq %r14, %rax
addq $152, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z11findIndicesiPd, .Lfunc_end3-_Z11findIndicesiPd
.cfi_endproc
# -- End function
.globl _Z12printResultsiPi # -- Begin function _Z12printResultsiPi
.p2align 4, 0x90
.type _Z12printResultsiPi,@function
_Z12printResultsiPi: # @_Z12printResultsiPi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
movl $.L.str.6, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r14
testl %ebp, %ebp
jle .LBB4_5
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r15d
xorl %r12d, %r12d
jmp .LBB4_2
.p2align 4, 0x90
.LBB4_4: # in Loop: Header=BB4_2 Depth=1
incq %r12
cmpq %r12, %r15
je .LBB4_5
.LBB4_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl (%rbx,%r12,4), %edx
cmpl $-1, %edx
je .LBB4_4
# %bb.3: # in Loop: Header=BB4_2 Depth=1
movl $.L.str.7, %esi
movq %r14, %rdi
xorl %eax, %eax
callq fprintf
jmp .LBB4_4
.LBB4_5: # %._crit_edge
movq %r14, %rdi
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp fclose # TAILCALL
.Lfunc_end4:
.size _Z12printResultsiPi, .Lfunc_end4-_Z12printResultsiPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $1, %edi
jg .LBB5_2
# %bb.1:
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl $1, %eax
jmp .LBB5_11
.LBB5_2:
movq 8(%rsi), %rdi
movq %rsi, %rbx
xorl %esi, %esi
callq strtod
movsd %xmm0, (%rsp) # 8-byte Spill
movq 16(%rbx), %rdi
movl $.L.str, %esi
callq fopen
testq %rax, %rax
je .LBB5_12
# %bb.3:
movq %rax, %r14
cvttsd2si (%rsp), %ebp # 8-byte Folded Reload
movl %ebp, %edi
imull %edi, %edi
shlq $3, %rdi
callq malloc
movq %rax, %rbx
movq %rax, %r15
.p2align 4, 0x90
.LBB5_4: # =>This Inner Loop Header: Depth=1
movl $.L.str.2, %esi
movq %r14, %rdi
movq %r15, %rdx
xorl %eax, %eax
callq __isoc23_fscanf
addq $8, %r15
cmpl $-1, %eax
jne .LBB5_4
# %bb.5: # %_Z10readMatrixiPc.exit
movq %r14, %rdi
callq fclose
movl %ebp, %edi
movq %rbx, %rsi
callq _Z11findIndicesiPd
movq %rax, %r14
movl $.L.str.6, %edi
movl $.L.str.4, %esi
callq fopen
movq %rax, %r15
testl %ebp, %ebp
jle .LBB5_10
# %bb.6: # %.lr.ph.preheader.i
movl %ebp, %r12d
xorl %r13d, %r13d
jmp .LBB5_7
.p2align 4, 0x90
.LBB5_9: # in Loop: Header=BB5_7 Depth=1
incq %r13
cmpq %r13, %r12
je .LBB5_10
.LBB5_7: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl (%r14,%r13,4), %edx
cmpl $-1, %edx
je .LBB5_9
# %bb.8: # in Loop: Header=BB5_7 Depth=1
movl $.L.str.7, %esi
movq %r15, %rdi
xorl %eax, %eax
callq fprintf
jmp .LBB5_9
.LBB5_10: # %_Z12printResultsiPi.exit
movq %r15, %rdi
callq fclose
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
callq hipDeviceReset
xorl %eax, %eax
.LBB5_11:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_12:
.cfi_def_cfa_offset 64
movl $.L.str.1, %edi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17findIndicesKerneliPdPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "r"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "A fajl nem talalhato!"
.size .L.str.1, 22
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%lf "
.size .L.str.2, 5
.type _Z17findIndicesKerneliPdPi,@object # @_Z17findIndicesKerneliPdPi
.section .rodata,"a",@progbits
.globl _Z17findIndicesKerneliPdPi
.p2align 3, 0x0
_Z17findIndicesKerneliPdPi:
.quad _Z32__device_stub__findIndicesKerneliPdPi
.size _Z17findIndicesKerneliPdPi, 8
.type .L.str.3,@object # @.str.3
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.3:
.asciz "time.txt"
.size .L.str.3, 9
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "w"
.size .L.str.4, 2
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%dx%d matrix: %.8lf s"
.size .L.str.5, 22
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "output.txt"
.size .L.str.6, 11
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "%d "
.size .L.str.7, 4
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Kerem, adja meg a matrix meretet\n es az azt tartalmazo fajl\neleresi utvonalat!\nPelda: hf1 5 matrix.txt"
.size .L.str.8, 103
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z17findIndicesKerneliPdPi"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__findIndicesKerneliPdPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17findIndicesKerneliPdPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} | code for sm_80
Function : _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0020*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x188], PT ; /* 0x0000620000007a0c */
/* 0x001fda0003f06270 */
/*0030*/ @P0 BRA 0x250 ; /* 0x0000021000000947 */
/* 0x000fea0003800000 */
/*0040*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x001fe200078e00ff */
/*0050*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fcc00078e0203 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0090*/ BSSY B0, 0x220 ; /* 0x0000018000007945 */
/* 0x000fe20003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x004fda0003f05270 */
/*00b0*/ @P0 BRA 0x210 ; /* 0x0000015000000947 */
/* 0x020fea0003800000 */
/*00c0*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00e0*/ LEA R2, P0, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000027a11 */
/* 0x000fc800078010ff */
/*00f0*/ LEA.HI.X R3, R0, c[0x0][0x16c], R3, 0x2, P0 ; /* 0x00005b0000037a11 */
/* 0x000fca00000f1403 */
/*0100*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea4000c1e1900 */
/*0110*/ ISETP.NE.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x004fda0003f05270 */
/*0120*/ @P0 BRA 0x210 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0130*/ S2R R2, SR_LANEID ; /* 0x0000000000027919 */
/* 0x000e220000000000 */
/*0140*/ REDUX.MIN.S32 UR5, R0 ; /* 0x00000000000573c4 */
/* 0x000e620000010200 */
/*0150*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe200038e0100 */
/*0160*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1 ; /* 0x00000001ff097424 */
/* 0x000fe200078e00ff */
/*0170*/ UFLO.U32 UR4, UR4 ; /* 0x00000004000472bd */
/* 0x000fe200080e0000 */
/*0180*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fe400078e00ff */
/*0190*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */
/* 0x000fe400078e00ff */
/*01a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */
/* 0x000fe200078e00ff */
/*01b0*/ ISETP.EQ.U32.AND P0, PT, R2, UR4, PT ; /* 0x0000000402007c0c */
/* 0x001fe2000bf02070 */
/*01c0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff027624 */
/* 0x000fc400078e00ff */
/*01d0*/ IMAD.U32 R7, RZ, RZ, UR5 ; /* 0x00000005ff077e24 */
/* 0x002fe2000f8e00ff */
/*01e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*01f0*/ ATOMG.E.EXCH.STRONG.GPU PT, RZ, [R2.64], R9 ; /* 0x0000000902ff79a8 */
/* 0x00016e000c1ee1c4 */
/*0200*/ @P0 RED.E.MIN.S32.STRONG.GPU [R4.64], R7 ; /* 0x000000070400098e */
/* 0x0001e4000c90e384 */
/*0210*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0220*/ IADD3 R0, R0, c[0x0][0x0], RZ ; /* 0x0000000000007a10 */
/* 0x000fc80007ffe0ff */
/*0230*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x188], PT ; /* 0x0000620000007a0c */
/* 0x000fda0003f06270 */
/*0240*/ @!P0 BRA 0x40 ; /* 0xfffffdf000008947 */
/* 0x000fea000383ffff */
/*0250*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe20003800000 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0280*/ BRA 0x280; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} | .file "tmpxft_000ac8a3_00000000-6_check_existance_of_candidate_rows.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i
.type _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i, @function
_Z33check_existance_of_candidate_rowsPsPiiS0_S0_i:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i, .-_Z33check_existance_of_candidate_rowsPsPiiS0_S0_i
.globl _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
.type _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i, @function
_Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movl %edx, 28(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movl %r9d, 24(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 28(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 24(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z33check_existance_of_candidate_rowsPiS_iS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i, .-_Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i, @function
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, .-_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z33check_existance_of_candidate_rowsPiS_iS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z33check_existance_of_candidate_rowsPiS_iS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 8
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i,@function
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
s_load_b32 s2, s[0:1], 0x28
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_9
s_clause 0x3
s_load_b32 s12, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 1
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s12, 0xffff
s_mov_b32 s12, 0
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v0, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s2, v0
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execz .LBB0_9
.LBB0_3:
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_co_u32 v5, vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v2, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e32 0, v5
s_cbranch_execz .LBB0_2
v_add_co_u32 v1, vcc_lo, s10, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, s0, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_2
global_atomic_swap_b32 v3, v4, s[4:5]
s_mov_b32 s15, exec_lo
s_brev_b32 s14, -2
.LBB0_6:
s_ctz_i32_b32 s16, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_readlane_b32 s17, v0, s16
s_lshl_b32 s16, 1, s16
s_and_not1_b32 s15, s15, s16
s_delay_alu instid0(VALU_DEP_1)
s_min_i32 s14, s14, s17
s_cmp_lg_u32 s15, 0
s_cbranch_scc1 .LBB0_6
v_mbcnt_lo_u32_b32 v1, exec_lo, 0
s_mov_b32 s15, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v1
s_xor_b32 s15, exec_lo, s15
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v1, s14
global_atomic_min_i32 v3, v1, s[6:7]
s_branch .LBB0_2
.LBB0_9:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 304
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 18
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, .Lfunc_end0-_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 48
.size: 4
.value_kind: hidden_block_count_x
- .offset: 52
.size: 4
.value_kind: hidden_block_count_y
- .offset: 56
.size: 4
.value_kind: hidden_block_count_z
- .offset: 60
.size: 2
.value_kind: hidden_group_size_x
- .offset: 62
.size: 2
.value_kind: hidden_group_size_y
- .offset: 64
.size: 2
.value_kind: hidden_group_size_z
- .offset: 66
.size: 2
.value_kind: hidden_remainder_x
- .offset: 68
.size: 2
.value_kind: hidden_remainder_y
- .offset: 70
.size: 2
.value_kind: hidden_remainder_z
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 112
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 304
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 20
.sgpr_spill_count: 0
.symbol: _Z33check_existance_of_candidate_rowsPiS_iS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ void check_existance_of_candidate_rows( short *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
// atomicExch(token, 1);
*token = 1;
atomicMin(selected_row_id, i);
// If find a number can break;
// break;
}
}
}
__global__ void check_existance_of_candidate_rows( int *deleted_rows, int *row_group, const int search_depth, int *token, int *selected_row_id, const int total_dl_matrix_row_num) {
for (int i = threadIdx.x; i < total_dl_matrix_row_num; i = i + blockDim.x) {
// std::cout<<deleted_rows[i]<<' '<<row_group[i]<<std::endl;
if (deleted_rows[i] == 0 && row_group[i] == search_depth) {
// std::cout<<"Candidate Row Found...."<<std::endl;
atomicExch(token, 1);
atomicMin(selected_row_id, i);
}
}
__syncthreads();
} | .text
.file "check_existance_of_candidate_rows.hip"
.globl _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i # -- Begin function _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 4, 0x90
.type _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i,@function
_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i: # @_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movl %edx, 12(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 8(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 72(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rax
movq %rax, 128(%rsp)
leaq 8(%rsp), %rax
movq %rax, 136(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z33check_existance_of_candidate_rowsPiS_iS_S_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i, .Lfunc_end0-_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z33check_existance_of_candidate_rowsPiS_iS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i,@object # @_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .rodata,"a",@progbits
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 3, 0x0
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
.quad _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z33check_existance_of_candidate_rowsPiS_iS_S_i"
.size .L__unnamed_1, 48
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0020*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x188], PT ; /* 0x0000620000007a0c */
/* 0x001fda0003f06270 */
/*0030*/ @P0 BRA 0x250 ; /* 0x0000021000000947 */
/* 0x000fea0003800000 */
/*0040*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x001fe200078e00ff */
/*0050*/ YIELD ; /* 0x0000000000007946 */
/* 0x000fe20003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fcc00078e0203 */
/*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1900 */
/*0090*/ BSSY B0, 0x220 ; /* 0x0000018000007945 */
/* 0x000fe20003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x004fda0003f05270 */
/*00b0*/ @P0 BRA 0x210 ; /* 0x0000015000000947 */
/* 0x020fea0003800000 */
/*00c0*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00e0*/ LEA R2, P0, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000027a11 */
/* 0x000fc800078010ff */
/*00f0*/ LEA.HI.X R3, R0, c[0x0][0x16c], R3, 0x2, P0 ; /* 0x00005b0000037a11 */
/* 0x000fca00000f1403 */
/*0100*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea4000c1e1900 */
/*0110*/ ISETP.NE.AND P0, PT, R2, c[0x0][0x170], PT ; /* 0x00005c0002007a0c */
/* 0x004fda0003f05270 */
/*0120*/ @P0 BRA 0x210 ; /* 0x000000e000000947 */
/* 0x000fea0003800000 */
/*0130*/ S2R R2, SR_LANEID ; /* 0x0000000000027919 */
/* 0x000e220000000000 */
/*0140*/ REDUX.MIN.S32 UR5, R0 ; /* 0x00000000000573c4 */
/* 0x000e620000010200 */
/*0150*/ VOTEU.ANY UR4, UPT, PT ; /* 0x0000000000047886 */
/* 0x000fe200038e0100 */
/*0160*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1 ; /* 0x00000001ff097424 */
/* 0x000fe200078e00ff */
/*0170*/ UFLO.U32 UR4, UR4 ; /* 0x00000004000472bd */
/* 0x000fe200080e0000 */
/*0180*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fe400078e00ff */
/*0190*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */
/* 0x000fe400078e00ff */
/*01a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */
/* 0x000fe200078e00ff */
/*01b0*/ ISETP.EQ.U32.AND P0, PT, R2, UR4, PT ; /* 0x0000000402007c0c */
/* 0x001fe2000bf02070 */
/*01c0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff027624 */
/* 0x000fc400078e00ff */
/*01d0*/ IMAD.U32 R7, RZ, RZ, UR5 ; /* 0x00000005ff077e24 */
/* 0x002fe2000f8e00ff */
/*01e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*01f0*/ ATOMG.E.EXCH.STRONG.GPU PT, RZ, [R2.64], R9 ; /* 0x0000000902ff79a8 */
/* 0x00016e000c1ee1c4 */
/*0200*/ @P0 RED.E.MIN.S32.STRONG.GPU [R4.64], R7 ; /* 0x000000070400098e */
/* 0x0001e4000c90e384 */
/*0210*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0220*/ IADD3 R0, R0, c[0x0][0x0], RZ ; /* 0x0000000000007a10 */
/* 0x000fc80007ffe0ff */
/*0230*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x188], PT ; /* 0x0000620000007a0c */
/* 0x000fda0003f06270 */
/*0240*/ @!P0 BRA 0x40 ; /* 0xfffffdf000008947 */
/* 0x000fea000383ffff */
/*0250*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe20003800000 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0280*/ BRA 0x280; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0290*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 8
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i,@function
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
s_load_b32 s2, s[0:1], 0x28
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s2, v0
s_cbranch_execz .LBB0_9
s_clause 0x3
s_load_b32 s12, s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 1
s_waitcnt lgkmcnt(0)
s_and_b32 s1, s12, 0xffff
s_mov_b32 s12, 0
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v0, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s2, v0
s_or_b32 s12, vcc_lo, s12
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execz .LBB0_9
.LBB0_3:
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_co_u32 v5, vcc_lo, s8, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v2, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e32 0, v5
s_cbranch_execz .LBB0_2
v_add_co_u32 v1, vcc_lo, s10, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, s0, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_2
global_atomic_swap_b32 v3, v4, s[4:5]
s_mov_b32 s15, exec_lo
s_brev_b32 s14, -2
.LBB0_6:
s_ctz_i32_b32 s16, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_readlane_b32 s17, v0, s16
s_lshl_b32 s16, 1, s16
s_and_not1_b32 s15, s15, s16
s_delay_alu instid0(VALU_DEP_1)
s_min_i32 s14, s14, s17
s_cmp_lg_u32 s15, 0
s_cbranch_scc1 .LBB0_6
v_mbcnt_lo_u32_b32 v1, exec_lo, 0
s_mov_b32 s15, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v1
s_xor_b32 s15, exec_lo, s15
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v1, s14
global_atomic_min_i32 v3, v1, s[6:7]
s_branch .LBB0_2
.LBB0_9:
s_set_inst_prefetch_distance 0x2
s_or_b32 exec_lo, exec_lo, s3
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 304
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 7
.amdhsa_next_free_sgpr 18
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, .Lfunc_end0-_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 48
.size: 4
.value_kind: hidden_block_count_x
- .offset: 52
.size: 4
.value_kind: hidden_block_count_y
- .offset: 56
.size: 4
.value_kind: hidden_block_count_z
- .offset: 60
.size: 2
.value_kind: hidden_group_size_x
- .offset: 62
.size: 2
.value_kind: hidden_group_size_y
- .offset: 64
.size: 2
.value_kind: hidden_group_size_z
- .offset: 66
.size: 2
.value_kind: hidden_remainder_x
- .offset: 68
.size: 2
.value_kind: hidden_remainder_y
- .offset: 70
.size: 2
.value_kind: hidden_remainder_z
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 112
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 304
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 20
.sgpr_spill_count: 0
.symbol: _Z33check_existance_of_candidate_rowsPiS_iS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 7
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ac8a3_00000000-6_check_existance_of_candidate_rows.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2030:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i
.type _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i, @function
_Z33check_existance_of_candidate_rowsPsPiiS0_S0_i:
.LFB2027:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2027:
.size _Z33check_existance_of_candidate_rowsPsPiiS0_S0_i, .-_Z33check_existance_of_candidate_rowsPsPiiS0_S0_i
.globl _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
.type _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i, @function
_Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i:
.LFB2052:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movl %edx, 28(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movl %r9d, 24(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 28(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
leaq 24(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z33check_existance_of_candidate_rowsPiS_iS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i, .-_Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i, @function
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
.LFB2053:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z61__device_stub__Z33check_existance_of_candidate_rowsPiS_iS_S_iPiS_iS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2053:
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, .-_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z33check_existance_of_candidate_rowsPiS_iS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z33check_existance_of_candidate_rowsPiS_iS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2055:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "check_existance_of_candidate_rows.hip"
.globl _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i # -- Begin function _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 4, 0x90
.type _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i,@function
_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i: # @_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movl %edx, 12(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movl %r9d, 8(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 72(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rax
movq %rax, 128(%rsp)
leaq 8(%rsp), %rax
movq %rax, 136(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z33check_existance_of_candidate_rowsPiS_iS_S_i, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i, .Lfunc_end0-_Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z33check_existance_of_candidate_rowsPiS_iS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z33check_existance_of_candidate_rowsPiS_iS_S_i,@object # @_Z33check_existance_of_candidate_rowsPiS_iS_S_i
.section .rodata,"a",@progbits
.globl _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.p2align 3, 0x0
_Z33check_existance_of_candidate_rowsPiS_iS_S_i:
.quad _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.size _Z33check_existance_of_candidate_rowsPiS_iS_S_i, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z33check_existance_of_candidate_rowsPiS_iS_S_i"
.size .L__unnamed_1, 48
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z48__device_stub__check_existance_of_candidate_rowsPiS_iS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z33check_existance_of_candidate_rowsPiS_iS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(cudaError_t error, const char *file, const int line)
{
if (error != cudaSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
cudaDeviceProp props;
CHECK_ERROR(cudaGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(cudaGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
cudaDeviceProp props;
cudaGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(cudaGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(cudaSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
cudaMalloc(&dev_a, N * sizeof(long long));
cudaMalloc(&dev_b, N * sizeof(long long));
cudaMalloc(&dev_c, N * sizeof(long long));
cudaMalloc(&dev_bdim, sizeof(int));
cudaMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
cudaMemcpy(c, dev_c, N * sizeof(long long), cudaMemcpyDeviceToHost);
cudaMemcpy(&bdim, dev_bdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaMemcpy(&gdim, dev_gdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
cudaFree(dev_bdim);
cudaFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} | code for sm_80
Function : _Z3addPxS_S_PiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R15, SR_CTAID.X ; /* 0x00000000000f7919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0040*/ IMAD R15, R15, c[0x0][0x0], R0 ; /* 0x000000000f0f7a24 */
/* 0x001fe200078e0200 */
/*0050*/ HFMA2.MMA R0, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff007435 */
/* 0x000fc600000001ff */
/*0060*/ IMAD.WIDE.U32 R2, R15, R15.reuse, RZ ; /* 0x0000000f0f027225 */
/* 0x080fe200078e00ff */
/*0070*/ IADD3 R10, P0, RZ, -R15, RZ ; /* 0x8000000fff0a7210 */
/* 0x000fca0007f1e0ff */
/*0080*/ IMAD.X R11, RZ, RZ, -0x1, P0 ; /* 0xffffffffff0b7424 */
/* 0x000fe400000e06ff */
/*0090*/ IMAD.WIDE.U32 R4, R15, R0, c[0x0][0x160] ; /* 0x000058000f047625 */
/* 0x000fc800078e0000 */
/*00a0*/ IMAD.WIDE.U32 R6, R15.reuse, R0, c[0x0][0x168] ; /* 0x00005a000f067625 */
/* 0x040fe200078e0000 */
/*00b0*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x0001e8000c101b04 */
/*00c0*/ STG.E.64 [R6.64], R10 ; /* 0x0000000a06007986 */
/* 0x0001e8000c101b04 */
/*00d0*/ LDG.E.64 R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x000ea2000c1e1b00 */
/*00e0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fc40003f05270 */
/*00f0*/ IADD3 R12, P1, -R15, R8, RZ ; /* 0x000000080f0c7210 */
/* 0x004fc80007f3e1ff */
/*0100*/ IADD3.X R13, R9, -0x1, RZ, P1, !PT ; /* 0xffffffff090d7810 */
/* 0x000fe20000ffe4ff */
/*0110*/ IMAD.WIDE.U32 R8, R15, R0, c[0x0][0x170] ; /* 0x00005c000f087625 */
/* 0x000fca00078e0000 */
/*0120*/ STG.E.64 [R8.64], R12 ; /* 0x0000000c08007986 */
/* 0x0001e2000c101b04 */
/*0130*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0140*/ MOV R7, c[0x0][0x0] ; /* 0x0000000000077a02 */
/* 0x001fe20000000f00 */
/*0150*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fe200078e00ff */
/*0160*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fe20000000f00 */
/*0170*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff097624 */
/* 0x000fe200078e00ff */
/*0180*/ MOV R4, c[0x0][0x180] ; /* 0x0000600000047a02 */
/* 0x000fe20000000f00 */
/*0190*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */
/* 0x000fe400078e00ff */
/*01a0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe8000c101904 */
/*01b0*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(cudaError_t error, const char *file, const int line)
{
if (error != cudaSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
cudaDeviceProp props;
CHECK_ERROR(cudaGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(cudaGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
cudaDeviceProp props;
cudaGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(cudaGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(cudaSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
cudaMalloc(&dev_a, N * sizeof(long long));
cudaMalloc(&dev_b, N * sizeof(long long));
cudaMalloc(&dev_c, N * sizeof(long long));
cudaMalloc(&dev_bdim, sizeof(int));
cudaMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
cudaMemcpy(c, dev_c, N * sizeof(long long), cudaMemcpyDeviceToHost);
cudaMemcpy(&bdim, dev_bdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaMemcpy(&gdim, dev_gdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
cudaFree(dev_bdim);
cudaFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} | .file "tmpxft_00128cbf_00000000-6_thread_block_test.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3679:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3679:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z12blockPerGridii
.type _Z12blockPerGridii, @function
_Z12blockPerGridii:
.LFB3669:
.cfi_startproc
endbr64
movl %edi, %eax
cltd
idivl %esi
cmpl $1, %edx
sbbl $-1, %eax
ret
.cfi_endproc
.LFE3669:
.size _Z12blockPerGridii, .-_Z12blockPerGridii
.globl _Z9initial_aPii
.type _Z9initial_aPii, @function
_Z9initial_aPii:
.LFB3670:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3670:
.size _Z9initial_aPii, .-_Z9initial_aPii
.globl _Z9initial_bPi
.type _Z9initial_bPi, @function
_Z9initial_bPi:
.LFB3671:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE3671:
.size _Z9initial_bPi, .-_Z9initial_bPi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "CUDA CALL FAILED: "
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "/home/ubuntu/Datasets/stackv2/train-structured/blueyi/dpdems/master/test/thread_block_test.cu"
.section .rodata.str1.1
.LC2:
.string "( "
.LC3:
.string " )- "
.LC4:
.string "cuda call success"
.section .rodata.str1.8
.align 8
.LC5:
.string "---Property of currently device used---"
.section .rodata.str1.1
.LC6:
.string "Device "
.LC7:
.string ": "
.LC8:
.string "CUDA Capability: "
.LC9:
.string "."
.LC10:
.string "MultiProcessor count: "
.text
.globl _Z12print_devicei
.type _Z12print_devicei, @function
_Z12print_devicei:
.LFB3674:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $1048, %rsp
.cfi_def_cfa_offset 1072
movl %edi, %ebx
movq %fs:40, %rax
movq %rax, 1032(%rsp)
xorl %eax, %eax
movq %rsp, %rdi
movl %ebx, %esi
call cudaGetDeviceProperties_v2@PLT
testl %eax, %eax
jne .L33
movl $17, %edx
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbp
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %rbp
testq %rbp, %rbp
je .L34
cmpb $0, 56(%rbp)
je .L13
movzbl 67(%rbp), %esi
.L14:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rbp
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $39, %edx
leaq .LC5(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %rbp
testq %rbp, %rbp
je .L35
cmpb $0, 56(%rbp)
je .L17
movzbl 67(%rbp), %esi
.L18:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rbp
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $7, %edx
leaq .LC6(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %esi
movq %rbp, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movl $2, %edx
leaq .LC7(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq %rsp, %rbp
movq %rbp, %rdi
call strlen@PLT
movq %rax, %rdx
movq %rbp, %rsi
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L36
cmpb $0, 56(%rbp)
je .L21
movzbl 67(%rbp), %esi
.L22:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $17, %edx
leaq .LC8(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl 360(%rsp), %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movl $1, %edx
leaq .LC9(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl 364(%rsp), %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L37
cmpb $0, 56(%rbp)
je .L25
movzbl 67(%rbp), %esi
.L26:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $22, %edx
leaq .LC10(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl 388(%rsp), %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L38
cmpb $0, 56(%rbp)
je .L29
movzbl 67(%rbp), %esi
.L30:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L39
addq $1048, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
movl %eax, %ebp
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $78, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC3(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rbx
movl %ebp, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1, %edi
call exit@PLT
.L34:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L40
call _ZSt16__throw_bad_castv@PLT
.L40:
call __stack_chk_fail@PLT
.L13:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L14
.L35:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L41
call _ZSt16__throw_bad_castv@PLT
.L41:
call __stack_chk_fail@PLT
.L17:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L18
.L36:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L42
call _ZSt16__throw_bad_castv@PLT
.L42:
call __stack_chk_fail@PLT
.L21:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L22
.L37:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L43
call _ZSt16__throw_bad_castv@PLT
.L43:
call __stack_chk_fail@PLT
.L25:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L26
.L38:
movq 1032(%rsp), %rax
subq %fs:40, %rax
jne .L44
call _ZSt16__throw_bad_castv@PLT
.L44:
call __stack_chk_fail@PLT
.L29:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L30
.L39:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3674:
.size _Z12print_devicei, .-_Z12print_devicei
.section .rodata.str1.1
.LC11:
.string "Total CUDA device number: "
.text
.globl _Z13setCudaDevicei
.type _Z13setCudaDevicei, @function
_Z13setCudaDevicei:
.LFB3675:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1080, %rsp
.cfi_def_cfa_offset 1136
movl %edi, 12(%rsp)
movq %fs:40, %rax
movq %rax, 1064(%rsp)
xorl %eax, %eax
movl $0, 28(%rsp)
leaq 28(%rsp), %rdi
call cudaGetDeviceCount@PLT
testl %eax, %eax
jne .L79
movl $17, %edx
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbx
testq %rbx, %rbx
je .L80
cmpb $0, 56(%rbx)
je .L49
movzbl 67(%rbx), %esi
.L50:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $26, %edx
leaq .LC11(%rip), %rsi
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl 28(%rsp), %esi
movq %rbx, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L81
cmpb $0, 56(%rbp)
je .L53
movzbl 67(%rbp), %esi
.L54:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
cmpl $1, 28(%rsp)
jg .L82
.L55:
movl 12(%rsp), %edi
call cudaSetDevice@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L83
movl $17, %edx
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbx
testq %rbx, %rbx
je .L84
cmpb $0, 56(%rbx)
je .L73
movzbl 67(%rbx), %esi
.L74:
movsbl %sil, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl 12(%rsp), %edi
call _Z12print_devicei
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L85
addq $1080, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L79:
.cfi_restore_state
movl %eax, %ebx
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $89, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC3(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rbp
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1, %edi
call exit@PLT
.L80:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L86
call _ZSt16__throw_bad_castv@PLT
.L86:
call __stack_chk_fail@PLT
.L49:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L50
.L81:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L87
call _ZSt16__throw_bad_castv@PLT
.L87:
call __stack_chk_fail@PLT
.L53:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L54
.L82:
leaq 32(%rsp), %rdi
movl 12(%rsp), %esi
call cudaGetDeviceProperties_v2@PLT
movl 420(%rsp), %r13d
cmpl $1, 28(%rsp)
jle .L55
movl $1, %ebp
leaq 32(%rsp), %r14
leaq .LC4(%rip), %r15
leaq _ZSt4cout(%rip), %r12
jmp .L69
.L92:
movl $18, %edx
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rbp
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $93, %edx
leaq .LC1(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $2, %edx
leaq .LC2(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $96, %esi
movq %rbp, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbp
movl $4, %edx
leaq .LC3(%rip), %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rbx
testq %rax, %rax
je .L88
movq %rax, %rdi
call strlen@PLT
movq %rax, %rdx
movq %rbx, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L59:
movq 0(%rbp), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %rbx
testq %rbx, %rbx
je .L89
cmpb $0, 56(%rbx)
je .L62
movzbl 67(%rbx), %eax
.L63:
movsbl %al, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl $1, %edi
call exit@PLT
.L88:
movq 0(%rbp), %rax
movq %rbp, %rdi
addq -24(%rax), %rdi
movl 32(%rdi), %esi
orl $1, %esi
call _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
jmp .L59
.L89:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L90
call _ZSt16__throw_bad_castv@PLT
.L90:
call __stack_chk_fail@PLT
.L62:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
jmp .L63
.L93:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L91
call _ZSt16__throw_bad_castv@PLT
.L91:
call __stack_chk_fail@PLT
.L66:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L67
.L68:
addl $1, %ebp
cmpl %ebp, 28(%rsp)
jle .L55
.L69:
movl %ebp, %esi
movq %r14, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %eax, %ebx
testl %eax, %eax
jne .L92
movl $17, %edx
movq %r15, %rsi
movq %r12, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq (%r12), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %rbx
testq %rbx, %rbx
je .L93
cmpb $0, 56(%rbx)
je .L66
movzbl 67(%rbx), %esi
.L67:
movsbl %sil, %esi
movq %r12, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl 420(%rsp), %eax
cmpl %r13d, %eax
jle .L68
movl %eax, %r13d
movl %ebp, 12(%rsp)
jmp .L68
.L83:
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl $103, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC3(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rbp
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %rbp, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1, %edi
call exit@PLT
.L84:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L94
call _ZSt16__throw_bad_castv@PLT
.L94:
call __stack_chk_fail@PLT
.L73:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L74
.L85:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3675:
.size _Z13setCudaDevicei, .-_Z13setCudaDevicei
.globl _Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_
.type _Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_, @function
_Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_:
.LFB3701:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L99
.L95:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L100
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L99:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 184
pushq 56(%rsp)
.cfi_def_cfa_offset 192
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z3addPxS_S_PiS0_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L95
.L100:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3701:
.size _Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_, .-_Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_
.globl _Z3addPxS_S_PiS0_
.type _Z3addPxS_S_PiS0_, @function
_Z3addPxS_S_PiS0_:
.LFB3702:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3702:
.size _Z3addPxS_S_PiS0_, .-_Z3addPxS_S_PiS0_
.section .rodata.str1.1
.LC12:
.string "blockDim.x: "
.LC13:
.string "gridDim.x: "
.text
.globl main
.type main, @function
main:
.LFB3676:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movl %edi, %ebx
movq %rsi, %rbp
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $0, %edi
call _Z13setCudaDevicei
cmpl $1, %ebx
jg .L119
.L104:
movslq N(%rip), %rdi
movq %rdi, %rax
shrq $60, %rax
jne .L105
salq $3, %rdi
call _Znam@PLT
movq %rax, %r12
movslq N(%rip), %rsi
salq $3, %rsi
leaq 8(%rsp), %rdi
call cudaMalloc@PLT
movslq N(%rip), %rsi
salq $3, %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
movslq N(%rip), %rsi
salq $3, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $4, %esi
call cudaMalloc@PLT
movl $256, %esi
movl N(%rip), %edi
call _Z12blockPerGridii
movl $256, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl %eax, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movl $1, %ecx
movq 48(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L120
.L106:
movslq N(%rip), %rdx
salq $3, %rdx
movl $2, %ecx
movq 24(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
leaq 48(%rsp), %rdi
movl $2, %ecx
movl $4, %edx
movq 32(%rsp), %rsi
call cudaMemcpy@PLT
leaq 60(%rsp), %rdi
movl $2, %ecx
movl $4, %edx
movq 40(%rsp), %rsi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
cmpl $0, N(%rip)
jle .L109
movl $0, %ebp
leaq _ZSt4cout(%rip), %r14
leaq .LC7(%rip), %r13
jmp .L114
.L119:
movq 8(%rbp), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, N(%rip)
jmp .L104
.L105:
movq 72(%rsp), %rax
subq %fs:40, %rax
je .L108
call __stack_chk_fail@PLT
.L108:
call __cxa_throw_bad_array_new_length@PLT
.L120:
movq 40(%rsp), %r8
movq 32(%rsp), %rcx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z31__device_stub__Z3addPxS_S_PiS0_PxS_S_PiS0_
jmp .L106
.L122:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L121
call _ZSt16__throw_bad_castv@PLT
.L121:
call __stack_chk_fail@PLT
.L112:
movq %r15, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%r15), %rax
movl $10, %esi
movq %r15, %rdi
call *48(%rax)
movl %eax, %esi
.L113:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $1, %rbp
cmpl %ebp, N(%rip)
jle .L109
.L114:
movl %ebp, %esi
movq %r14, %rdi
call _ZNSolsEi@PLT
movq %rax, %rbx
movl $2, %edx
movq %r13, %rsi
movq %rax, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movq (%r12,%rbp,8), %rsi
movq %rbx, %rdi
call _ZNSo9_M_insertIxEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r15
testq %r15, %r15
je .L122
cmpb $0, 56(%r15)
je .L112
movzbl 67(%r15), %esi
jmp .L113
.L109:
leaq .LC12(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl 48(%rsp), %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
leaq .LC13(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl 60(%rsp), %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %r12, %rdi
call free@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L123
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L123:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3676:
.size main, .-main
.section .rodata.str1.1
.LC14:
.string "_Z3addPxS_S_PiS0_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3704:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPxS_S_PiS0_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3704:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl N
.data
.align 4
.type N, @object
.size N, 4
N:
.long 21504
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(cudaError_t error, const char *file, const int line)
{
if (error != cudaSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
cudaGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
cudaDeviceProp props;
CHECK_ERROR(cudaGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(cudaGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
cudaDeviceProp props;
cudaGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(cudaGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(cudaSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
cudaMalloc(&dev_a, N * sizeof(long long));
cudaMalloc(&dev_b, N * sizeof(long long));
cudaMalloc(&dev_c, N * sizeof(long long));
cudaMalloc(&dev_bdim, sizeof(int));
cudaMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
cudaMemcpy(c, dev_c, N * sizeof(long long), cudaMemcpyDeviceToHost);
cudaMemcpy(&bdim, dev_bdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaMemcpy(&gdim, dev_gdim, sizeof(int), cudaMemcpyDeviceToHost);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
cudaFree(dev_bdim);
cudaFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(hipError_t error, const char *file, const int line)
{
if (error != hipSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
hipDeviceProp_t props;
CHECK_ERROR(hipGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(hipGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
hipDeviceProp_t props;
hipGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(hipGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(hipSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
hipMalloc(&dev_a, N * sizeof(long long));
hipMalloc(&dev_b, N * sizeof(long long));
hipMalloc(&dev_c, N * sizeof(long long));
hipMalloc(&dev_bdim, sizeof(int));
hipMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
hipMemcpy(c, dev_c, N * sizeof(long long), hipMemcpyDeviceToHost);
hipMemcpy(&bdim, dev_bdim, sizeof(int), hipMemcpyDeviceToHost);
hipMemcpy(&gdim, dev_gdim, sizeof(int), hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
hipFree(dev_bdim);
hipFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(hipError_t error, const char *file, const int line)
{
if (error != hipSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
hipDeviceProp_t props;
CHECK_ERROR(hipGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(hipGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
hipDeviceProp_t props;
hipGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(hipGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(hipSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
hipMalloc(&dev_a, N * sizeof(long long));
hipMalloc(&dev_b, N * sizeof(long long));
hipMalloc(&dev_c, N * sizeof(long long));
hipMalloc(&dev_bdim, sizeof(int));
hipMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
hipMemcpy(c, dev_c, N * sizeof(long long), hipMemcpyDeviceToHost);
hipMemcpy(&bdim, dev_bdim, sizeof(int), hipMemcpyDeviceToHost);
hipMemcpy(&gdim, dev_gdim, sizeof(int), hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
hipFree(dev_bdim);
hipFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPxS_S_PiS0_
.globl _Z3addPxS_S_PiS0_
.p2align 8
.type _Z3addPxS_S_PiS0_,@function
_Z3addPxS_S_PiS0_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b128 s[8:11], s[0:1], 0x0
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_load_b64 s[6:7], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_mad_u64_u32 v[3:4], null, v1, v1, 0
v_sub_co_u32 v7, s5, 0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_co_ci_u32_e64 v8, null, 0, 0, s5
v_add_co_u32 v9, vcc_lo, s8, v5
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v6, vcc_lo
v_add_co_u32 v11, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v6, vcc_lo
global_store_b64 v[9:10], v[3:4], off
global_store_b64 v[11:12], v[7:8], off
global_load_b64 v[3:4], v[9:10], off
s_mov_b32 s5, exec_lo
s_waitcnt vmcnt(0)
v_sub_co_u32 v3, vcc_lo, v3, v1
v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
global_store_b64 v[5:6], v[3:4], off
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB0_2
s_load_b32 s5, s[2:3], 0x0
s_load_b128 s[0:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
s_clause 0x1
global_store_b32 v2, v0, s[0:1]
global_store_b32 v2, v1, s[2:3]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPxS_S_PiS0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPxS_S_PiS0_, .Lfunc_end0-_Z3addPxS_S_PiS0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPxS_S_PiS0_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3addPxS_S_PiS0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* thread_block_test.cu
* Copyright (C) 2016 <@A0835-PC>
*
* Distributed under terms of the MIT license.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
int N = 21504;
int blockPerGrid(const int dim, const int threadPerBlock)
{
int temp = dim / threadPerBlock;
if (dim % threadPerBlock != 0) {
temp += 1;
}
return temp;
}
__device__ void initial_a(int *a, int tid)
{
a[tid] = tid * tid;
}
__device__ void initial_b(int *b)
{
int tid = threadIdx.x;
b[tid] = -tid;
}
__global__ void add(long long *a, long long *b, long long *c, int *bdim, int *gdim)
{
// int tid = blockIdx.x;
long long tid = threadIdx.x + blockIdx.x * blockDim.x;
// while (tid < N) {
a[tid] = tid * tid;
b[tid] = -tid;
c[tid] = a[tid] + b[tid];
// tid += blockDim.x * gridDim.x;
// }
if (tid == 0) {
*bdim = blockDim.x;
*gdim = gridDim.x;
}
}
inline void checkCudaError(hipError_t error, const char *file, const int line)
{
if (error != hipSuccess) {
std::cerr << "CUDA CALL FAILED: " << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda call success" << std::endl;
}
inline void checkCudaState(const char *msg, const char *file, const int line)
{
hipError_t error = hipGetLastError();
if (error != hipSuccess) {
std::cerr << "---" << msg << " Error--" << std::endl;
std::cerr << file << "( " << line << " )- " <<
hipGetErrorString(error) << std::endl;
exit(EXIT_FAILURE);
}
else
std::cout << "cuda state Success: " << msg << std::endl;
}
#define CHECK_ERROR(error) checkCudaError(error, __FILE__, __LINE__);
#define CHECK_STATE(msg) checkCudaState(msg, __FILE__, __LINE__);
void print_device(const int id)
{
hipDeviceProp_t props;
CHECK_ERROR(hipGetDeviceProperties(&props, id));
std::cout << "---Property of currently device used---" << std::endl;
std::cout << "Device " << id << ": " << props.name << std::endl;
std::cout << "CUDA Capability: " << props.major << "." << props.minor
<< std::endl;
std::cout << "MultiProcessor count: " << props.multiProcessorCount << std::endl;
}
void setCudaDevice(int id)
{
int numDevice = 0;
CHECK_ERROR(hipGetDeviceCount(&numDevice));
std::cout << "Total CUDA device number: " << numDevice << std::endl;
if (numDevice > 1) {
hipDeviceProp_t props;
hipGetDeviceProperties(&props, id);
int maxMultiProcessors = props.multiProcessorCount;
for (int device = 1; device < numDevice; ++device) {
CHECK_ERROR(hipGetDeviceProperties(&props, device));
if (maxMultiProcessors < props.multiProcessorCount) {
maxMultiProcessors = props.multiProcessorCount;
id = device;
}
}
}
CHECK_ERROR(hipSetDevice(id));
print_device(id);
}
int main(int argc, char **argv)
{
int id = 0;
setCudaDevice(id);
if (argc > 1)
N = atoi(argv[1]);
long long *c = new long long[N];
int bdim, gdim;
long long *dev_a, *dev_b, *dev_c;
int *dev_bdim, *dev_gdim;
hipMalloc(&dev_a, N * sizeof(long long));
hipMalloc(&dev_b, N * sizeof(long long));
hipMalloc(&dev_c, N * sizeof(long long));
hipMalloc(&dev_bdim, sizeof(int));
hipMalloc(&dev_gdim, sizeof(int));
// add<<<N, 1>>>(dev_a, dev_b, dev_c);
int threadPerBlock = 256;
int blockSize = blockPerGrid(N, threadPerBlock);
add<<<blockSize, threadPerBlock>>>(dev_a, dev_b, dev_c, dev_bdim, dev_gdim);
hipMemcpy(c, dev_c, N * sizeof(long long), hipMemcpyDeviceToHost);
hipMemcpy(&bdim, dev_bdim, sizeof(int), hipMemcpyDeviceToHost);
hipMemcpy(&gdim, dev_gdim, sizeof(int), hipMemcpyDeviceToHost);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
hipFree(dev_bdim);
hipFree(dev_gdim);
for (int i = 0; i < N; ++i) {
std::cout << i << ": " << c[i] << std::endl;
}
std::cout << "blockDim.x: " << bdim << std::endl;
std::cout << "gridDim.x: " << gdim << std::endl;
free(c);
return 0;
} | .text
.file "thread_block_test.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z12blockPerGridii # -- Begin function _Z12blockPerGridii
.p2align 4, 0x90
.type _Z12blockPerGridii,@function
_Z12blockPerGridii: # @_Z12blockPerGridii
.cfi_startproc
# %bb.0:
movl %edi, %eax
cltd
idivl %esi
cmpl $1, %edx
sbbl $-1, %eax
retq
.Lfunc_end0:
.size _Z12blockPerGridii, .Lfunc_end0-_Z12blockPerGridii
.cfi_endproc
# -- End function
.globl _Z18__device_stub__addPxS_S_PiS0_ # -- Begin function _Z18__device_stub__addPxS_S_PiS0_
.p2align 4, 0x90
.type _Z18__device_stub__addPxS_S_PiS0_,@function
_Z18__device_stub__addPxS_S_PiS0_: # @_Z18__device_stub__addPxS_S_PiS0_
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z3addPxS_S_PiS0_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end1:
.size _Z18__device_stub__addPxS_S_PiS0_, .Lfunc_end1-_Z18__device_stub__addPxS_S_PiS0_
.cfi_endproc
# -- End function
.globl _Z12print_devicei # -- Begin function _Z12print_devicei
.p2align 4, 0x90
.type _Z12print_devicei,@function
_Z12print_devicei: # @_Z12print_devicei
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1504
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl %edi, %ebx
leaq 8(%rsp), %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %esi
movl %eax, %edi
movl $80, %edx
callq _Z14checkCudaError10hipError_tPKci
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $39, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r14
testq %r14, %r14
je .LBB2_17
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB2_3
# %bb.2:
movzbl 67(%r14), %eax
jmp .LBB2_4
.LBB2_3:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $7, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl %ebx, %esi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.3, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
leaq 8(%rsp), %r14
movq %r14, %rdi
callq strlen
movq %rbx, %rdi
movq %r14, %rsi
movq %rax, %rdx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %r14
testq %r14, %r14
je .LBB2_17
# %bb.5: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i3
cmpb $0, 56(%r14)
je .LBB2_7
# %bb.6:
movzbl 67(%r14), %eax
jmp .LBB2_8
.LBB2_7:
movq %r14, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
.LBB2_8: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit6
movsbl %al, %esi
movq %rbx, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 368(%rsp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq %rax, %rbx
movl $.L.str.5, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 372(%rsp), %esi
movq %rbx, %rdi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_17
# %bb.9: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i8
cmpb $0, 56(%rbx)
je .LBB2_11
# %bb.10:
movzbl 67(%rbx), %ecx
jmp .LBB2_12
.LBB2_11:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_12: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit11
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.6, %esi
movl $22, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 396(%rsp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB2_17
# %bb.13: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i13
cmpb $0, 56(%rbx)
je .LBB2_15
# %bb.14:
movzbl 67(%rbx), %ecx
jmp .LBB2_16
.LBB2_15:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB2_16: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit16
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.LBB2_17:
.cfi_def_cfa_offset 1504
callq _ZSt16__throw_bad_castv
.Lfunc_end2:
.size _Z12print_devicei, .Lfunc_end2-_Z12print_devicei
.cfi_endproc
# -- End function
.section .text._Z14checkCudaError10hipError_tPKci,"axG",@progbits,_Z14checkCudaError10hipError_tPKci,comdat
.weak _Z14checkCudaError10hipError_tPKci # -- Begin function _Z14checkCudaError10hipError_tPKci
.p2align 4, 0x90
.type _Z14checkCudaError10hipError_tPKci,@function
_Z14checkCudaError10hipError_tPKci: # @_Z14checkCudaError10hipError_tPKci
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
testl %edi, %edi
jne .LBB3_6
# %bb.1:
movl $_ZSt4cout, %edi
movl $.L.str.13, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB3_7
# %bb.2: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB3_4
# %bb.3:
movzbl 67(%rbx), %eax
jmp .LBB3_5
.LBB3_4:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB3_5: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
jmp _ZNSo5flushEv # TAILCALL
.LBB3_6:
.cfi_def_cfa_offset 32
movl %edi, %ebx
movl $_ZSt4cerr, %edi
movq %rsi, %r14
movl $.L.str.10, %esi
movl %edx, %ebp
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movq %r14, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.11, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebp, %esi
callq _ZNSolsEi
movl $.L.str.12, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %r14
movl %ebx, %edi
callq hipGetErrorString
movq %r14, %rdi
movq %rax, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
callq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
movl $1, %edi
callq exit
.LBB3_7:
callq _ZSt16__throw_bad_castv
.Lfunc_end3:
.size _Z14checkCudaError10hipError_tPKci, .Lfunc_end3-_Z14checkCudaError10hipError_tPKci
.cfi_endproc
# -- End function
.text
.globl _Z13setCudaDevicei # -- Begin function _Z13setCudaDevicei
.p2align 4, 0x90
.type _Z13setCudaDevicei,@function
_Z13setCudaDevicei: # @_Z13setCudaDevicei
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 1520
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %edi, %ebx
movl $0, 4(%rsp)
leaq 4(%rsp), %rdi
callq hipGetDeviceCount
movl $.L.str, %esi
movl %eax, %edi
movl $91, %edx
callq _Z14checkCudaError10hipError_tPKci
movl $_ZSt4cout, %edi
movl $.L.str.7, %esi
movl $26, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 4(%rsp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r14
testq %r14, %r14
je .LBB4_9
# %bb.1: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB4_3
# %bb.2:
movzbl 67(%r14), %ecx
jmp .LBB4_4
.LBB4_3:
movq %r14, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB4_4: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
cmpl $2, 4(%rsp)
jl .LBB4_8
# %bb.5:
leaq 8(%rsp), %rdi
movl %ebx, %esi
callq hipGetDevicePropertiesR0600
cmpl $2, 4(%rsp)
jl .LBB4_8
# %bb.6: # %.lr.ph.preheader
movl $1, %ebp
movl 396(%rsp), %r15d
leaq 8(%rsp), %r14
.p2align 4, 0x90
.LBB4_7: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq %r14, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str, %esi
movl %eax, %edi
movl $98, %edx
callq _Z14checkCudaError10hipError_tPKci
movl 396(%rsp), %eax
cmpl %eax, %r15d
cmovll %ebp, %ebx
cmovlel %eax, %r15d
incl %ebp
cmpl 4(%rsp), %ebp
jl .LBB4_7
.LBB4_8:
movl %ebx, %edi
callq hipSetDevice
movl $.L.str, %esi
movl %eax, %edi
movl $105, %edx
callq _Z14checkCudaError10hipError_tPKci
movl %ebx, %edi
callq _Z12print_devicei
addq $1480, %rsp # imm = 0x5C8
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_9:
.cfi_def_cfa_offset 1520
callq _ZSt16__throw_bad_castv
.Lfunc_end4:
.size _Z13setCudaDevicei, .Lfunc_end4-_Z13setCudaDevicei
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $176, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
xorl %edi, %edi
callq _Z13setCudaDevicei
cmpl $2, %ebp
jl .LBB5_2
# %bb.1:
movq 8(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, N(%rip)
.LBB5_2:
movslq N(%rip), %rax
leaq (,%rax,8), %r14
testq %rax, %rax
movq $-1, %rdi
cmovnsq %r14, %rdi
callq _Znam
movq %rax, %rbx
leaq 48(%rsp), %rdi
movq %r14, %rsi
callq hipMalloc
movslq N(%rip), %rsi
shlq $3, %rsi
leaq 40(%rsp), %rdi
callq hipMalloc
movslq N(%rip), %rsi
shlq $3, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $4, %esi
callq hipMalloc
movq %rsp, %rdi
movl $4, %esi
callq hipMalloc
movl N(%rip), %eax
leal 255(%rax), %edi
testl %eax, %eax
cmovnsl %eax, %edi
sarl $8, %edi
cmpb $1, %al
sbbl $-1, %edi
movabsq $4294967296, %rdx # imm = 0x100000000
orq %rdx, %rdi
orq $256, %rdx # imm = 0x100
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB5_4
# %bb.3:
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movq %rsi, 96(%rsp)
movq %rdi, 88(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 96(%rsp), %rax
movq %rax, 152(%rsp)
leaq 88(%rsp), %rax
movq %rax, 160(%rsp)
leaq 24(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 24(%rsp), %rsi
movl 32(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z3addPxS_S_PiS0_, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB5_4:
movq 16(%rsp), %rsi
movslq N(%rip), %rdx
shlq $3, %rdx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rsi
leaq 128(%rsp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movq (%rsp), %rsi
leaq 24(%rsp), %rdi
movl $4, %edx
movl $2, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
cmpl $0, N(%rip)
jle .LBB5_9
# %bb.5: # %.lr.ph.preheader
xorl %r14d, %r14d
jmp .LBB5_6
.p2align 4, 0x90
.LBB5_18: # in Loop: Header=BB5_6 Depth=1
movq %r15, %rdi
movq %rax, %r12
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r12, %rax
.LBB5_19: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit23
# in Loop: Header=BB5_6 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r14
movslq N(%rip), %rax
cmpq %rax, %r14
jge .LBB5_9
.LBB5_6: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl $_ZSt4cout, %edi
movl %r14d, %esi
callq _ZNSolsEi
movq %rax, %r15
movl $.L.str.3, %esi
movl $2, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movq (%rbx,%r14,8), %rsi
movq %r15, %rdi
callq _ZNSo9_M_insertIxEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB5_20
# %bb.7: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i20
# in Loop: Header=BB5_6 Depth=1
cmpb $0, 56(%r15)
je .LBB5_18
# %bb.8: # in Loop: Header=BB5_6 Depth=1
movzbl 67(%r15), %ecx
jmp .LBB5_19
.LBB5_9: # %._crit_edge
movl $_ZSt4cout, %edi
movl $.L.str.8, %esi
movl $12, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 128(%rsp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r14
testq %r14, %r14
je .LBB5_20
# %bb.10: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%r14)
je .LBB5_12
# %bb.11:
movzbl 67(%r14), %ecx
jmp .LBB5_13
.LBB5_12:
movq %r14, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB5_13: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movl $_ZSt4cout, %edi
movl $.L.str.9, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl 24(%rsp), %esi
movl $_ZSt4cout, %edi
callq _ZNSolsEi
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r14
testq %r14, %r14
je .LBB5_20
# %bb.14: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i15
cmpb $0, 56(%r14)
je .LBB5_16
# %bb.15:
movzbl 67(%r14), %ecx
jmp .LBB5_17
.LBB5_16:
movq %r14, %rdi
movq %rax, %r15
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r14), %rax
movq %r14, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r15, %rax
.LBB5_17: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit18
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $176, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB5_20:
.cfi_def_cfa_offset 224
callq _ZSt16__throw_bad_castv
.Lfunc_end5:
.size main, .Lfunc_end5-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB6_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB6_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z3addPxS_S_PiS0_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end6:
.size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB7_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB7_2:
retq
.Lfunc_end7:
.size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor
.cfi_endproc
# -- End function
.type N,@object # @N
.data
.globl N
.p2align 2, 0x0
N:
.long 21504 # 0x5400
.size N, 4
.type _Z3addPxS_S_PiS0_,@object # @_Z3addPxS_S_PiS0_
.section .rodata,"a",@progbits
.globl _Z3addPxS_S_PiS0_
.p2align 3, 0x0
_Z3addPxS_S_PiS0_:
.quad _Z18__device_stub__addPxS_S_PiS0_
.size _Z3addPxS_S_PiS0_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/blueyi/dpdems/master/test/thread_block_test.hip"
.size .L.str, 105
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "---Property of currently device used---"
.size .L.str.1, 40
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Device "
.size .L.str.2, 8
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz ": "
.size .L.str.3, 3
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "CUDA Capability: "
.size .L.str.4, 18
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "."
.size .L.str.5, 2
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "MultiProcessor count: "
.size .L.str.6, 23
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Total CUDA device number: "
.size .L.str.7, 27
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "blockDim.x: "
.size .L.str.8, 13
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "gridDim.x: "
.size .L.str.9, 12
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "CUDA CALL FAILED: "
.size .L.str.10, 19
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "( "
.size .L.str.11, 3
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz " )- "
.size .L.str.12, 5
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "cuda call success"
.size .L.str.13, 18
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z3addPxS_S_PiS0_"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z18__device_stub__addPxS_S_PiS0_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z3addPxS_S_PiS0_
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt4cerr
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPxS_S_PiS0_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R15, SR_CTAID.X ; /* 0x00000000000f7919 */
/* 0x000e220000002500 */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0030*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e240000002100 */
/*0040*/ IMAD R15, R15, c[0x0][0x0], R0 ; /* 0x000000000f0f7a24 */
/* 0x001fe200078e0200 */
/*0050*/ HFMA2.MMA R0, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff007435 */
/* 0x000fc600000001ff */
/*0060*/ IMAD.WIDE.U32 R2, R15, R15.reuse, RZ ; /* 0x0000000f0f027225 */
/* 0x080fe200078e00ff */
/*0070*/ IADD3 R10, P0, RZ, -R15, RZ ; /* 0x8000000fff0a7210 */
/* 0x000fca0007f1e0ff */
/*0080*/ IMAD.X R11, RZ, RZ, -0x1, P0 ; /* 0xffffffffff0b7424 */
/* 0x000fe400000e06ff */
/*0090*/ IMAD.WIDE.U32 R4, R15, R0, c[0x0][0x160] ; /* 0x000058000f047625 */
/* 0x000fc800078e0000 */
/*00a0*/ IMAD.WIDE.U32 R6, R15.reuse, R0, c[0x0][0x168] ; /* 0x00005a000f067625 */
/* 0x040fe200078e0000 */
/*00b0*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x0001e8000c101b04 */
/*00c0*/ STG.E.64 [R6.64], R10 ; /* 0x0000000a06007986 */
/* 0x0001e8000c101b04 */
/*00d0*/ LDG.E.64 R8, [R4.64] ; /* 0x0000000404087981 */
/* 0x000ea2000c1e1b00 */
/*00e0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fc40003f05270 */
/*00f0*/ IADD3 R12, P1, -R15, R8, RZ ; /* 0x000000080f0c7210 */
/* 0x004fc80007f3e1ff */
/*0100*/ IADD3.X R13, R9, -0x1, RZ, P1, !PT ; /* 0xffffffff090d7810 */
/* 0x000fe20000ffe4ff */
/*0110*/ IMAD.WIDE.U32 R8, R15, R0, c[0x0][0x170] ; /* 0x00005c000f087625 */
/* 0x000fca00078e0000 */
/*0120*/ STG.E.64 [R8.64], R12 ; /* 0x0000000c08007986 */
/* 0x0001e2000c101b04 */
/*0130*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0140*/ MOV R7, c[0x0][0x0] ; /* 0x0000000000077a02 */
/* 0x001fe20000000f00 */
/*0150*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fe200078e00ff */
/*0160*/ MOV R2, c[0x0][0x178] ; /* 0x00005e0000027a02 */
/* 0x000fe20000000f00 */
/*0170*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff097624 */
/* 0x000fe200078e00ff */
/*0180*/ MOV R4, c[0x0][0x180] ; /* 0x0000600000047a02 */
/* 0x000fe20000000f00 */
/*0190*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */
/* 0x000fe400078e00ff */
/*01a0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x000fe8000c101904 */
/*01b0*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPxS_S_PiS0_
.globl _Z3addPxS_S_PiS0_
.p2align 8
.type _Z3addPxS_S_PiS0_,@function
_Z3addPxS_S_PiS0_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x34
s_load_b128 s[8:11], s[0:1], 0x0
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_load_b64 s[6:7], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[5:6], 3, v[1:2]
v_mad_u64_u32 v[3:4], null, v1, v1, 0
v_sub_co_u32 v7, s5, 0, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_sub_co_ci_u32_e64 v8, null, 0, 0, s5
v_add_co_u32 v9, vcc_lo, s8, v5
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v6, vcc_lo
v_add_co_u32 v11, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v6, vcc_lo
global_store_b64 v[9:10], v[3:4], off
global_store_b64 v[11:12], v[7:8], off
global_load_b64 v[3:4], v[9:10], off
s_mov_b32 s5, exec_lo
s_waitcnt vmcnt(0)
v_sub_co_u32 v3, vcc_lo, v3, v1
v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
global_store_b64 v[5:6], v[3:4], off
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB0_2
s_load_b32 s5, s[2:3], 0x0
s_load_b128 s[0:3], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
s_clause 0x1
global_store_b32 v2, v0, s[0:1]
global_store_b32 v2, v1, s[2:3]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3addPxS_S_PiS0_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z3addPxS_S_PiS0_, .Lfunc_end0-_Z3addPxS_S_PiS0_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z3addPxS_S_PiS0_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z3addPxS_S_PiS0_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
* $Update by: Lin Ye (email: linye2015@outlook.com) 2019-07-01 float16 added
*/
#include "LogSoftmax.h"
#include "LogSoftmax.cuh"
#include "Loss.cuh"
#include "../core/arithmetic/MultiplyDim.h"
#include "../core/reduce/ReduceSum.cuh"
#include "../core/reduce/ReduceMax.cuh"
#include "../core/shape/IsSameShaped.h"
#include "../XDevice.h"
#include <device_launch_parameters.h>
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmax(const XTensor * x, XTensor * y, int leadDim)
{
ShowNTErrors("You should call LogSoftmax instead!");
}
/*
log softmax forward computation (Cuda kernel)
for each column j, let y_{i,j} and x_{i,j} are the output
and state value for the i-th element of column j. We have
y_{i,j} = log(e^x_{i,j} / \sum_{i} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each column j
>> sum - \sum_{i} e^{x_{i,j}) for each column j
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByRow(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each column */
if (threadIdx.y == 0) {
inputSum[threadIdx.x] = sum[j];
inputMax[threadIdx.x] = max[j];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.x])) / (DTYPE)inputSum[threadIdx.x]);
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log softmax forward computation (Cuda kernel)
for each row i, let y_{i,j} and x_{i,j} are the output
and state value for the j-th element of row i. We have
y_{i,j} = log(e^x_{i,j} / \sum_{j} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each row i
>> sum - \sum_{j} e^{x_{i,j}) for each row i
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByCol(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each row */
if (threadIdx.x == 0) {
inputSum[threadIdx.y] = sum[i];
inputMax[threadIdx.y] = max[i];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.y])) / (DTYPE)inputSum[threadIdx.y]);
/*if (r < LOGPROB_MIN)
{
printf("min %e %e, %e %e, %e %e\n", r, x[key] - inputMax[threadIdx.y], x[key], inputMax[threadIdx.y], exp(x[key] - inputMax[threadIdx.y]), inputSum[threadIdx.y]);
}*/
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
>> sum - \sum_{i} e^{x_i}
>> max - \max_{i} e^{x_i}
*/
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max)
{
CheckNTErrors((x->devID >= 0), "Forward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID), "Input tensors must be on the same GPU.");
CheckNTErrors((x->order == y->order), "Input tensors must be of the same size.");
CheckNTErrors((x->order == 2), "Input tensors must be of order 2.");
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
DTYPE * maxData = (DTYPE*)max->data;
DTYPE * sumData = (DTYPE*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
}
else if (x->dataType == X_FLOAT16 && y->dataType == X_FLOAT16) {
#ifdef HALF_PRECISION
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
__half * maxData = (half*)max->data;
__half * sumData = (half*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<half, X_FLOAT16> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((half*)x->data, maxData, sumData, (half *)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<half, X_FLOAT16> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((half*)x->data, maxData, sumData, (half*)y->data, n, m);
}
#else
ShowNTErrors("Recompile the code with HALF_PRECISION!");
#endif
}
else {
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
/*
set dE/dx = exp(y)
>> dedy - dE/dy
>> dedx - dE/dx
>> y - output of the function
>> size - size of output
>> lossName - name of the loss function
*/
__global__
void KernelExpLoss(DTYPE * dedy, DTYPE * dedx, DTYPE * y, int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
/* dE/dx_j = exp(y_j) */
if (lossName == CROSSENTROPY)
dedx[i] = exp(y[i]);
/* dE/dx_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
dedx[i] = exp(y[i]);
else if (lossName == ONEHOTERROR)
dedx[i] = 0;
else
dedx[i] = 0;
}
}
/*
backward computation for log softmax
dE/dx = dE/dy * dy/dx
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> size - size of input/output
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDS(DTYPE * dedy, DTYPE * dedx, DTYPE * gold, DTYPE * y, DTYPE * x,
int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
DTYPE r = 0;
/* dE/ds_j = exp(y_j) */
if (lossName == CROSSENTROPY)
r = -gold[i] + exp(y[i]);
/* dE/ds_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
r = -gold[i] + exp(y[i]);
else if (lossName == ONEHOTERROR) {
if (gold[i] == 1.0F)
r = -gold[i] + exp(y[i]);
else
r = 0;
}
else {
r = dedy[i];
}
if (isnan(r))
r = 0;
if (isinf(r))
r = 0;
dedx[i] = r;
}
}
/*
backward computation for log softmax (sparse matrices) for each column
dE/dx_j += -gold_j
(for dE/dx = dE/dy * dy/dx)
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
>> gNonZeroNum -
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDSSparseByRow(DTYPE * dedy, DTYPE * dedx, void * gold, DTYPE * y, DTYPE * x,
int rowNum, int colNum, int gNonZeroNum, LOSS_FUNCTION_NAME lossName)
{
int tupleSize = sizeof(int) + sizeof(DTYPE);
int k = blockDim.x * blockIdx.x + threadIdx.x;
if (k < gNonZeroNum) {
/* load the sub-block of the sparse matrix b */
int key = *(int*)((char*)gold + tupleSize * k);
int ni = key / colNum;
int mi = key % colNum;
int value = *(DTYPE*)((char*)gold + tupleSize * k + sizeof(int));
if (lossName == CROSSENTROPY)
dedx[colNum * ni + mi] += -value;
else if (lossName == SQUAREDERROR)
dedx[colNum * ni + mi] += -value;
else if (lossName == ONEHOTERROR) {
int offset = colNum * ni + mi;
if (value == 1.0F)
dedx[offset] += (-value + exp(y[offset]));
//dedx[offset] += -value * 0.005;
}
}
}
/*
backward computation for dense matrics with default data type
dE/dx = dE/dy * dy/dx
log softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k})
dy_i/dx_j
= d{log(e^{x_i} / \sum_{k} e^{x_k})}/dx_j
= d{log(e^{x_i})}/dx_j - d{log(\sum_{k} e^{x_k})}/dx_j
= \delta(i,j) - e^{x_j}/\sum_{k} e^{x_k})
= \delta(i,j) - exp(y_j)
where \delta(i,j) = 1 if i = j, and \delta(i,j) = 0 otherwise
if loss E is defined as cross entropy, i.e., E = -\sum_{k} (gold_k * y_k), we have
dE/dy_i = -gold_i
(where {gold_k} is the gold standard distribution)
then
dE/dx_j
= \sum_{i} {dE/dy_i * dy_i/dx_j}
= \sum_{i} {-gold_i * (\delta(i,j) - exp(y_j))}
= \sum_{i} {-gold_i * \delta{i,j)} + \sum_{i} {gold_i * exp(y_j)}
= -gold_i * \delta(i,j) + \sum_{i} {gold_i * exp(y_j)}
= -gold_j + exp(y_j)
Note: gold_i is a distribution, i.e., \sum_{i} gold_i = 1
if gold is with a one-hot representation (gold_i = 1 for only one dimension),
we can reformulize it as dE/dx_j = -\delta(i,j) + exp(y_j)
There are two ways to implement this process.
Method 1. we compute dE/dy and dy/dx resepectively, and then reach dE/dx by dE/dx = dE/dy * dy/dx
(or more precisely dE/dx_j = \sum_{i} {dE/dy_i * dy_i/dx_j})
Method 2. we compute dE/dx (or dE/dx_j) in a single step, rather than resorting to the
sub-models dE/dy and dy/dx. We can do this by using dE/dx_j = -gold_j + exp(y_j)
Here we choose Method 2, i.e., we straightforwardly compute dE/dx_j by
dE/dx_j = -gold_j + exp(y_j)
(or dE/dx_j = -\delta(i,j) + exp(y_j) for a Maximum A Posteriori Estimation (MAP))
Method 1 is also fine but is more time consuming due to the summation over dimensions.
Note that this method is not good for the standard version softmax when working with
the cross entropy loss. Because it is numerical unstable. When we use a usual method to
define softmax, we have softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k}). It is trivial to
know that dy_i/dx_j = y_i * \delta(i,j) - y_i * y_j. As y_i and y_j could be a small number,
y_i * y_i would result in a much smaller one with a risk of lossing precision. This is even
worse we multiply dy_i/dx_j with dE/dy_i. So it is in general to use log softmax instead for
better numerical stability.
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> dedy - dE/dy
>> deds - dE/dx
>> lossName - type of loss function, e.g., cross entropy
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName)
{
leadDim = leadDim < 0 ? y->order - 1 : leadDim;
CheckNTErrors((x->devID >= 0), "Backward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID && gold->devID == y->devID),
"Tensors used in log softmax are not on the same GPU.");
CheckNTErrors((gold != NULL), "No x gold standard is found!");
int dimensionSize = y->dimSize[leadDim];
int stride = 1;
int blockSize = 1;
int blockNum = 1;
for (int i = leadDim + 1; i < y->order; i++)
stride *= y->dimSize[i];
blockSize = stride * dimensionSize;
blockNum = y->unitNum / blockSize;
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
CheckNTErrors((lossName == CROSSENTROPY || lossName == SQUAREDERROR || lossName == NOLOSS),
"Unknown loss function.");
int cudaGridSize[3], cudaBlockSize[3];
if (lossName == CROSSENTROPY || lossName == SQUAREDERROR) {
if (gold->isSparse) {
CheckNTErrors((gold->order == 2), "TODO!")
CheckNTErrors((leadDim == 0), "TODO!");
GDevs.GetCudaThread(x->devID, x->unitNum, cudaGridSize, cudaBlockSize);
/* dE/ds_j = exp(y_j) */
KernelExpLoss <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(DTYPE*)y->data,
dimensionSize * stride,
lossName);
GDevs.GetCudaThread(x->devID, gold->unitNumNonZero, cudaGridSize, cudaBlockSize);
/* dE/ds_j += -gold_j */
KernelLogSoftmaxBackwardDEDSSparseByRow <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(char*)gold->data + sizeof(int),
(DTYPE*)y->data,
(DTYPE*)x->data,
dedx->dimSize[0], dedx->dimSize[1], gold->unitNumNonZero, lossName);
}
else {
CheckNTErrors((_IsSameShaped(gold, y)), "The tensors must be of the same size!");
for (int k = 0; k < blockNum; k++) {
GDevs.GetCudaThread(x->devID, blockSize, cudaGridSize, cudaBlockSize);
/* dE/ds_j = -gold_j + exp(y_j) */
KernelLogSoftmaxBackwardDEDS <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data + k * blockSize,
(DTYPE*)gold->data + k * blockSize,
(DTYPE*)y->data + k * blockSize,
(DTYPE*)x->data + k * blockSize,
dimensionSize * stride, lossName);
}
}
if(padding != NULL) {
int n = leadDim;
int paddingOrder = padding->order;
int * paddingDims = new int[paddingOrder];
memcpy(paddingDims, padding->dimSize, padding->order * sizeof(int));
padding->Reshape(padding->unitNum);
int order = dedx->order;
int * dims = new int[order];
memcpy(dims, dedx->dimSize, dedx->order * sizeof(int));
dedx->Reshape(dedx->unitNum/dedx->GetDim(n), dedx->GetDim(n));
_MultiplyDimMe(dedx, padding, 0);
padding->Reshape(paddingOrder, paddingDims);
dedx->Reshape(order, dims);
delete[] paddingDims;
delete[] dims;
}
}
else {
ShowNTErrors("TODO!");
}
}
else{
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
#endif
} // namespace nts(NiuTrans.Tensor) | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
* $Update by: Lin Ye (email: linye2015@outlook.com) 2019-07-01 float16 added
*/
#include "LogSoftmax.h"
#include "LogSoftmax.cuh"
#include "Loss.cuh"
#include "../core/arithmetic/MultiplyDim.h"
#include "../core/reduce/ReduceSum.cuh"
#include "../core/reduce/ReduceMax.cuh"
#include "../core/shape/IsSameShaped.h"
#include "../XDevice.h"
#include <device_launch_parameters.h>
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmax(const XTensor * x, XTensor * y, int leadDim)
{
ShowNTErrors("You should call LogSoftmax instead!");
}
/*
log softmax forward computation (Cuda kernel)
for each column j, let y_{i,j} and x_{i,j} are the output
and state value for the i-th element of column j. We have
y_{i,j} = log(e^x_{i,j} / \sum_{i} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each column j
>> sum - \sum_{i} e^{x_{i,j}) for each column j
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByRow(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each column */
if (threadIdx.y == 0) {
inputSum[threadIdx.x] = sum[j];
inputMax[threadIdx.x] = max[j];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.x])) / (DTYPE)inputSum[threadIdx.x]);
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log softmax forward computation (Cuda kernel)
for each row i, let y_{i,j} and x_{i,j} are the output
and state value for the j-th element of row i. We have
y_{i,j} = log(e^x_{i,j} / \sum_{j} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each row i
>> sum - \sum_{j} e^{x_{i,j}) for each row i
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByCol(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each row */
if (threadIdx.x == 0) {
inputSum[threadIdx.y] = sum[i];
inputMax[threadIdx.y] = max[i];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.y])) / (DTYPE)inputSum[threadIdx.y]);
/*if (r < LOGPROB_MIN)
{
printf("min %e %e, %e %e, %e %e\n", r, x[key] - inputMax[threadIdx.y], x[key], inputMax[threadIdx.y], exp(x[key] - inputMax[threadIdx.y]), inputSum[threadIdx.y]);
}*/
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
>> sum - \sum_{i} e^{x_i}
>> max - \max_{i} e^{x_i}
*/
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max)
{
CheckNTErrors((x->devID >= 0), "Forward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID), "Input tensors must be on the same GPU.");
CheckNTErrors((x->order == y->order), "Input tensors must be of the same size.");
CheckNTErrors((x->order == 2), "Input tensors must be of order 2.");
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
DTYPE * maxData = (DTYPE*)max->data;
DTYPE * sumData = (DTYPE*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
}
else if (x->dataType == X_FLOAT16 && y->dataType == X_FLOAT16) {
#ifdef HALF_PRECISION
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
__half * maxData = (half*)max->data;
__half * sumData = (half*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<half, X_FLOAT16> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((half*)x->data, maxData, sumData, (half *)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<half, X_FLOAT16> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((half*)x->data, maxData, sumData, (half*)y->data, n, m);
}
#else
ShowNTErrors("Recompile the code with HALF_PRECISION!");
#endif
}
else {
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
/*
set dE/dx = exp(y)
>> dedy - dE/dy
>> dedx - dE/dx
>> y - output of the function
>> size - size of output
>> lossName - name of the loss function
*/
__global__
void KernelExpLoss(DTYPE * dedy, DTYPE * dedx, DTYPE * y, int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
/* dE/dx_j = exp(y_j) */
if (lossName == CROSSENTROPY)
dedx[i] = exp(y[i]);
/* dE/dx_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
dedx[i] = exp(y[i]);
else if (lossName == ONEHOTERROR)
dedx[i] = 0;
else
dedx[i] = 0;
}
}
/*
backward computation for log softmax
dE/dx = dE/dy * dy/dx
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> size - size of input/output
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDS(DTYPE * dedy, DTYPE * dedx, DTYPE * gold, DTYPE * y, DTYPE * x,
int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
DTYPE r = 0;
/* dE/ds_j = exp(y_j) */
if (lossName == CROSSENTROPY)
r = -gold[i] + exp(y[i]);
/* dE/ds_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
r = -gold[i] + exp(y[i]);
else if (lossName == ONEHOTERROR) {
if (gold[i] == 1.0F)
r = -gold[i] + exp(y[i]);
else
r = 0;
}
else {
r = dedy[i];
}
if (isnan(r))
r = 0;
if (isinf(r))
r = 0;
dedx[i] = r;
}
}
/*
backward computation for log softmax (sparse matrices) for each column
dE/dx_j += -gold_j
(for dE/dx = dE/dy * dy/dx)
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
>> gNonZeroNum -
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDSSparseByRow(DTYPE * dedy, DTYPE * dedx, void * gold, DTYPE * y, DTYPE * x,
int rowNum, int colNum, int gNonZeroNum, LOSS_FUNCTION_NAME lossName)
{
int tupleSize = sizeof(int) + sizeof(DTYPE);
int k = blockDim.x * blockIdx.x + threadIdx.x;
if (k < gNonZeroNum) {
/* load the sub-block of the sparse matrix b */
int key = *(int*)((char*)gold + tupleSize * k);
int ni = key / colNum;
int mi = key % colNum;
int value = *(DTYPE*)((char*)gold + tupleSize * k + sizeof(int));
if (lossName == CROSSENTROPY)
dedx[colNum * ni + mi] += -value;
else if (lossName == SQUAREDERROR)
dedx[colNum * ni + mi] += -value;
else if (lossName == ONEHOTERROR) {
int offset = colNum * ni + mi;
if (value == 1.0F)
dedx[offset] += (-value + exp(y[offset]));
//dedx[offset] += -value * 0.005;
}
}
}
/*
backward computation for dense matrics with default data type
dE/dx = dE/dy * dy/dx
log softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k})
dy_i/dx_j
= d{log(e^{x_i} / \sum_{k} e^{x_k})}/dx_j
= d{log(e^{x_i})}/dx_j - d{log(\sum_{k} e^{x_k})}/dx_j
= \delta(i,j) - e^{x_j}/\sum_{k} e^{x_k})
= \delta(i,j) - exp(y_j)
where \delta(i,j) = 1 if i = j, and \delta(i,j) = 0 otherwise
if loss E is defined as cross entropy, i.e., E = -\sum_{k} (gold_k * y_k), we have
dE/dy_i = -gold_i
(where {gold_k} is the gold standard distribution)
then
dE/dx_j
= \sum_{i} {dE/dy_i * dy_i/dx_j}
= \sum_{i} {-gold_i * (\delta(i,j) - exp(y_j))}
= \sum_{i} {-gold_i * \delta{i,j)} + \sum_{i} {gold_i * exp(y_j)}
= -gold_i * \delta(i,j) + \sum_{i} {gold_i * exp(y_j)}
= -gold_j + exp(y_j)
Note: gold_i is a distribution, i.e., \sum_{i} gold_i = 1
if gold is with a one-hot representation (gold_i = 1 for only one dimension),
we can reformulize it as dE/dx_j = -\delta(i,j) + exp(y_j)
There are two ways to implement this process.
Method 1. we compute dE/dy and dy/dx resepectively, and then reach dE/dx by dE/dx = dE/dy * dy/dx
(or more precisely dE/dx_j = \sum_{i} {dE/dy_i * dy_i/dx_j})
Method 2. we compute dE/dx (or dE/dx_j) in a single step, rather than resorting to the
sub-models dE/dy and dy/dx. We can do this by using dE/dx_j = -gold_j + exp(y_j)
Here we choose Method 2, i.e., we straightforwardly compute dE/dx_j by
dE/dx_j = -gold_j + exp(y_j)
(or dE/dx_j = -\delta(i,j) + exp(y_j) for a Maximum A Posteriori Estimation (MAP))
Method 1 is also fine but is more time consuming due to the summation over dimensions.
Note that this method is not good for the standard version softmax when working with
the cross entropy loss. Because it is numerical unstable. When we use a usual method to
define softmax, we have softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k}). It is trivial to
know that dy_i/dx_j = y_i * \delta(i,j) - y_i * y_j. As y_i and y_j could be a small number,
y_i * y_i would result in a much smaller one with a risk of lossing precision. This is even
worse we multiply dy_i/dx_j with dE/dy_i. So it is in general to use log softmax instead for
better numerical stability.
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> dedy - dE/dy
>> deds - dE/dx
>> lossName - type of loss function, e.g., cross entropy
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName)
{
leadDim = leadDim < 0 ? y->order - 1 : leadDim;
CheckNTErrors((x->devID >= 0), "Backward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID && gold->devID == y->devID),
"Tensors used in log softmax are not on the same GPU.");
CheckNTErrors((gold != NULL), "No x gold standard is found!");
int dimensionSize = y->dimSize[leadDim];
int stride = 1;
int blockSize = 1;
int blockNum = 1;
for (int i = leadDim + 1; i < y->order; i++)
stride *= y->dimSize[i];
blockSize = stride * dimensionSize;
blockNum = y->unitNum / blockSize;
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
CheckNTErrors((lossName == CROSSENTROPY || lossName == SQUAREDERROR || lossName == NOLOSS),
"Unknown loss function.");
int cudaGridSize[3], cudaBlockSize[3];
if (lossName == CROSSENTROPY || lossName == SQUAREDERROR) {
if (gold->isSparse) {
CheckNTErrors((gold->order == 2), "TODO!")
CheckNTErrors((leadDim == 0), "TODO!");
GDevs.GetCudaThread(x->devID, x->unitNum, cudaGridSize, cudaBlockSize);
/* dE/ds_j = exp(y_j) */
KernelExpLoss <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(DTYPE*)y->data,
dimensionSize * stride,
lossName);
GDevs.GetCudaThread(x->devID, gold->unitNumNonZero, cudaGridSize, cudaBlockSize);
/* dE/ds_j += -gold_j */
KernelLogSoftmaxBackwardDEDSSparseByRow <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(char*)gold->data + sizeof(int),
(DTYPE*)y->data,
(DTYPE*)x->data,
dedx->dimSize[0], dedx->dimSize[1], gold->unitNumNonZero, lossName);
}
else {
CheckNTErrors((_IsSameShaped(gold, y)), "The tensors must be of the same size!");
for (int k = 0; k < blockNum; k++) {
GDevs.GetCudaThread(x->devID, blockSize, cudaGridSize, cudaBlockSize);
/* dE/ds_j = -gold_j + exp(y_j) */
KernelLogSoftmaxBackwardDEDS <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data + k * blockSize,
(DTYPE*)gold->data + k * blockSize,
(DTYPE*)y->data + k * blockSize,
(DTYPE*)x->data + k * blockSize,
dimensionSize * stride, lossName);
}
}
if(padding != NULL) {
int n = leadDim;
int paddingOrder = padding->order;
int * paddingDims = new int[paddingOrder];
memcpy(paddingDims, padding->dimSize, padding->order * sizeof(int));
padding->Reshape(padding->unitNum);
int order = dedx->order;
int * dims = new int[order];
memcpy(dims, dedx->dimSize, dedx->order * sizeof(int));
dedx->Reshape(dedx->unitNum/dedx->GetDim(n), dedx->GetDim(n));
_MultiplyDimMe(dedx, padding, 0);
padding->Reshape(paddingOrder, paddingDims);
dedx->Reshape(order, dims);
delete[] paddingDims;
delete[] dims;
}
}
else {
ShowNTErrors("TODO!");
}
}
else{
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
#endif
} // namespace nts(NiuTrans.Tensor) | .file "tmpxft_00107a41_00000000-6_LogSoftmax.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3094:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3094:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3117:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3117:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
* $Update by: Lin Ye (email: linye2015@outlook.com) 2019-07-01 float16 added
*/
#include "LogSoftmax.h"
#include "LogSoftmax.cuh"
#include "Loss.cuh"
#include "../core/arithmetic/MultiplyDim.h"
#include "../core/reduce/ReduceSum.cuh"
#include "../core/reduce/ReduceMax.cuh"
#include "../core/shape/IsSameShaped.h"
#include "../XDevice.h"
#include <device_launch_parameters.h>
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmax(const XTensor * x, XTensor * y, int leadDim)
{
ShowNTErrors("You should call LogSoftmax instead!");
}
/*
log softmax forward computation (Cuda kernel)
for each column j, let y_{i,j} and x_{i,j} are the output
and state value for the i-th element of column j. We have
y_{i,j} = log(e^x_{i,j} / \sum_{i} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each column j
>> sum - \sum_{i} e^{x_{i,j}) for each column j
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByRow(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each column */
if (threadIdx.y == 0) {
inputSum[threadIdx.x] = sum[j];
inputMax[threadIdx.x] = max[j];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.x])) / (DTYPE)inputSum[threadIdx.x]);
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log softmax forward computation (Cuda kernel)
for each row i, let y_{i,j} and x_{i,j} are the output
and state value for the j-th element of row i. We have
y_{i,j} = log(e^x_{i,j} / \sum_{j} e^{x_{i,j})
>> x - input tensor (in matrix)
>> max - the max value for each row i
>> sum - \sum_{j} e^{x_{i,j}) for each row i
>> y - output tensor (in matrix)
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
*/
template <class T ,TENSOR_DATA_TYPE dataType>
__global__
void KernelLogSoftmaxComputeByCol(T * x, T * max, T * sum, T * y, int rowNum, int colNum)
{
__shared__ T inputSum[MAX_CUDA_THREAD_NUM_PER_BLOCK];
__shared__ T inputMax[MAX_CUDA_THREAD_NUM_PER_BLOCK];
int i = blockDim.y * blockIdx.y + threadIdx.y;
int j = blockDim.x * blockIdx.x + threadIdx.x;
/* we keep the sum and max number in the shared memory for each row */
if (threadIdx.x == 0) {
inputSum[threadIdx.y] = sum[i];
inputMax[threadIdx.y] = max[i];
}
/* synchronize to make sure the values of max and sum are loaded */
__syncthreads();
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
if (i < rowNum && j < colNum) {
int key = i * colNum + j;
if (dataType == DEFAULT_DTYPE) {
DTYPE r = log((DTYPE)exp((DTYPE)(x[key] - inputMax[threadIdx.y])) / (DTYPE)inputSum[threadIdx.y]);
/*if (r < LOGPROB_MIN)
{
printf("min %e %e, %e %e, %e %e\n", r, x[key] - inputMax[threadIdx.y], x[key], inputMax[threadIdx.y], exp(x[key] - inputMax[threadIdx.y]), inputSum[threadIdx.y]);
}*/
if (isnan(r))
r = LOGPROB_MIN;
if (isinf(r))
r = LOGPROB_MIN;
y[key] = MAX(r, LOGPROB_MIN);
}
else if (dataType == X_FLOAT16) {
#if __CUDA_ARCH__ >= 600
half r = hlog(hexp((half)x[key] - (half)inputMax[threadIdx.y]) / (half)inputSum[threadIdx.y]);
y[key] = r;
#endif
}
}
}
/*
log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version)
>> x - input vector
>> y - result
>> leadDim - leading dimension (along which we perform reduction)
>> sum - \sum_{i} e^{x_i}
>> max - \max_{i} e^{x_i}
*/
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max)
{
CheckNTErrors((x->devID >= 0), "Forward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID), "Input tensors must be on the same GPU.");
CheckNTErrors((x->order == y->order), "Input tensors must be of the same size.");
CheckNTErrors((x->order == 2), "Input tensors must be of order 2.");
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
DTYPE * maxData = (DTYPE*)max->data;
DTYPE * sumData = (DTYPE*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<DTYPE, DEFAULT_DTYPE> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((DTYPE*)x->data, maxData, sumData, (DTYPE*)y->data, n, m);
}
}
else if (x->dataType == X_FLOAT16 && y->dataType == X_FLOAT16) {
#ifdef HALF_PRECISION
int gridSize[3], blockSize[3];
int n = x->dimSize[0];
int m = x->dimSize[1];
/* allocate the buffer */
__half * maxData = (half*)max->data;
__half * sumData = (half*)sum->data;
if (leadDim == 0) {
GDevs.GetCudaThread2D(x->devID, n, m, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{j}) / \sum_{k} e^{s_{k,j} - max_{j}}) */
KernelLogSoftmaxComputeByRow<half, X_FLOAT16> <<<dim3(gridSize[1], gridSize[0]), dim3(blockSize[1], blockSize[0])>>>
((half*)x->data, maxData, sumData, (half *)y->data, n, m);
}
else {
GDevs.GetCudaThread2D(x->devID, m, n, MAX_INT, gridSize, blockSize);
/* y_{i,j} = log(e^(s_{i,j} - max_{i}) / \sum_{k} e^{s_{i,k} - max_{i}}) */
KernelLogSoftmaxComputeByCol<half, X_FLOAT16> <<<dim3(gridSize[0], gridSize[1]), dim3(blockSize[0], blockSize[1])>>>
((half*)x->data, maxData, sumData, (half*)y->data, n, m);
}
#else
ShowNTErrors("Recompile the code with HALF_PRECISION!");
#endif
}
else {
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
/*
set dE/dx = exp(y)
>> dedy - dE/dy
>> dedx - dE/dx
>> y - output of the function
>> size - size of output
>> lossName - name of the loss function
*/
__global__
void KernelExpLoss(DTYPE * dedy, DTYPE * dedx, DTYPE * y, int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
/* dE/dx_j = exp(y_j) */
if (lossName == CROSSENTROPY)
dedx[i] = exp(y[i]);
/* dE/dx_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
dedx[i] = exp(y[i]);
else if (lossName == ONEHOTERROR)
dedx[i] = 0;
else
dedx[i] = 0;
}
}
/*
backward computation for log softmax
dE/dx = dE/dy * dy/dx
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> size - size of input/output
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDS(DTYPE * dedy, DTYPE * dedx, DTYPE * gold, DTYPE * y, DTYPE * x,
int size, LOSS_FUNCTION_NAME lossName)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < size) {
DTYPE r = 0;
/* dE/ds_j = exp(y_j) */
if (lossName == CROSSENTROPY)
r = -gold[i] + exp(y[i]);
/* dE/ds_j = exp(y_j) */
else if (lossName == SQUAREDERROR)
r = -gold[i] + exp(y[i]);
else if (lossName == ONEHOTERROR) {
if (gold[i] == 1.0F)
r = -gold[i] + exp(y[i]);
else
r = 0;
}
else {
r = dedy[i];
}
if (isnan(r))
r = 0;
if (isinf(r))
r = 0;
dedx[i] = r;
}
}
/*
backward computation for log softmax (sparse matrices) for each column
dE/dx_j += -gold_j
(for dE/dx = dE/dy * dy/dx)
>> dedy - dE/dy
>> dedx - dE/dx
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> rowNum - row number of the matrix
>> colNum - column number of the matrix
>> gNonZeroNum -
>> lossName - name of the loss function
*/
__global__
void KernelLogSoftmaxBackwardDEDSSparseByRow(DTYPE * dedy, DTYPE * dedx, void * gold, DTYPE * y, DTYPE * x,
int rowNum, int colNum, int gNonZeroNum, LOSS_FUNCTION_NAME lossName)
{
int tupleSize = sizeof(int) + sizeof(DTYPE);
int k = blockDim.x * blockIdx.x + threadIdx.x;
if (k < gNonZeroNum) {
/* load the sub-block of the sparse matrix b */
int key = *(int*)((char*)gold + tupleSize * k);
int ni = key / colNum;
int mi = key % colNum;
int value = *(DTYPE*)((char*)gold + tupleSize * k + sizeof(int));
if (lossName == CROSSENTROPY)
dedx[colNum * ni + mi] += -value;
else if (lossName == SQUAREDERROR)
dedx[colNum * ni + mi] += -value;
else if (lossName == ONEHOTERROR) {
int offset = colNum * ni + mi;
if (value == 1.0F)
dedx[offset] += (-value + exp(y[offset]));
//dedx[offset] += -value * 0.005;
}
}
}
/*
backward computation for dense matrics with default data type
dE/dx = dE/dy * dy/dx
log softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k})
dy_i/dx_j
= d{log(e^{x_i} / \sum_{k} e^{x_k})}/dx_j
= d{log(e^{x_i})}/dx_j - d{log(\sum_{k} e^{x_k})}/dx_j
= \delta(i,j) - e^{x_j}/\sum_{k} e^{x_k})
= \delta(i,j) - exp(y_j)
where \delta(i,j) = 1 if i = j, and \delta(i,j) = 0 otherwise
if loss E is defined as cross entropy, i.e., E = -\sum_{k} (gold_k * y_k), we have
dE/dy_i = -gold_i
(where {gold_k} is the gold standard distribution)
then
dE/dx_j
= \sum_{i} {dE/dy_i * dy_i/dx_j}
= \sum_{i} {-gold_i * (\delta(i,j) - exp(y_j))}
= \sum_{i} {-gold_i * \delta{i,j)} + \sum_{i} {gold_i * exp(y_j)}
= -gold_i * \delta(i,j) + \sum_{i} {gold_i * exp(y_j)}
= -gold_j + exp(y_j)
Note: gold_i is a distribution, i.e., \sum_{i} gold_i = 1
if gold is with a one-hot representation (gold_i = 1 for only one dimension),
we can reformulize it as dE/dx_j = -\delta(i,j) + exp(y_j)
There are two ways to implement this process.
Method 1. we compute dE/dy and dy/dx resepectively, and then reach dE/dx by dE/dx = dE/dy * dy/dx
(or more precisely dE/dx_j = \sum_{i} {dE/dy_i * dy_i/dx_j})
Method 2. we compute dE/dx (or dE/dx_j) in a single step, rather than resorting to the
sub-models dE/dy and dy/dx. We can do this by using dE/dx_j = -gold_j + exp(y_j)
Here we choose Method 2, i.e., we straightforwardly compute dE/dx_j by
dE/dx_j = -gold_j + exp(y_j)
(or dE/dx_j = -\delta(i,j) + exp(y_j) for a Maximum A Posteriori Estimation (MAP))
Method 1 is also fine but is more time consuming due to the summation over dimensions.
Note that this method is not good for the standard version softmax when working with
the cross entropy loss. Because it is numerical unstable. When we use a usual method to
define softmax, we have softmax: y_i = log(e^{x_i} / \sum_{k} e^{x_k}). It is trivial to
know that dy_i/dx_j = y_i * \delta(i,j) - y_i * y_j. As y_i and y_j could be a small number,
y_i * y_i would result in a much smaller one with a risk of lossing precision. This is even
worse we multiply dy_i/dx_j with dE/dy_i. So it is in general to use log softmax instead for
better numerical stability.
>> gold - gold standard to measure error (or loss)
>> y - output of the function
>> x - input of the function
>> dedy - dE/dy
>> deds - dE/dx
>> lossName - type of loss function, e.g., cross entropy
>> leadDim - leading dimension (along which we perform reduction)
*/
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName)
{
leadDim = leadDim < 0 ? y->order - 1 : leadDim;
CheckNTErrors((x->devID >= 0), "Backward computation of log softmax must be run on GPUs.");
CheckNTErrors((x->devID == y->devID && gold->devID == y->devID),
"Tensors used in log softmax are not on the same GPU.");
CheckNTErrors((gold != NULL), "No x gold standard is found!");
int dimensionSize = y->dimSize[leadDim];
int stride = 1;
int blockSize = 1;
int blockNum = 1;
for (int i = leadDim + 1; i < y->order; i++)
stride *= y->dimSize[i];
blockSize = stride * dimensionSize;
blockNum = y->unitNum / blockSize;
int devIDBackup;
ProtectCudaDev(x->devID, devIDBackup);
if (x->dataType == DEFAULT_DTYPE && y->dataType == DEFAULT_DTYPE) {
CheckNTErrors((lossName == CROSSENTROPY || lossName == SQUAREDERROR || lossName == NOLOSS),
"Unknown loss function.");
int cudaGridSize[3], cudaBlockSize[3];
if (lossName == CROSSENTROPY || lossName == SQUAREDERROR) {
if (gold->isSparse) {
CheckNTErrors((gold->order == 2), "TODO!")
CheckNTErrors((leadDim == 0), "TODO!");
GDevs.GetCudaThread(x->devID, x->unitNum, cudaGridSize, cudaBlockSize);
/* dE/ds_j = exp(y_j) */
KernelExpLoss <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(DTYPE*)y->data,
dimensionSize * stride,
lossName);
GDevs.GetCudaThread(x->devID, gold->unitNumNonZero, cudaGridSize, cudaBlockSize);
/* dE/ds_j += -gold_j */
KernelLogSoftmaxBackwardDEDSSparseByRow <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data,
(char*)gold->data + sizeof(int),
(DTYPE*)y->data,
(DTYPE*)x->data,
dedx->dimSize[0], dedx->dimSize[1], gold->unitNumNonZero, lossName);
}
else {
CheckNTErrors((_IsSameShaped(gold, y)), "The tensors must be of the same size!");
for (int k = 0; k < blockNum; k++) {
GDevs.GetCudaThread(x->devID, blockSize, cudaGridSize, cudaBlockSize);
/* dE/ds_j = -gold_j + exp(y_j) */
KernelLogSoftmaxBackwardDEDS <<<dim3(cudaGridSize[0]), dim3(cudaBlockSize[0]) >>>
(NULL,
(DTYPE*)dedx->data + k * blockSize,
(DTYPE*)gold->data + k * blockSize,
(DTYPE*)y->data + k * blockSize,
(DTYPE*)x->data + k * blockSize,
dimensionSize * stride, lossName);
}
}
if(padding != NULL) {
int n = leadDim;
int paddingOrder = padding->order;
int * paddingDims = new int[paddingOrder];
memcpy(paddingDims, padding->dimSize, padding->order * sizeof(int));
padding->Reshape(padding->unitNum);
int order = dedx->order;
int * dims = new int[order];
memcpy(dims, dedx->dimSize, dedx->order * sizeof(int));
dedx->Reshape(dedx->unitNum/dedx->GetDim(n), dedx->GetDim(n));
_MultiplyDimMe(dedx, padding, 0);
padding->Reshape(paddingOrder, paddingDims);
dedx->Reshape(order, dims);
delete[] paddingDims;
delete[] dims;
}
}
else {
ShowNTErrors("TODO!");
}
}
else{
ShowNTErrors("TODO!");
}
BacktoCudaDev(x->devID, devIDBackup);
}
#endif
} // namespace nts(NiuTrans.Tensor) | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
*/
#ifndef __LOGSOFTMAX_CUH__
#define __LOGSOFTMAX_CUH__
#include "../XTensor.h"
#include "Loss.h"
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmax(const XTensor * input, XTensor * output, int leadDim);
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max);
/* de/dx (Cuda version) */
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName);
#endif // USE_CUDA
} // namespace nts(NiuTrans.Tensor)
#endif // __LOGSOFTMAX_CUH__ |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
*/
#ifndef __LOGSOFTMAX_CUH__
#define __LOGSOFTMAX_CUH__
#include "../XTensor.h"
#include "Loss.h"
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmax(const XTensor * input, XTensor * output, int leadDim);
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max);
/* de/dx (Cuda version) */
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName);
#endif // USE_CUDA
} // namespace nts(NiuTrans.Tensor)
#endif // __LOGSOFTMAX_CUH__ | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* NiuTrans.Tensor - an open-source tensor library
* Copyright (C) 2017, Natural Language Processing Lab, Northeastern University.
* All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* $Created by: XIAO Tong (email: xiaotong@mail.neu.edu.cn) 2018-04-26
*/
#ifndef __LOGSOFTMAX_CUH__
#define __LOGSOFTMAX_CUH__
#include "../XTensor.h"
#include "Loss.h"
namespace nts { // namespace nts(NiuTrans.Tensor)
#ifdef USE_CUDA
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmax(const XTensor * input, XTensor * output, int leadDim);
/* log scale softmax y = log(e^x / \sum_{i} e^{x_i}) (Cuda version) */
void _CudaLogSoftmaxSumMax(XTensor * x, XTensor * y, int leadDim, XTensor * sum, XTensor * max);
/* de/dx (Cuda version) */
void _CudaLogSoftmaxBackward(XTensor * gold, XTensor * y, XTensor * x,
XTensor * dedy, XTensor * dedx,
XTensor * padding, int leadDim,
LOSS_FUNCTION_NAME lossName);
#endif // USE_CUDA
} // namespace nts(NiuTrans.Tensor)
#endif // __LOGSOFTMAX_CUH__ | .text
.file "LogSoftmax.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00107a41_00000000-6_LogSoftmax.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3094:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3094:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3117:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3117:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "LogSoftmax.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
int main( void )
{
cudaDeviceProp prop;
int count;
char str[4];
cudaGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
cudaGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
int main( void )
{
cudaDeviceProp prop;
int count;
char str[4];
cudaGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
cudaGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} | .file "tmpxft_00161a33_00000000-6_count_devices.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "No CUDA capable devices found.\n"
.align 8
.LC1:
.string " --- General Information for device %d ---\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "Name: %s\n"
.LC3:
.string "\n"
.LC4:
.string "%d.%d"
.section .rodata.str1.8
.align 8
.LC5:
.string "Compute capability : %14s\n"
.align 8
.LC7:
.string "Clock rate : %14.2f (GHz)\n"
.align 8
.LC8:
.string " --- Memory Information for device %d ---\n"
.align 8
.LC10:
.string "Total global mem : %14.1f (gb)\n"
.align 8
.LC11:
.string " --- MP Information for device %d ---\n"
.section .rodata.str1.1
.LC12:
.string "Multiprocessor count : %14d\n"
.section .rodata.str1.8
.align 8
.LC14:
.string "Shared mem per mp : %14.1f (kb)\n"
.align 8
.LC15:
.string "Registers per mp : %14.1f (kb)\n"
.align 8
.LC16:
.string "Threads in warp : %14d\n"
.align 8
.LC17:
.string "Max threads per block : %14d\n"
.align 8
.LC18:
.string "Max thread dimensions: (%d, %d, %d)\n"
.align 8
.LC19:
.string "Max grid dimensions : %d, %d, %d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1072, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1064(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
je .L14
.L4:
cmpl $0, 12(%rsp)
jle .L5
movl $0, %ebx
leaq .LC3(%rip), %rbp
jmp .L10
.L14:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L4
.L6:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
jmp .L7
.L8:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
.L9:
mulsd .LC13(%rip), %xmm0
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 320(%rsp), %xmm0
mulsd .LC13(%rip), %xmm0
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L5
.L10:
leaq 16(%rsp), %r12
movl %ebx, %esi
movq %r12, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 1060(%rsp), %r12
movl 380(%rsp), %r9d
movl 376(%rsp), %r8d
leaq .LC4(%rip), %rcx
movl $4, %edx
movl $2, %esi
movq %r12, %rdi
movl $0, %eax
call __sprintf_chk@PLT
movq %r12, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 364(%rsp), %xmm0
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rax
testq %rax, %rax
js .L6
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L7:
mulsd .LC9(%rip), %xmm0
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rax
testq %rax, %rax
js .L8
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L9
.L5:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L15
movl $0, %eax
addq $1072, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1093567616
.align 8
.LC9:
.long 0
.long 1041235968
.align 8
.LC13:
.long 0
.long 1062207488
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
int main( void )
{
cudaDeviceProp prop;
int count;
char str[4];
cudaGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
cudaGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} | #include <hip/hip_runtime.h>
#include <stdio.h>
int main( void )
{
hipDeviceProp_t prop;
int count;
char str[4];
hipGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
hipGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
int main( void )
{
hipDeviceProp_t prop;
int count;
char str[4];
hipGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
hipGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
int main( void )
{
hipDeviceProp_t prop;
int count;
char str[4];
hipGetDeviceCount( &count);
if (count == 0)
{
printf("No CUDA capable devices found.\n");
}
for (int i = 0; i < count; i++)
{
hipGetDeviceProperties( &prop, i);
printf(" --- General Information for device %d ---\n", i );
printf("Name: %s\n", prop.name );
printf("\n");
sprintf(str,"%d.%d",prop.major, prop.minor);
printf("Compute capability : %14s\n",str);
printf("Clock rate : %14.2f (GHz)\n", prop.clockRate/1000000.0);
printf("\n");
printf(" --- Memory Information for device %d ---\n", i );
//printf("Total global mem : %14.1f (bytes)\n", (double) prop.totalGlobalMem );
//printf("Total global mem : %14.1f (kb)\n", prop.totalGlobalMem/1024.0);
//printf("Total global mem : %14.1f (mb)\n", prop.totalGlobalMem/(1024.0*1024.0));
printf("Total global mem : %14.1f (gb)\n", prop.totalGlobalMem/(1024.0*1024.0*1024.0));
printf("\n");
printf( " --- MP Information for device %d ---\n", i );
printf( "Multiprocessor count : %14d\n",
prop.multiProcessorCount );
printf("Shared mem per mp : %14.1f (kb)\n", prop.sharedMemPerBlock/1024. );
printf("Registers per mp : %14.1f (kb)\n", prop.regsPerBlock/1024. );
printf("Threads in warp : %14d\n", prop.warpSize );
printf("Max threads per block : %14d\n",
prop.maxThreadsPerBlock );
printf( "Max thread dimensions: (%d, %d, %d)\n",
prop.maxThreadsDim[0], prop.maxThreadsDim[1],
prop.maxThreadsDim[2] );
printf( "Max grid dimensions : %d, %d, %d\n",
prop.maxGridSize[0], prop.maxGridSize[1],
prop.maxGridSize[2] );
printf( "\n" );
}
} | .text
.file "count_devices.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.LCPI0_3:
.quad 0x3e10000000000000 # double 9.3132257461547852E-10
.LCPI0_4:
.quad 0x3f50000000000000 # double 9.765625E-4
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI0_1:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI0_2:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 1520
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 8(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 8(%rsp)
jne .LBB0_2
# %bb.1:
movl $.Lstr, %edi
callq puts@PLT
.LBB0_2:
cmpl $0, 8(%rsp)
jle .LBB0_5
# %bb.3: # %.lr.ph
leaq 16(%rsp), %rbx
leaq 12(%rsp), %r14
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_4: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.1, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
movl 376(%rsp), %edx
movl 380(%rsp), %ecx
movl $.L.str.4, %esi
movq %r14, %rdi
xorl %eax, %eax
callq sprintf
movl $.L.str.5, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
xorps %xmm0, %xmm0
cvtsi2sdl 364(%rsp), %xmm0
divsd .LCPI0_0(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.L.str.7, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movsd 304(%rsp), %xmm1 # xmm1 = mem[0],zero
movapd .LCPI0_1(%rip), %xmm0 # xmm0 = [1127219200,1160773632,0,0]
unpcklps %xmm0, %xmm1 # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
movapd .LCPI0_2(%rip), %xmm0 # xmm0 = [4.503599627370496E+15,1.9342813113834067E+25]
subpd %xmm0, %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
mulsd .LCPI0_3(%rip), %xmm0
movl $.L.str.8, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.L.str.9, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl 404(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movsd 312(%rsp), %xmm1 # xmm1 = mem[0],zero
unpcklps .LCPI0_1(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI0_2(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
movsd .LCPI0_4(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm0
movl $.L.str.11, %edi
movb $1, %al
callq printf
xorps %xmm0, %xmm0
cvtsi2sdl 320(%rsp), %xmm0
mulsd .LCPI0_4(%rip), %xmm0
movl $.L.str.12, %edi
movb $1, %al
callq printf
movl 324(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 336(%rsp), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movl 340(%rsp), %esi
movl 344(%rsp), %edx
movl 348(%rsp), %ecx
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 352(%rsp), %esi
movl 356(%rsp), %edx
movl 360(%rsp), %ecx
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 8(%rsp), %ebp
jl .LBB0_4
.LBB0_5: # %._crit_edge
xorl %eax, %eax
addq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz " --- General Information for device %d ---\n"
.size .L.str.1, 46
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Name: %s\n"
.size .L.str.2, 11
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%d.%d"
.size .L.str.4, 6
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Compute capability : %14s\n"
.size .L.str.5, 31
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Clock rate : %14.2f (GHz)\n"
.size .L.str.6, 39
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " --- Memory Information for device %d ---\n"
.size .L.str.7, 45
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Total global mem : %14.1f (gb)\n"
.size .L.str.8, 38
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " --- MP Information for device %d ---\n"
.size .L.str.9, 41
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Multiprocessor count : %14d\n"
.size .L.str.10, 30
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Shared mem per mp : %14.1f (kb)\n"
.size .L.str.11, 38
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Registers per mp : %14.1f (kb)\n"
.size .L.str.12, 38
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Threads in warp : %14d\n"
.size .L.str.13, 31
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Max threads per block : %14d\n"
.size .L.str.14, 31
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Max thread dimensions: (%d, %d, %d)\n"
.size .L.str.15, 38
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Max grid dimensions : %d, %d, %d\n"
.size .L.str.16, 36
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "No CUDA capable devices found."
.size .Lstr, 31
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00161a33_00000000-6_count_devices.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "No CUDA capable devices found.\n"
.align 8
.LC1:
.string " --- General Information for device %d ---\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "Name: %s\n"
.LC3:
.string "\n"
.LC4:
.string "%d.%d"
.section .rodata.str1.8
.align 8
.LC5:
.string "Compute capability : %14s\n"
.align 8
.LC7:
.string "Clock rate : %14.2f (GHz)\n"
.align 8
.LC8:
.string " --- Memory Information for device %d ---\n"
.align 8
.LC10:
.string "Total global mem : %14.1f (gb)\n"
.align 8
.LC11:
.string " --- MP Information for device %d ---\n"
.section .rodata.str1.1
.LC12:
.string "Multiprocessor count : %14d\n"
.section .rodata.str1.8
.align 8
.LC14:
.string "Shared mem per mp : %14.1f (kb)\n"
.align 8
.LC15:
.string "Registers per mp : %14.1f (kb)\n"
.align 8
.LC16:
.string "Threads in warp : %14d\n"
.align 8
.LC17:
.string "Max threads per block : %14d\n"
.align 8
.LC18:
.string "Max thread dimensions: (%d, %d, %d)\n"
.align 8
.LC19:
.string "Max grid dimensions : %d, %d, %d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1072, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1064(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
cmpl $0, 12(%rsp)
je .L14
.L4:
cmpl $0, 12(%rsp)
jle .L5
movl $0, %ebx
leaq .LC3(%rip), %rbp
jmp .L10
.L14:
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L4
.L6:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
jmp .L7
.L8:
movq %rax, %rdx
shrq %rdx
andl $1, %eax
orq %rax, %rdx
pxor %xmm0, %xmm0
cvtsi2sdq %rdx, %xmm0
addsd %xmm0, %xmm0
.L9:
mulsd .LC13(%rip), %xmm0
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 320(%rsp), %xmm0
mulsd .LC13(%rip), %xmm0
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jle .L5
.L10:
leaq 16(%rsp), %r12
movl %ebx, %esi
movq %r12, %rdi
call cudaGetDeviceProperties_v2@PLT
movl %ebx, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 1060(%rsp), %r12
movl 380(%rsp), %r9d
movl 376(%rsp), %r8d
leaq .LC4(%rip), %rcx
movl $4, %edx
movl $2, %esi
movq %r12, %rdi
movl $0, %eax
call __sprintf_chk@PLT
movq %r12, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
pxor %xmm0, %xmm0
cvtsi2sdl 364(%rsp), %xmm0
divsd .LC6(%rip), %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rax
testq %rax, %rax
js .L6
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
.L7:
mulsd .LC9(%rip), %xmm0
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 404(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rax
testq %rax, %rax
js .L8
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
jmp .L9
.L5:
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L15
movl $0, %eax
addq $1072, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC6:
.long 0
.long 1093567616
.align 8
.LC9:
.long 0
.long 1041235968
.align 8
.LC13:
.long 0
.long 1062207488
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "count_devices.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x412e848000000000 # double 1.0E+6
.LCPI0_3:
.quad 0x3e10000000000000 # double 9.3132257461547852E-10
.LCPI0_4:
.quad 0x3f50000000000000 # double 9.765625E-4
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI0_1:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI0_2:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 1520
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 8(%rsp), %rdi
callq hipGetDeviceCount
cmpl $0, 8(%rsp)
jne .LBB0_2
# %bb.1:
movl $.Lstr, %edi
callq puts@PLT
.LBB0_2:
cmpl $0, 8(%rsp)
jle .LBB0_5
# %bb.3: # %.lr.ph
leaq 16(%rsp), %rbx
leaq 12(%rsp), %r14
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_4: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.1, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
movl 376(%rsp), %edx
movl 380(%rsp), %ecx
movl $.L.str.4, %esi
movq %r14, %rdi
xorl %eax, %eax
callq sprintf
movl $.L.str.5, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
xorps %xmm0, %xmm0
cvtsi2sdl 364(%rsp), %xmm0
divsd .LCPI0_0(%rip), %xmm0
movl $.L.str.6, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.L.str.7, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movsd 304(%rsp), %xmm1 # xmm1 = mem[0],zero
movapd .LCPI0_1(%rip), %xmm0 # xmm0 = [1127219200,1160773632,0,0]
unpcklps %xmm0, %xmm1 # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
movapd .LCPI0_2(%rip), %xmm0 # xmm0 = [4.503599627370496E+15,1.9342813113834067E+25]
subpd %xmm0, %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
mulsd .LCPI0_3(%rip), %xmm0
movl $.L.str.8, %edi
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
movl $.L.str.9, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl 404(%rsp), %esi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movsd 312(%rsp), %xmm1 # xmm1 = mem[0],zero
unpcklps .LCPI0_1(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI0_2(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
movsd .LCPI0_4(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm0
movl $.L.str.11, %edi
movb $1, %al
callq printf
xorps %xmm0, %xmm0
cvtsi2sdl 320(%rsp), %xmm0
mulsd .LCPI0_4(%rip), %xmm0
movl $.L.str.12, %edi
movb $1, %al
callq printf
movl 324(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movl 336(%rsp), %esi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
movl 340(%rsp), %esi
movl 344(%rsp), %edx
movl 348(%rsp), %ecx
movl $.L.str.15, %edi
xorl %eax, %eax
callq printf
movl 352(%rsp), %esi
movl 356(%rsp), %edx
movl 360(%rsp), %ecx
movl $.L.str.16, %edi
xorl %eax, %eax
callq printf
movl $10, %edi
callq putchar@PLT
incl %ebp
cmpl 8(%rsp), %ebp
jl .LBB0_4
.LBB0_5: # %._crit_edge
xorl %eax, %eax
addq $1488, %rsp # imm = 0x5D0
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz " --- General Information for device %d ---\n"
.size .L.str.1, 46
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Name: %s\n"
.size .L.str.2, 11
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "%d.%d"
.size .L.str.4, 6
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Compute capability : %14s\n"
.size .L.str.5, 31
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Clock rate : %14.2f (GHz)\n"
.size .L.str.6, 39
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " --- Memory Information for device %d ---\n"
.size .L.str.7, 45
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Total global mem : %14.1f (gb)\n"
.size .L.str.8, 38
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " --- MP Information for device %d ---\n"
.size .L.str.9, 41
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Multiprocessor count : %14d\n"
.size .L.str.10, 30
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "Shared mem per mp : %14.1f (kb)\n"
.size .L.str.11, 38
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "Registers per mp : %14.1f (kb)\n"
.size .L.str.12, 38
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Threads in warp : %14d\n"
.size .L.str.13, 31
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Max threads per block : %14d\n"
.size .L.str.14, 31
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Max thread dimensions: (%d, %d, %d)\n"
.size .L.str.15, 38
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "Max grid dimensions : %d, %d, %d\n"
.size .L.str.16, 36
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "No CUDA capable devices found."
.size .Lstr, 31
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
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