system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;
#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];
__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
const int nn = 1024;
int tid = threadIdx.x + blockIdx.x * bl... | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;
#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];
__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
const int nn = 1024;
int tid = ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;
#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];
__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
const int nn = 1024;
int tid = ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernel1PiS_S_S_PbS_
.globl _Z7kernel1PiS_S_S_PbS_
.p2align 8
.type _Z7kernel1PiS_S_S_PbS_,@function
_Z7kernel1PiS_S_S_PbS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#include <cstdlib>
#include <cstring>
using namespace std;
#define N 1024
#define INF 0x03F3F3F
int map[N * N];
int path[N];
__global__ void kernel1(int *nv,int *map,int *cost,int *tmp_cost,bool *visited,int * tmp_path)
{
const int nn = 1024;
int tid = ... | .text
.file "dijkstra.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__kernel1PiS_S_S_PbS_ # -- Begin function _Z22__device_stub__kernel1PiS_S_S_PbS_
... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7kernel2PiS_PbS0_S_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7kernel1PiS_S_S_PbS_
.globl _Z7kernel1PiS_S_S_PbS_
.p2align 8
.type _Z7kernel1PiS_S_S_PbS_,@function
_Z7kernel1PiS_S_S_PbS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cb8ae_00000000-6_dijkstra.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... | .text
.file "dijkstra.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__kernel1PiS_S_S_PbS_ # -- Begin function _Z22__device_stub__kernel1PiS_S_S_PbS_
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*!
* \brief Sort.
*/
#include <iostream>
#include <thrust/sort.h>
#include <thrust/device_vector.h>
#define CUDA_CHECK(condition) \
do { \
cudaError_t error = condition; \
if (error != cudaSuccess) { \
fprintf(stderr, "CUDA_CHECK error in line %d of file %s \
: %s \n", __LINE__, __FILE__, cudaGetErrorString(cudaGetLas... | /*!
* \brief Sort.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/sort.h>
#include <thrust/device_vector.h>
#define CUDA_CHECK(condition) \
do { \
hipError_t error = condition; \
if (error != hipSuccess) { \
fprintf(stderr, "CUDA_CHECK error in line %d of file %s \
: %s \n", __LINE__, __FILE__, hi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 = input[index];
int a2 = input... | code for sm_80
Function : _Z38reduction_kernel_complete_unrolling8_1PiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 = input[index];
int a2 = input... | .file "tmpxft_0010d62e_00000000-6_reduction_kernel_complete_unrolling8_1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregis... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 = input[index];
int a2 = input... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 =... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 =... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z38reduction_kernel_complete_unrolling8_1PiS_i
.globl _Z38reduction_kernel_complete_unrolling8_1PiS_i
.p2align 8
.type _Z38reduction_kernel_complete_unrolling8_1PiS_i,@function
_Z38reduction_kernel_complete_unrolling8_1PiS_i:
s_clause 0x2
s_load_b32 s8, s[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reduction_kernel_complete_unrolling8_1(int * input, int * temp, int size)
{
int tid = threadIdx.x;
int index = blockDim.x * blockIdx.x * 8 + threadIdx.x;
int * i_data = input + blockDim.x * blockIdx.x * 8;
if ((index + 7 * blockDim.x) < size)
{
int a1 =... | .text
.file "reduction_kernel_complete_unrolling8_1.hip"
.globl _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i # -- Begin function _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i
.p2align 4, 0x90
.type _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i,@function
_Z53__device_s... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z38reduction_kernel_complete_unrolling8_1PiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z38reduction_kernel_complete_unrolling8_1PiS_i
.globl _Z38reduction_kernel_complete_unrolling8_1PiS_i
.p2align 8
.type _Z38reduction_kernel_complete_unrolling8_1PiS_i,@function
_Z38reduction_kernel_complete_unrolling8_1PiS_i:
s_clause 0x2
s_load_b32 s8, s[... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010d62e_00000000-6_reduction_kernel_complete_unrolling8_1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregis... | .text
.file "reduction_kernel_complete_unrolling8_1.hip"
.globl _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i # -- Begin function _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i
.p2align 4, 0x90
.type _Z53__device_stub__reduction_kernel_complete_unrolling8_1PiS_i,@function
_Z53__device_s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void average_snips(const double *Params, const int *ioff, const int *id, const float *uproj, const float *cmax, const int *iList, float *cf, float *WU){
int tid, bid, ind, Nspikes, Nfeatures, NfeatW, Nnearest, t;
float xsum = 0.0f, pm;
Nspikes = (int) Params[0];
Nfeatures = (int) Params... | .file "tmpxft_001617c3_00000000-6_average_snips.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void average_snips(const double *Params, const int *ioff, const int *id, const float *uproj, const float *cmax, const int *iList, float *cf, float *WU){
int tid, bid, ind, Nspikes, Nfeatures, NfeatW, Nnearest, t;
float xsum = 0.0f, pm;
Nspikes = (int) Params[0];
Nfeatures = (int) Params... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void average_snips(const double *Params, const int *ioff, const int *id, const float *uproj, const float *cmax, const int *iList, float *cf, float *WU){
int tid, bid, ind, Nspikes, Nfeatures, NfeatW, Nnearest, t;
float xsum = 0.0f, pm;
Nspikes = (int) Params... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void average_snips(const double *Params, const int *ioff, const int *id, const float *uproj, const float *cmax, const int *iList, float *cf, float *WU){
int tid, bid, ind, Nspikes, Nfeatures, NfeatW, Nnearest, t;
float xsum = 0.0f, pm;
Nspikes = (int) Params... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13average_snipsPKdPKiS2_PKfS4_S2_PfS5_
.globl _Z13average_snipsPKdPKiS2_PKfS4_S2_PfS5_
.p2align 8
.type _Z13average_snipsPKdPKiS2_PKfS4_S2_PfS5_,@function
_Z13average_snipsPKdPKiS2_PKfS4_S2_PfS5_:
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void average_snips(const double *Params, const int *ioff, const int *id, const float *uproj, const float *cmax, const int *iList, float *cf, float *WU){
int tid, bid, ind, Nspikes, Nfeatures, NfeatW, Nnearest, t;
float xsum = 0.0f, pm;
Nspikes = (int) Params... | .text
.file "average_snips.hip"
.globl _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_ # -- Begin function _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_
.p2align 4, 0x90
.type _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_,@function
_Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_: # @... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001617c3_00000000-6_average_snips.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "average_snips.hip"
.globl _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_ # -- Begin function _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_
.p2align 4, 0x90
.type _Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_,@function
_Z28__device_stub__average_snipsPKdPKiS2_PKfS4_S2_PfS5_: # @... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = array_a[my_index]; // use wri... | code for sm_80
Function : _Z13device_globalPji
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = array_a[my_index]; // use wri... | .file "tmpxft_0004d208_00000000-6_race_00.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = array_a[my_index]; // use wri... | #include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13device_globalPji
.globl _Z13device_globalPji
.p2align 8
.type _Z13device_globalPji,@function
_Z13device_globalPji:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x8
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define SIZE 64
#define BLOCKS 4
__global__ void device_global(unsigned int *array_a, int num_elements) {
int my_index = blockIdx.x * blockDim.x + threadIdx.x;
array_a[my_index] = my_index % (num_elements/2); // write overlaping indicies
__syncthreads();
int next_index = ... | .text
.file "race_00.hip"
.globl _Z28__device_stub__device_globalPji # -- Begin function _Z28__device_stub__device_globalPji
.p2align 4, 0x90
.type _Z28__device_stub__device_globalPji,@function
_Z28__device_stub__device_globalPji: # @_Z28__device_stub__device_globalPji
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13device_globalPji
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13device_globalPji
.globl _Z13device_globalPji
.p2align 8
.type _Z13device_globalPji,@function
_Z13device_globalPji:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x8
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004d208_00000000-6_race_00.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "race_00.hip"
.globl _Z28__device_stub__device_globalPji # -- Begin function _Z28__device_stub__device_globalPji
.p2align 4, 0x90
.type _Z28__device_stub__device_globalPji,@function
_Z28__device_stub__device_globalPji: # @_Z28__device_stub__device_globalPji
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} | code for sm_80
Function : _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} | .file "tmpxft_001ba4e6_00000000-6___pairmult2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.globl _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.p2align 8
.type _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii,@function
_Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_ke... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void __pairmult2(int nrows, int bncols, int brows1, int brows2, float *A, int lda, float *A2, int lda2, float *Bdata, int *Bir, int *Bjc, int broff, int bcoff, float *C, int ldc, int transpose) {} | .text
.file "__pairmult2.hip"
.globl _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii # -- Begin function _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.p2align 4, 0x90
.type _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii,@function
_Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii: # @_Z26__devi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.globl _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.p2align 8
.type _Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii,@function
_Z11__pairmult2iiiiPfiS_iS_PiS0_iiS_ii:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_ke... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ba4e6_00000000-6___pairmult2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "__pairmult2.hip"
.globl _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii # -- Begin function _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii
.p2align 4, 0x90
.type _Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii,@function
_Z26__device_stub____pairmult2iiiiPfiS_iS_PiS0_iiS_ii: # @_Z26__devi... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /////// Bom para quando maiores pq o discard n precisa contar varios.
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/functional.h>
#include <thrust/transform.h>
#include <iostream>
#include <math.h>
#include <thrust/iterator/counting_iterator.h>
#include <thrust/random/uniform_real_... | /////// Bom para quando maiores pq o discard n precisa contar varios.
#include <hip/hip_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/functional.h>
#include <thrust/transform.h>
#include <iostream>
#include <math.h>
#include <thrust/iterator/counting_iterator.h>
#include... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /////// Bom para quando maiores pq o discard n precisa contar varios.
#include <hip/hip_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/functional.h>
#include <thrust/transform.h>
#include <iostream>
#include <math.h>
#include <thrust/iterator/counting_iterator.h>
#include... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIdEEdEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIdEEdEEm... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} | code for sm_80
Function : _Z10atomic_redPKfPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e280000002100 */
/*0020... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} | .file "tmpxft_00173484_00000000-6_atomic_red.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10atomic_redPKfPf
.globl _Z10atomic_redPKfPf
.p2align 8
.type _Z10atomic_redPKfPf,@function
_Z10atomic_redPKfPf:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void atomic_red(const float *gdata, float *out){
size_t idx = threadIdx.x+blockDim.x*blockIdx.x;
if (idx < N) atomicAdd(out, gdata[idx]);
} | .text
.file "atomic_red.hip"
.globl _Z25__device_stub__atomic_redPKfPf # -- Begin function _Z25__device_stub__atomic_redPKfPf
.p2align 4, 0x90
.type _Z25__device_stub__atomic_redPKfPf,@function
_Z25__device_stub__atomic_redPKfPf: # @_Z25__device_stub__atomic_redPKfPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10atomic_redPKfPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e280000002100 */
/*0020... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10atomic_redPKfPf
.globl _Z10atomic_redPKfPf
.p2align 8
.type _Z10atomic_redPKfPf,@function
_Z10atomic_redPKfPf:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00173484_00000000-6_atomic_red.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "atomic_red.hip"
.globl _Z25__device_stub__atomic_redPKfPf # -- Begin function _Z25__device_stub__atomic_redPKfPf
.p2align 4, 0x90
.type _Z25__device_stub__atomic_redPKfPf,@function
_Z25__device_stub__atomic_redPKfPf: # @_Z25__device_stub__atomic_redPKfPf
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ void mMultiply(int length, fl... | code for sm_80
Function : _Z9mMultiplyiPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ void mMultiply(int length, fl... | .file "tmpxft_0006cfaa_00000000-6_Array10m.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3773:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ void mMultiply(int length, fl... | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4initiPfS_
.globl _Z4initiPfS_
.p2align 8
.type _Z4initiPfS_,@function
_Z4initiPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s10, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <chrono>
__global__ void init(int length, float *a, float *b)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x;
for (int i = index; i < length; i += stride)
{
a[i] = 2.3423;
b[i] = 1.4214;
}
}
__global__ ... | .text
.file "Array10m.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__initiPfS_ # -- Begin function _Z19__device_stub__initiPfS_
.p2align 4, 0x90
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006cfaa_00000000-6_Array10m.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3773:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... | .text
.file "Array10m.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__initiPfS_ # -- Begin function _Z19__device_stub__initiPfS_
.p2align 4, 0x90
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} | code for sm_80
Function : _Z6vecAddPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} | .file "tmpxft_001ade97_00000000-6_vecAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6vecAddPiS_S_
.globl _Z6vecAddPiS_S_
.p2align 8
.type _Z6vecAddPiS_S_,@function
_Z6vecAddPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void vecAdd (int *a, int *b, int *c)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if(index < N){
c[index] = a[index] + b[index];
}
} | .text
.file "vecAdd.hip"
.globl _Z21__device_stub__vecAddPiS_S_ # -- Begin function _Z21__device_stub__vecAddPiS_S_
.p2align 4, 0x90
.type _Z21__device_stub__vecAddPiS_S_,@function
_Z21__device_stub__vecAddPiS_S_: # @_Z21__device_stub__vecAddPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6vecAddPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6vecAddPiS_S_
.globl _Z6vecAddPiS_S_
.p2align 8
.type _Z6vecAddPiS_S_,@function
_Z6vecAddPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ade97_00000000-6_vecAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "vecAdd.hip"
.globl _Z21__device_stub__vecAddPiS_S_ # -- Begin function _Z21__device_stub__vecAddPiS_S_
.p2align 4, 0x90
.type _Z21__device_stub__vecAddPiS_S_,@function
_Z21__device_stub__vecAddPiS_S_: # @_Z21__device_stub__vecAddPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
//M and N number of threads (grid and block)
void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
__global__ void multiply( const int a[] ,cons... | .file "tmpxft_0012c4e7_00000000-6_entrega1_1_windows.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
//M and N number of threads (grid and block)
void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
__global__ void multiply( const int a[] ,cons... | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
//M and N number of threads (grid and block)
void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
__global__ void multiply( const int a[] ,const int b[], unsigned long int c[] , ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>
//M and N number of threads (grid and block)
void secuential(const int a[] ,const int b[], unsigned long int c[], const int sqrt_dim);
__global__ void multiply( const int a[] ,const int b[], unsigned long int c[] , ... | .text
.file "entrega1_1_windows.hip"
.globl _Z23__device_stub__multiplyPKiS0_Pmii # -- Begin function _Z23__device_stub__multiplyPKiS0_Pmii
.p2align 4, 0x90
.type _Z23__device_stub__multiplyPKiS0_Pmii,@function
_Z23__device_stub__multiplyPKiS0_Pmii: # @_Z23__device_stub__multiplyPKiS0_Pmii
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012c4e7_00000000-6_entrega1_1_windows.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "entrega1_1_windows.hip"
.globl _Z23__device_stub__multiplyPKiS0_Pmii # -- Begin function _Z23__device_stub__multiplyPKiS0_Pmii
.p2align 4, 0x90
.type _Z23__device_stub__multiplyPKiS0_Pmii,@function
_Z23__device_stub__multiplyPKiS0_Pmii: # @_Z23__device_stub__multiplyPKiS0_Pmii
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
//////////////////////////////////////////////////////////////////////////////////
//// Prog... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
//////////////////////////////////////////////////////////////////////////////////
//// Prog... | .file "tmpxft_00041dd4_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
//////////////////////////////////////////////////////////////////////////////////
//// Prog... | #include <hip/hip_runtime.h>
//#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
///////////////////////////////////////////////////////////////... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
//#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
///////////////////////////////////////////////////////////////... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
//#include <stdio.h>
//#include "Cublas.h"
//
//
//// Allocates a matrix with random float entries.
//void randomInit(float *data, int size)
//{
// for (int i = 0; i < size; ++i)
// data[i] = rand() / (float)RAND_MAX;
//}
//
//
///////////////////////////////////////////////////////////////... | .text
.file "main.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00041dd4_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "main.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the position otherwise set to 0
//... | code for sm_80
Function : _Z19getPredicate_kernelPjS_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the position otherwise set to 0
//... | .file "tmpxft_001b4714_00000000-6_getPredicate_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the position otherwise set to 0
//... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the p... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the p... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19getPredicate_kernelPjS_jj
.globl _Z19getPredicate_kernelPjS_jj
.p2align 8
.type _Z19getPredicate_kernelPjS_jj,@function
_Z19getPredicate_kernelPjS_jj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_a... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void getPredicate_kernel(unsigned int * d_inVal, unsigned int * d_predVal, unsigned int numElems, unsigned int bitMask)
{
unsigned int gIdx = blockIdx.x * blockDim.x + threadIdx.x;
if (gIdx < numElems)
{
// if bitmask matches inputvale then assign 1 to the p... | .text
.file "getPredicate_kernel.hip"
.globl _Z34__device_stub__getPredicate_kernelPjS_jj # -- Begin function _Z34__device_stub__getPredicate_kernelPjS_jj
.p2align 4, 0x90
.type _Z34__device_stub__getPredicate_kernelPjS_jj,@function
_Z34__device_stub__getPredicate_kernelPjS_jj: # @_Z34__device_stub__getPredicate_kernel... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z19getPredicate_kernelPjS_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19getPredicate_kernelPjS_jj
.globl _Z19getPredicate_kernelPjS_jj
.p2align 8
.type _Z19getPredicate_kernelPjS_jj,@function
_Z19getPredicate_kernelPjS_jj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_a... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b4714_00000000-6_getPredicate_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... | .text
.file "getPredicate_kernel.hip"
.globl _Z34__device_stub__getPredicate_kernelPjS_jj # -- Begin function _Z34__device_stub__getPredicate_kernelPjS_jj
.p2align 4, 0x90
.type _Z34__device_stub__getPredicate_kernelPjS_jj,@function
_Z34__device_stub__getPredicate_kernelPjS_jj: # @_Z34__device_stub__getPredicate_kernel... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido
ve... | code for sm_80
Function : _Z4sumaPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0020*/ HF... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido
ve... | .file "tmpxft_0004c61f_00000000-6_ejemplo5.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido
ve... | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4sumaPiS_S_i
.globl _Z4sumaPiS_S_i
.p2align 8
.type _Z4sumaPiS_S_i,@function
_Z4sumaPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_x... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Temporizador de un Kernel
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
# define N 24
// Funcion que suma de dos vectores de n elementos
__global__
void suma(int *vector_1, int *vector_2, int*vector_suma, int n)
{
// identificador de hilo
int myID = threadIdx.x;
// obtenemos el vector invertido... | .text
.file "ejemplo5.hip"
.globl _Z19__device_stub__sumaPiS_S_i # -- Begin function _Z19__device_stub__sumaPiS_S_i
.p2align 4, 0x90
.type _Z19__device_stub__sumaPiS_S_i,@function
_Z19__device_stub__sumaPiS_S_i: # @_Z19__device_stub__sumaPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
m... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4sumaPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0020*/ HF... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4sumaPiS_S_i
.globl _Z4sumaPiS_S_i
.p2align 8
.type _Z4sumaPiS_S_i,@function
_Z4sumaPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_x... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004c61f_00000000-6_ejemplo5.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "ejemplo5.hip"
.globl _Z19__device_stub__sumaPiS_S_i # -- Begin function _Z19__device_stub__sumaPiS_S_i
.p2align 4, 0x90
.type _Z19__device_stub__sumaPiS_S_i,@function
_Z19__device_stub__sumaPiS_S_i: # @_Z19__device_stub__sumaPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
m... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
#define MAXN 6000 /* Matrix size */
int numThreads; //number of threads
int numBlocks; //number of blocks
int N; //Matrix Size
int row, col;
/* Matrices */
f... | .file "tmpxft_001276bc_00000000-6_matrixNorm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2077:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
#define MAXN 6000 /* Matrix size */
int numThreads; //number of threads
int numBlocks; //number of blocks
int N; //Matrix Size
int row, col;
/* Matrices */
f... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
#define MAXN 6000 /* Matrix size */
int numThreads; //number of threads
int numBlocks; //number of blocks
int N; //Matrix Size
i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
#define MAXN 6000 /* Matrix size */
int numThreads; //number of threads
int numBlocks; //number of blocks
int N; //Matrix Size
i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10matrixNormPfS_i
.globl _Z10matrixNormPfS_i
.p2align 8
.type _Z10matrixNormPfS_i,@function
_Z10matrixNormPfS_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
s_add_u32 s4, s0, 24
s_ad... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>
#define MAXN 6000 /* Matrix size */
int numThreads; //number of threads
int numBlocks; //number of blocks
int N; //Matrix Size
i... | .text
.file "matrixNorm.hip"
.globl _Z9time_seedv # -- Begin function _Z9time_seedv
.p2align 4, 0x90
.type _Z9time_seedv,@function
_Z9time_seedv: # @_Z9time_seedv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
movq %rsp, %rdi
leaq 16(%rsp), %rsi
callq gettimeofd... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001276bc_00000000-6_matrixNorm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2077:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "matrixNorm.hip"
.globl _Z9time_seedv # -- Begin function _Z9time_seedv
.p2align 4, 0x90
.type _Z9time_seedv,@function
_Z9time_seedv: # @_Z9time_seedv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
movq %rsp, %rdi
leaq 16(%rsp), %rsi
callq gettimeofd... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // incrementArray.cu
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx<N) a[idx] = a... | code for sm_80
Function : _Z22incrementArrayOnDevicePfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2800000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // incrementArray.cu
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx<N) a[idx] = a... | .file "tmpxft_001b2223_00000000-6_incrementArrayRan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2076:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // incrementArray.cu
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx<N) a[idx] = a... | // incrementArray.cu
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // incrementArray.cu
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threa... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22incrementArrayOnDevicePfi
.globl _Z22incrementArrayOnDevicePfi
.p2align 8
.type _Z22incrementArrayOnDevicePfi,@function
_Z22incrementArrayOnDevicePfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_an... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // incrementArray.cu
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#include <sys/types.h>
#include <unistd.h>
void incrementArrayOnHost(float *a, int N)
{
int i;
for (i=0; i < N; i++) a[i] = a[i]+1.f;
}
__global__ void incrementArrayOnDevice(float *a, int N)
{
int idx = blockIdx.x*blockDim.x + threa... | .text
.file "incrementArrayRan.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z20incrementArrayOnHostPfi
.LCPI0_0:
.long 0x3f800000 # float 1
.text
.globl _Z20incrementArrayOnHostPfi
.p2align 4, 0x90
.type _Z20incrementArrayOnHostPfi,@funct... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z22incrementArrayOnDevicePfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2800000025... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22incrementArrayOnDevicePfi
.globl _Z22incrementArrayOnDevicePfi
.p2align 8
.type _Z22incrementArrayOnDevicePfi,@function
_Z22incrementArrayOnDevicePfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_an... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b2223_00000000-6_incrementArrayRan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2076:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "incrementArrayRan.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z20incrementArrayOnHostPfi
.LCPI0_0:
.long 0x3f800000 # float 1
.text
.globl _Z20incrementArrayOnHostPfi
.p2align 4, 0x90
.type _Z20incrementArrayOnHostPfi,@funct... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <math.... | code for sm_80
Function : _Z13update_kernelPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <math.... | .file "tmpxft_0005fa31_00000000-6_0513404.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <math.... | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
#includ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
#includ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16init_line_kernelPfS_i
.globl _Z16init_line_kernelPfS_i
.p2align 8
.type _Z16init_line_kernelPfS_i,@function
_Z16init_line_kernelPfS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* *********************************************************************
* DESCRIPTION:
* Serial Concurrent Wave Equation - C Version
* This program implements the concurrent wave equation
*********************************************************************/
#include <hip/hip_runtime.h>
#include <stdio.h>
#includ... | .text
.file "0513404.hip"
.globl _Z11check_paramv # -- Begin function _Z11check_paramv
.p2align 4, 0x90
.type _Z11check_paramv,@function
_Z11check_paramv: # @_Z11check_paramv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $24, %rsp
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13update_kernelPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16init_line_kernelPfS_i
.globl _Z16init_line_kernelPfS_i
.p2align 8
.type _Z16init_line_kernelPfS_i,@function
_Z16init_line_kernelPfS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005fa31_00000000-6_0513404.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "0513404.hip"
.globl _Z11check_paramv # -- Begin function _Z11check_paramv
.p2align 4, 0x90
.type _Z11check_paramv,@function
_Z11check_paramv: # @_Z11check_paramv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $24, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
#include <cuda.h>
static const int ThreadsPerBlock = 512;
static int* d_maxlen;
static __global__ void collatz(const long start, const long stop, int* const maxlen)
{
// todo: process odd values from start (assume start to be odd) to stop (inclusively if stop is odd) with one thread per value (based o... | code for sm_80
Function : _Z7collatzllPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e2200000021... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
#include <cuda.h>
static const int ThreadsPerBlock = 512;
static int* d_maxlen;
static __global__ void collatz(const long start, const long stop, int* const maxlen)
{
// todo: process odd values from start (assume start to be odd) to stop (inclusively if stop is odd) with one thread per value (based o... | .file "tmpxft_000234b5_00000000-6_collatz_hyb.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL28__device_stub__Z7collatzllPillPi, @function
_ZL28__device_stub__Z7collatzllPillPi:
.LFB2084:
.cfi_startproc
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %... |
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